From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH v3 11/12] riscv: Add device tree for K210
Date: Tue, 4 Feb 2020 09:23:32 -0500 [thread overview]
Message-ID: <23ff3781-3196-ac00-e7b6-91a1d5820226@gmail.com> (raw)
In-Reply-To: <CAEUhbmW3+=jGbtwBUgOBBj9zqZG2G7f0nw7vdnktgP=EF7LQew@mail.gmail.com>
On 2/4/20 6:32 AM, Bin Meng wrote:
> Hi Sean,
>
> On Mon, Feb 3, 2020 at 4:10 AM Sean Anderson <seanga2@gmail.com> wrote:
>>
>> Where possible, I have tried to find compatible drivers based on the layout of
>> registers. However, I have not tested most of this functionality, and most
>> devices should be considered descriptive at best. I would appreciate if anyone
>> could help identify possibly compatible devices, especially for the timers
>> and rtc.
>>
>> Should the size of a reg be the size of the documented registers, or the size
>> of the address space which will be routed to that device?
>
> Perhaps we need use the size of the address space routed to that
> device, in case there is some undocumented registers we need handle.
Ok, I'll go with the whole address space then.
>> diff --git a/arch/riscv/dts/k210.dtsi b/arch/riscv/dts/k210.dtsi
>> new file mode 100644
>> index 0000000000..cc46b692e6
>> --- /dev/null
>> +++ b/arch/riscv/dts/k210.dtsi
>> @@ -0,0 +1,496 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Copyright (C) 2019 Sean Anderson <seanga2@gmail.com>
>> + */
>> +
>> +#include <dt-bindings/clock/k210-sysctl.h>
>> +#include <dt-bindings/mfd/k210-sysctl.h>
>> +#include <dt-bindings/reset/k210-sysctl.h>
>> +
>> +/ {
>> + /*
>> + * Although the K210 is a 64-bit CPU, the address bus is only 32-bits
>> + * wide, and the upper half of all addresses is ignored.
>> + */
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "kendryte,k210";
>> +
>> + aliases {
>> + serial0 = &uarths0;
>> + serial1 = &uart1;
>> + serial2 = &uart2;
>> + serial3 = &uart3;
>> + spi0 = &spi0;
>> + spi1 = &spi1;
>> + spi2 = &spi2;
>> + spi3 = &spi3;
>> + };
>> +
>> + clocks {
>> + in0: oscillator {
>> + compatible = "fixed-clock";
>> + #clock-cells = <0>;
>> + clock-frequency = <26000000>;
>> + };
>> + };
>> +
>> + cpus {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> + timebase-frequency = <7800000>;
>> + cpu0: cpu at 0 {
>> + device_type = "cpu";
>> + reg = <0>;
>> + compatible = "riscv";
>> + riscv,isa = "rv64acdfimsu";
>> + mmu-type = "sv39";
>> + i-cache-size = <0x8000>;
>> + d-cache-size = <0x8000>;
>> + clocks = <&sysclk K210_CLK_CPU>;
>> + clock-frequency = <390000000>;
>
> I wonder there is already clocks property, why do we have another
> clock-frequency property to provide duplicated information?
This is for compatibility with the existing riscv cpu driver. There is a
patch [1] to move the driver over to using clocks, but I think you
already expressed that it should be merged into this series (not as a
separate series).
[1] https://patchwork.ozlabs.org/project/uboot/list/?series=156381
--Sean
next prev parent reply other threads:[~2020-02-04 14:23 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-02 19:56 [PATCH v3 00/12] riscv: Add Sipeed Maix support Sean Anderson
2020-02-02 19:58 ` [PATCH v3 01/12] clk: Always use the supplied struct clk Sean Anderson
2020-02-06 21:21 ` Lukasz Majewski
[not found] ` <752D002CFF5D0F4FA35C0100F1D73F3FA46D30F5@ATCPCS16.andestech.com>
2020-02-12 1:23 ` Rick Chen
2020-02-02 19:58 ` [PATCH v3 02/12] clk: Check that ops of composite clock components, exist before calling Sean Anderson
2020-02-06 21:41 ` Lukasz Majewski
2020-02-02 19:59 ` [PATCH v3 03/12] clk: Unconditionally recursively en-/dis-able clocks Sean Anderson
2020-02-06 21:45 ` Lukasz Majewski
2020-02-02 20:01 ` [PATCH v3 04/12] reset: Add generic reset driver Sean Anderson
2020-02-03 0:04 ` Simon Glass
2020-02-03 23:14 ` Sean Anderson
2020-02-04 11:06 ` Bin Meng
2020-02-04 14:14 ` Sean Anderson
2020-02-02 20:02 ` [PATCH v3 05/12] dm: Add support for simple-pm-bus Sean Anderson
2020-02-03 0:04 ` Simon Glass
2020-02-03 23:15 ` Sean Anderson
2020-02-05 0:16 ` Simon Glass
2020-02-04 11:13 ` Bin Meng
2020-02-02 20:04 ` [PATCH v3 06/12] riscv: Add headers for asm/global_data.h Sean Anderson
2020-02-04 11:17 ` Bin Meng
2020-02-02 20:05 ` [PATCH v3 07/12] riscv: Add option to support RISC-V privileged spec 1.9.1 Sean Anderson
2020-02-04 11:21 ` Bin Meng
2020-02-04 14:19 ` Sean Anderson
2020-02-04 14:38 ` Bin Meng
2020-02-04 14:48 ` Sean Anderson
2020-02-04 16:04 ` Bin Meng
2020-02-04 16:07 ` Sean Anderson
2020-02-02 20:06 ` [PATCH v3 08/12] riscv: Allow use of reset drivers Sean Anderson
2020-02-04 11:22 ` Bin Meng
2020-02-02 20:07 ` [PATCH v3 09/12] riscv: Add K210 pll support Sean Anderson
2020-02-02 20:07 ` [PATCH v3 10/12] riscv: Add K210 clock support Sean Anderson
2020-02-06 21:51 ` Lukasz Majewski
2020-02-02 20:10 ` [PATCH v3 11/12] riscv: Add device tree for K210 Sean Anderson
2020-02-04 11:32 ` Bin Meng
2020-02-04 14:23 ` Sean Anderson [this message]
2020-02-04 14:40 ` Bin Meng
2020-02-02 20:10 ` [PATCH v3 12/12] riscv: Add initial Sipeed Maix support Sean Anderson
2020-02-04 11:38 ` Bin Meng
2020-02-04 14:26 ` Sean Anderson
2020-02-04 14:42 ` Bin Meng
2020-02-04 14:49 ` Sean Anderson
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