From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Schwierzeck Date: Mon, 22 Jan 2018 16:47:52 +0100 Subject: [U-Boot] Pull request: u-boot-spi/master In-Reply-To: <20180122153230.GH32220@bill-the-cat> References: <1516600256-8152-1-git-send-email-jagan@amarulasolutions.com> <20180122125844.GA32220@bill-the-cat> <20180122145946.GF32220@bill-the-cat> <278c8522-2a46-63a9-f8b8-2d9e38392e26@gmail.com> <20180122153230.GH32220@bill-the-cat> Message-ID: <24f2c96b-890c-485f-2988-9dbb37945d23@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit To: u-boot@lists.denx.de On 22.01.2018 16:32, Tom Rini wrote: > On Mon, Jan 22, 2018 at 04:28:16PM +0100, Daniel Schwierzeck wrote: >> >> >> On 22.01.2018 15:59, Tom Rini wrote: >>> On Mon, Jan 22, 2018 at 03:56:09PM +0100, Daniel Schwierzeck wrote: >>>> Hi Tom, >>>> >>>> On 22.01.2018 13:58, Tom Rini wrote: >>>>> On Mon, Jan 22, 2018 at 11:20:56AM +0530, Jagan Teki wrote: >>>>> >>>>>> Hi Tom, >>>>>> >>>>>> Please pull this PR. >>>>>> >>>>>> thanks! >>>>>> Jagan. >>>>>> >>>>>> The following changes since commit 98691a60abffb44303d7dae6e9e699d0daded930: >>>>>> >>>>>> Merge git://git.denx.de/u-boot-rockchip (2018-01-09 13:28:51 -0500) >>>>>> >>>>>> are available in the git repository at: >>>>>> >>>>>> git://git.denx.de/u-boot-spi.git master >>>>>> >>>>>> for you to fetch changes up to b23c685c6f295da3c01dd487f0e003b70299af91: >>>>>> >>>>>> mips: bmips: enable the SPI flash on the Comtrend AR-5387un (2018-01-22 10:39:13 +0530) >>>>>> >>>>> >>>>> NAK: >>>>> >>>>> commit 19e3a4856c1cba751a9ecb3931ff0d96a7f169be >>>>> Author: Álvaro Fernández Rojas >>>>> Date: Sat Jan 20 02:11:34 2018 +0100 >>>>> >>>>> wait_bit: add 8/16/32 BE/LE versions of wait_for_bit >>>>> >>>>> Add 8/16/32 bits and BE/LE versions of wait_for_bit. >>>>> This is needed for reading registers that are not aligned to 32 bits, and for >>>>> Big Endian platforms. >>>>> >>>>> Signed-off-by: Álvaro Fernández Rojas >>>>> Reviewed-by: Daniel Schwierzeck >>>>> Reviewed-by: Jagan Teki >>>>> >>>>> Adds warnings on almost all platforms: >>>>> w+(ls1088ardb_qspi_SECURE_BOOT) ../include/wait_bit.h: In function ?wait_for_bit_be16?: >>>>> w+(ls1088ardb_qspi_SECURE_BOOT) ../include/wait_bit.h:76:31: warning: implicit declaration of function ?readw_be? [-Wimplicit-function-declaration] >>>>> w+(ls1088ardb_qspi_SECURE_BOOT) ../include/wait_bit.h: In function ?wait_for_bit_be32?: w+(ls1088ardb_qspi_SECURE_BOOT) ../include/wait_bit.h:78:31: warning: implicit declaration of function ?readl_be? [-Wimplicit-function-declaration] >>>>> >>>> >>>> >>>> did this commit alone produce those warnings? The patch series itself >>>> builds successfully on Travis CI [1]. >>>> >>>> [1] https://travis-ci.org/danielschwierzeck/u-boot/builds/331506036 >>> >>> It builds, yes. But it adds that warning too: >>> https://travis-ci.org/danielschwierzeck/u-boot/jobs/331506059 >>> >>> And I bisect'd down to the above commit being what adds that warning. >>> >>> And yes, sigh, I need to something-something to get us back to zero >>> warnings and make -Werror at least a CONFIG option and perhaps default >>> in travis as this isn't the first warning to come in that wasn't noticed >>> as travis didn't fail. >> >> hm, since when are gcc warnings being ignored? I thought only DTC >> warnings were suppressed. Thus I still expected to have Travis CI builds >> marked as yellow in case of gcc warnings ;) > > ... wait, you can have Travis CI do yellow for warnings? That'd be > handy to get back again. Especially if we can have it for non-DTC > warnings only. > hm, I think I saw this in the past but can't find any reference in the documentation. Sorry for creating false hopes ;) -- - Daniel -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 819 bytes Desc: OpenPGP digital signature URL: