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From: Murray.Jensen at csiro.au <Murray.Jensen@csiro.au>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] MPC8560 DDR controller
Date: Tue, 13 Sep 2005 19:52:18 +1000	[thread overview]
Message-ID: <26710.1126605138@gerd> (raw)
In-Reply-To: Your message of "Fri, 09 Sep 2005 14:37:21 +0200" <43218201.4050504@anagramm.de>

On Fri, 09 Sep 2005 14:37:21 +0200, Clemens Koller writes:
>> I can't really rule out some problem in the Linux virtual memory system
>
>Oh, I wouldn't blame the kernel in that case. 2.6.8 to 2.6.13 work really
>fine over here. What linux do you use?

We are using 2.6.13, with some patches from the ozlabs patch tracker.

>If you would have the chance to have an ECCable
>system you can pretty easily check the reliability of the DDR looking at
>the ECC status registers.

Unfortunately, this would require a board re-design.

>There is a story around here (from a guy who did a DDR for MPC8540)
>that you might have to put on really good capacitors on some of the
>ddr vref voltages on the CPU side because something is bouncing there
>more than you would expect...

Thanks - we will take a look at them ...

>You also might want to check what happens if you increase/decrease
>supply voltages here and there... well... you know, all these EE tricks.

Your response is very much appreciated. Cheers!
								Murray...
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Murray Jensen, CSIRO Manufacturing & Infra. Tech.      Phone: +61 3 9662 7763
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      reply	other threads:[~2005-09-13  9:52 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-09-09  8:02 [U-Boot-Users] MPC8560 DDR controller Murray.Jensen at csiro.au
2005-09-09  9:54 ` Clemens Koller
2005-09-09 10:54   ` Murray.Jensen at csiro.au
2005-09-09 12:37     ` Clemens Koller
2005-09-13  9:52       ` Murray.Jensen at csiro.au [this message]

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