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[86.58.6.171]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-39c0b7a4181sm640512f8f.83.2025.03.27.14.43.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 27 Mar 2025 14:43:55 -0700 (PDT) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: u-boot@lists.denx.de, Andre Przywara Cc: Tom Rini , linux-sunxi@lists.linux.dev Subject: Re: [PATCH] sunxi: h616: defconfigs: enable eMMC Date: Thu, 27 Mar 2025 22:43:54 +0100 Message-ID: <2772843.mvXUDI8C0e@jernej-laptop> In-Reply-To: <20250327212102.26893-1-andre.przywara@arm.com> References: <20250327212102.26893-1-andre.przywara@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Dne =C4=8Detrtek, 27. marec 2025 ob 22:21:02 Srednjeevropski standardni =C4= =8Das je Andre Przywara napisal(a): > Now that eMMC is working properly on H616 devices, it became apparent > that some boards were missing the right defconfig bits to enable eMMC > access. >=20 > Add the eMMC device number to the Tanix TX1 and the X96 Mate defconfig, > also the eMMC boot option to the TX1. Oddly enough the X96 Mate had > just this bit already. >=20 > Signed-off-by: Andre Przywara Expected consequence of the fix :) Reviewed-by: Jernej Skrabec Best regards, Jernej > --- > configs/tanix_tx1_defconfig | 2 ++ > configs/x96_mate_defconfig | 1 + > 2 files changed, 3 insertions(+) >=20 > diff --git a/configs/tanix_tx1_defconfig b/configs/tanix_tx1_defconfig > index 28cf9513c30..00e34dc5ad9 100644 > --- a/configs/tanix_tx1_defconfig > +++ b/configs/tanix_tx1_defconfig > @@ -14,11 +14,13 @@ CONFIG_MACH_SUN50I_H616=3Dy > CONFIG_SUNXI_DRAM_H616_LPDDR3=3Dy > CONFIG_R_I2C_ENABLE=3Dy > # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > +CONFIG_MMC_SUNXI_SLOT_EXTRA=3D2 > CONFIG_SPL_I2C=3Dy > CONFIG_SPL_SYS_I2C_LEGACY=3Dy > CONFIG_SYS_I2C_MVTWSI=3Dy > CONFIG_SYS_I2C_SLAVE=3D0x7f > CONFIG_SYS_I2C_SPEED=3D400000 > +CONFIG_SUPPORT_EMMC_BOOT=3Dy > CONFIG_AXP313_POWER=3Dy > CONFIG_AXP_DCDC3_VOLT=3D1200 > CONFIG_USB_EHCI_HCD=3Dy > diff --git a/configs/x96_mate_defconfig b/configs/x96_mate_defconfig > index bd9b611d6f5..c0628370df9 100644 > --- a/configs/x96_mate_defconfig > +++ b/configs/x96_mate_defconfig > @@ -11,6 +11,7 @@ CONFIG_DRAM_SUNXI_TPR11=3D0xffffdddd > CONFIG_DRAM_SUNXI_TPR12=3D0xfedf7557 > CONFIG_MACH_SUN50I_H616=3Dy > CONFIG_SUNXI_DRAM_H616_DDR3_1333=3Dy > +CONFIG_MMC_SUNXI_SLOT_EXTRA=3D2 > CONFIG_R_I2C_ENABLE=3Dy > # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > CONFIG_SPL_I2C=3Dy >=20