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From: Stefan Agner <stefan@agner.ch>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] cmd: net: flush cache cacheline aligned
Date: Wed, 03 Aug 2016 19:43:24 -0700	[thread overview]
Message-ID: <2a0a0850bbdff7bfc83589686fc4af2e@agner.ch> (raw)
In-Reply-To: <CANr=Z=aKvByJ-OhAmpBH+fBWJDb9TKf-sAtMT=TaDy9=xWYE2g@mail.gmail.com>

On 2016-08-03 16:18, Joe Hershberger wrote:
> On Tue, Aug 2, 2016 at 2:20 AM, Stefan Agner <stefan@agner.ch> wrote:
>> From: Stefan Agner <stefan.agner@toradex.com>
>>
>> Flush loaded data cacheline aligned. This avoids warnings such as
>> CACHE: Misaligned operation at range [81000000, 816d0fa8]
>>
>> Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
>> ---
> 
> This was already rejected once.
> http://lists.denx.de/pipermail/u-boot/2012-April/121564.html

Oh I see, and in the end the message was converted to a debug() call, in
essence turning the whole problem back under a stone... :-)

FWIW, I largely support Mike Frysinger's position in that discussion,
and think it should be fine to flush these extra bytes...

> 
>> Why do we actually have to flush caches after load? It seems to
>> have worked so far despite the caches did not get flushed (due to
>> missalignment).

Btw, I need to correct myself here: flush_dcache ultimately calls
v7_dcache_clean_inval_range, which does not bail out in the unaligned
case. Instead, afaict, it flushes until mva < stop, hence flushes the
last line anyway...

> 
> I'm not sure that we do, but it's been there since as far back as the
> git history goes. Maybe Wolfgang has memory of a reason.

The only reason why it might be preferable to have loaded stuff in main
memory is with nowadays heterogeneous architectures (e.g. i.MX 7 with
its secondary M4 core). In those cases we need to flush caches since
those two cores are no cache coherent. However, I don't think that all
load commands are doing the flush, so not sure if can rely on that
today...

--
Stefan

> 
> -Joe
> 
>> --
>> Stefan
>>
>>  cmd/net.c | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/cmd/net.c b/cmd/net.c
>> index b2f3c7b..540daeb 100644
>> --- a/cmd/net.c
>> +++ b/cmd/net.c
>> @@ -244,7 +244,7 @@ static int netboot_common(enum proto_t proto, cmd_tbl_t *cmdtp, int argc,
>>         }
>>
>>         /* flush cache */
>> -       flush_cache(load_addr, size);
>> +       flush_cache(load_addr, ALIGN(size, CONFIG_SYS_CACHELINE_SIZE));
>>
>>         bootstage_mark(BOOTSTAGE_ID_NET_LOADED);
>>
>> --
>> 2.9.0
>>
>> _______________________________________________
>> U-Boot mailing list
>> U-Boot at lists.denx.de
>> http://lists.denx.de/mailman/listinfo/u-boot

  parent reply	other threads:[~2016-08-04  2:43 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-02  7:20 [U-Boot] [PATCH] cmd: net: flush cache cacheline aligned Stefan Agner
2016-08-03 20:56 ` Fabio Estevam
2016-08-03 22:00 ` Simon Glass
2016-08-03 23:18 ` Joe Hershberger
2016-08-04  1:17   ` Simon Glass
2016-08-04 16:14     ` Joe Hershberger
2016-08-04 17:05       ` Stefan Agner
2016-08-04  2:43   ` Stefan Agner [this message]
2016-08-04 17:46     ` Tom Rini
2016-08-07 17:31       ` Stefan Agner
2016-08-14 20:06 ` [U-Boot] " Tom Rini
2016-08-15  4:40   ` Stefan Agner
2016-08-15 15:57   ` Joe Hershberger

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