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From: Michal Simek <michal.simek@amd.com>
To: u-boot@lists.denx.de, git@xilinx.com,
	Mike Looijmans <mike.looijmans@topic.nl>
Cc: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>,
	Heiko Schocher <hs@denx.de>, Nam Ian <ian.nam@amd.com>,
	Peter Robinson <pbrobinson@gmail.com>,
	Tom Rini <trini@konsulko.com>
Subject: Re: [PATCH] gpio: zynq: Read using DATA register when direction is output
Date: Mon, 2 Jun 2025 09:47:58 +0200	[thread overview]
Message-ID: <2b32ca21-37fa-4226-99ea-5c141376c2a0@amd.com> (raw)
In-Reply-To: <8067946288c687c323403857aff01e3074bcaeca.1744273514.git.michal.simek@amd.com>



On 4/10/25 10:25, Michal Simek wrote:
> From: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
> 
> Gpio status command reads the DATA_RO register rather than
> DATA registers even when the direction is "output", fix this
> by reading from DATA register when direction is "output".
> 
> Signed-off-by: Nam Ian <ian.nam@amd.com>
> Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
> 
>   drivers/gpio/zynq_gpio.c | 15 +++++++++++----
>   1 file changed, 11 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpio/zynq_gpio.c b/drivers/gpio/zynq_gpio.c
> index 7db58c70663e..4fdce39d91b6 100644
> --- a/drivers/gpio/zynq_gpio.c
> +++ b/drivers/gpio/zynq_gpio.c
> @@ -64,6 +64,7 @@
>   /* MSW Mask & Data -WO */
>   #define ZYNQ_GPIO_DATA_MSW_OFFSET(BANK)	(0x004 + (8 * BANK))
>   /* Data Register-RW */
> +#define ZYNQ_GPIO_DATA_OFFSET(BANK)	(0x040 + (4 * BANK))
>   #define ZYNQ_GPIO_DATA_RO_OFFSET(BANK)	(0x060 + (4 * BANK))
>   /* Direction mode reg-RW */
>   #define ZYNQ_GPIO_DIRM_OFFSET(BANK)	(0x204 + (0x40 * BANK))
> @@ -230,7 +231,7 @@ static int check_gpio(unsigned gpio, struct udevice *dev)
>   
>   static int zynq_gpio_get_value(struct udevice *dev, unsigned gpio)
>   {
> -	u32 data;
> +	u32 data, reg;
>   	unsigned int bank_num, bank_pin_num;
>   	struct zynq_gpio_plat *plat = dev_get_plat(dev);
>   
> @@ -239,9 +240,15 @@ static int zynq_gpio_get_value(struct udevice *dev, unsigned gpio)
>   
>   	zynq_gpio_get_bank_pin(gpio, &bank_num, &bank_pin_num, dev);
>   
> -	data = readl(plat->base +
> -			     ZYNQ_GPIO_DATA_RO_OFFSET(bank_num));
> -
> +	reg = readl(plat->base + ZYNQ_GPIO_DIRM_OFFSET(bank_num));
> +	reg &= BIT(bank_pin_num);
> +	if (reg != GPIOF_INPUT) {
> +		data = readl(plat->base +
> +					ZYNQ_GPIO_DATA_OFFSET(bank_num));
> +	} else {
> +		data = readl(plat->base +
> +					ZYNQ_GPIO_DATA_RO_OFFSET(bank_num));
> +	}
>   	return (data >> bank_pin_num) & 1;
>   }
>   

I have looked at Linux kernel and there is different logic. It should be syncup.
Second. I agree with Mike that what we need is to read actual value not really 
value which has been written.

Thanks,
Michal



      parent reply	other threads:[~2025-06-02  7:48 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-04-10  8:25 [PATCH] gpio: zynq: Read using DATA register when direction is output Michal Simek
2025-04-10  9:26 ` Mike Looijmans
2025-04-11  4:08 ` Heiko Schocher
2025-06-02  7:47 ` Michal Simek [this message]

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