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Wed, 26 Nov 2025 11:41:14 +0100 (CET) From: =?utf-8?q?alexander=2Efeilke=40ew=2Etq-group=2Ecom?= In-Reply-To: <20251125163524.GQ2125796@bill-the-cat> Content-Type: text/plain; charset="utf-8" X-Forward: 127.0.0.1 References: <20251125161427.1155-1-Alexander.Feilke@ew.tq-group.com> <20251125163524.GQ2125796@bill-the-cat> Date: Wed, 26 Nov 2025 11:41:14 +0100 Cc: "Simon Glass" , u-boot@lists.denx.de, u-boot@ew.tq-group.com To: "Tom Rini" MIME-Version: 1.0 Message-ID: <2db22e-6926d980-129-2e0bef80@48422766> Subject: =?utf-8?q?Re=3A?= [BUG] silent hangup when debugging =?utf-8?q?lib/fdtdec=2Ec?= User-Agent: SOGoMail 5.12.1 Content-Transfer-Encoding: quoted-printable X-cloud-security-sender: alexander.feilke@ew.tq-group.com X-cloud-security-recipient: u-boot@lists.denx.de X-cloud-security-crypt: load encryption module X-cloud-security-Mailarchiv: E-Mail archived for: alexander.feilke@ew.tq-group.com X-cloud-security-Mailarchivtype: outbound X-cloud-security-Virusscan: CLEAN X-cloud-security-disclaimer: This E-Mail was scanned by E-Mailservice on mx-relay49-hz3.antispameurope.com with 4dGbhB5ZX6z3yYmw X-cloud-security-connect: he-nlb01-hz1.hornetsecurity.com[94.100.132.6], TLS=1, IP=94.100.132.6 X-cloud-security-Digest: 8bb1d2c7ae153f190c506527a427bbf7 X-cloud-security: scantime:2.013 DKIM-Signature: a=rsa-sha256; bh=RN0eUf+LNL+cY77fwHtiX5Yk+cz76kYtwHn6vGTqDQY=; c=relaxed/relaxed; d=ew.tq-group.com; h=content-type:mime-version:subject:from:to:message-id:date; s=hse1; t=1764153682; v=1; b=n7LPkjh1vY9hvxUDqBo+QA+15XbGfiCLCENz6qWQHfbdcKsLHmipGS3gCmGkTIO7aNMUkjHa DNE75c7bn/X7RdgIr5/y9aCTO3+i6m7xvQ7U3bhSCVu88qMjACdqUtKpA9Rj8kN9r+lNa6D0yp3 eCIONiNebgI5TJ5mcU5qkNDcyTeMzYlLyTO86wfwXOElMmf9K+saj43L5FQHZtFa3223j2Oab3N KqMdl3BUNT+r+gJRtgBF3kEjg/F72ErBAut7C8oyROUMTvVpASeAfO22lug64yE7qd/tsJAryKE XiKnfGmsSzfcg9yWNeJjVltcbTcJMTYKTrYSblQJ9exZg== X-Mailman-Approved-At: Wed, 26 Nov 2025 14:01:59 +0100 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On Tuesday, November 25, 2025 17:35 CET, Tom Rini = wrote: > On Tue, Nov 25, 2025 at 05:14:12PM +0100, Alexander Feilke wrote: >=20 > > From: Alexander Feilke > >=20 > > Description: U-Boot hangs silently during boot when enabling DEBUG = in > > lib/fdtdec.c > >=20 > > Not sure if its really a bug or rather a configuration issue on my = side. > >=20 > > Minimal steps to reproduce: > >=20 > > The hang is caused by `panic("FDT overlap");` later inside the if b= lock. > > (see `lib/fdtdec.c:1279` in `fdt=5Ffind=5Fseparate(void)`) > >=20 > > Additionally, no boot log can be seen because serial is initialized= after > > loading the devicetree in this boot stage (see `common/board=5Fr.c:= 665` in > > `initcall=5Frun=5Fr(void)`) > >=20 > > Tested on i.MX6 with configs for tqma6d=5Fmba6 and other tq boards = that aren't, > > mainlined yet (tqma6ulx=5Fmba6ul and tqma7d=5Fmba7). > >=20 > > Any idea what to look for to fix this on our side? > >=20 > > Thanks in advance, > > Alexander >=20 > For very early failures you might need to look at enabling DEBUG=5FUA= RT > which wires in a more direct "just write this to serial port". >=20 > --=20 > Tom Thanks for pointing that out. The debug log shows that the global data = is still located in the SRAM after relocation. Printing all variables involved in the panic condition shows, that the = stack pointer also overflowed, so there appear to be two separate issues. if (top > (void *)gd || top > (void *)&stack=5Fptr) { including top, sp and sys=5Finit=5Fsp=5Faddr for completeness: FDT 8789d3a0 gd 0091de40 top 878a7aa8 sp 878543e7 sys=5Finit=5Fsp=5Faddr 0091ff20 FDT overlap resetting ... System reset not supported on this platform ### ERROR ### Please RESET the board ### Note: I don't use CUSTOM=5FSYS=5FINIT=5FSP=5FADDR so the default is use= d. GENERATED=5FGBL=5FDATA=5FSIZE is 0xe0 #define SYS=5FINIT=5FSP=5FADDR (CFG=5FSYS=5FINIT=5FRAM=5FADDR + CFG=5FS= YS=5FINIT=5FRAM=5FSIZE - GENERATED=5FGBL=5FDATA=5FSIZE) #define CFG=5FSYS=5FINIT=5FRAM=5FADDR IRAM=5FBASE=5FADDR #define CFG=5FSYS=5FINIT=5FRAM=5FSIZE IRAM=5FSIZE Do you have any idea how to address these two problems? Alexander