From mboxrd@z Thu Jan 1 00:00:00 1970 From: Major A Date: Tue, 28 Apr 2020 16:21:25 +0200 Subject: ZynqMP boot: no messages from SPL other than "Debug uart enabled" In-Reply-To: <33d0c9cf-6d9f-a251-2313-0747ff9d6644@xilinx.com> References: <87728a7f-42b5-8e3b-d5a1-5fced9d7601a@xilinx.com> <9bdb2ede-8788-a7ea-cb05-fff3188815d3@gmail.com> <43908655-808a-f646-a361-f7979c783409@xilinx.com> <452c07b7-8cd3-4f55-42dd-d00d9914f446@gmail.com> <11479bdb-ff9b-1a4d-b926-635dd656e221@xilinx.com> <01046131-277a-2dd9-61a8-927cd151b3f6@gmail.com> <63125ad2-d203-bbdb-98fc-342edd9c2ebe@xilinx.com> <9b736ca5-f65c-f901-84a0-7a7505476c95@gmail.com> <9d0dff6b-7905-4bdd-2f3c-6c91a33c59d7@xilinx.com> <584d3902-f6d2-d332-d3de-b7eb949993e2@gmail.com> <0bcc53ed-3244-cd6a-87ed-a9c7f8a6c884@xilinx.com> <601793dd-55af-fde4-0211-0bd475c3ba9a@gmail.com> <32cd61a0-7149-6af1-fac8-7da10c3558fa@xilinx.com> <06f7e484-71b5-c374-3636-c62ef730738f@xilinx.com> <1309ea4e-697d-d9f9-a921-ab8a6a9f4965@gmail.com> <33d0c9cf-6d9f-a251-2313-0747ff9d6644@xilinx.com> Message-ID: <2fd8cf69-9ca4-6126-2bd2-ba1d7987a54e@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Michal, > I am missing here loading pmufw elf file. See below the entire log. Cheers, Andr?s ****** Xilinx System Debugger (XSDB) v2019.2 **** Build date : Nov 6 2019-22:12:26 ** Copyright 1986-2019 Xilinx, Inc. All Rights Reserved. xsdb% source script attempting to launch hw_server ****** Xilinx hw_server v2019.2 **** Build date : Nov 6 2019 at 22:12:23 ** Copyright 1986-2019 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application ****** Xilinx hw_server v2019.2 **** Build date : Nov 6 2019 at 22:12:23 ** Copyright 1986-2019 Xilinx, Inc. All Rights Reserved. INFO: hw_server application started INFO: Use Ctrl-C to exit hw_server application INFO: To connect to this hw_server instance use url: TCP:127.0.0.1:3121 Downloading Program -- C:/home/u-boot/pmufw.elf section, .vectors.reset: 0xffdc0000 - 0xffdc0007 section, .vectors.sw_exception: 0xffdc0008 - 0xffdc000f section, .vectors.interrupt: 0xffdc0010 - 0xffdc0017 section, .vectors.hw_exception: 0xffdc0020 - 0xffdc0027 section, .text: 0xffdc0050 - 0xffdd108b section, .rodata: 0xffdd108c - 0xffdd31a3 section, .data: 0xffdd31a4 - 0xffdd749b section, .sdata2: 0xffdd749c - 0xffdd749f section, .sdata: 0xffdd74a0 - 0xffdd749f section, .sbss: 0xffdd74a0 - 0xffdd749f section, .bss: 0xffdd74a0 - 0xffddb4cb section, .srdata: 0xffddb4cc - 0xffddbdef section, .stack: 0xffddbdf0 - 0xffddcdef section, .xpbr_serv_ext_tbl: 0xffddf6e0 - 0xffddfadf 100% 0MB 0.2MB/s 00:00 Setting PC to Program Start Address 0xffdd02a0 Successfully downloaded C:/home/u-boot/pmufw.elf Info: MicroBlaze PMU (target 13) Running Info: Cortex-A53 #0 (target 9) Stopped at 0xffff0000 (External Debug Request) 100% 0MB 0.2MB/s 00:00 Successfully downloaded C:/home/u-boot/spl/u-boot-spl-dtb.bin Info: Cortex-A53 #0 (target 9) Running Info: Breakpoint 0 status: target 9: {Address: 0xfffcc484 Type: Hardware} xsdb% Info: Cortex-A53 #0 (target 9) Stopped at 0xfffcc484 (Breakpoint) udelay() at lib/time.c: 178 178: couldn't open "/lib/time.c": no such file or directory xsdb% bpremove 0 xsdb% dow -data u-boot.itb 0x10000000 100% 1MB 0.2MB/s 00:08 Successfully downloaded C:/home/u-boot/u-boot.itb xsdb% con Info: Cortex-A53 #0 (target 9) Running xsdb% stop Cannot halt processor core, timeout xsdb% stop Cannot halt processor core, timeout xsdb% ta 1 PS TAP 2 PMU 13 MicroBlaze PMU (Sleeping. No clock) 3 PL 4 PSU 5 RPU (Reset) 6 Cortex-R5 #0 (RPU Reset) 7 Cortex-R5 #1 (RPU Reset) 8 APU 9* Cortex-A53 #0 (Running) 10 Cortex-A53 #1 (Power On Reset) 11 Cortex-A53 #2 (Power On Reset) 12 Cortex-A53 #3 (Power On Reset) xsdb% con Already running xsdb% stop Cannot halt processor core, timeout xsdb% ta 1 PS TAP 2 PMU 13 MicroBlaze PMU (Sleeping. No clock) 3 PL 4 PSU 5 RPU (Reset) 6 Cortex-R5 #0 (RPU Reset) 7 Cortex-R5 #1 (RPU Reset) 8 APU 9* Cortex-A53 #0 (Running) 10 Cortex-A53 #1 (Power On Reset) 11 Cortex-A53 #2 (Power On Reset) 12 Cortex-A53 #3 (Power On Reset) xsdb% rrd r0: N/A r1: N/A r2: N/A r3: N/A r4: N/A r5: N/A r6: N/A r7: N/A r8: N/A r9: N/A r10: N/A r11: N/A r12: N/A r13: N/A r14: N/A r15: N/A r16: N/A r17: N/A r18: N/A r19: N/A r20: N/A r21: N/A r22: N/A r23: N/A r24: N/A r25: N/A r26: N/A r27: N/A r28: N/A r29: N/A r30: N/A sp: N/A pc: 00000000fffc78e4 cpsr: N/A vfp sys dbg acpu_gic xsdb% bt xsdb%