From: Kever Yang <kever.yang@rock-chips.com>
To: Jonas Karlman <jonas@kwiboo.se>,
Ramon Fried <rfried.dev@gmail.com>,
Joe Hershberger <joe.hershberger@ni.com>,
Simon Glass <sjg@chromium.org>,
Banglang Huang <banglang.huang@foxmail.com>
Cc: Trevor Woerner <twoerner@gmail.com>, u-boot@lists.denx.de
Subject: Re: [PATCH 1/2] net: designware: Reset eth phy before phy connect
Date: Thu, 1 Feb 2024 11:08:40 +0800 [thread overview]
Message-ID: <3094002a-5daf-4b9f-bf74-e5b23a34fb2e@rock-chips.com> (raw)
In-Reply-To: <20240118071949.927089-2-jonas@kwiboo.se>
On 2024/1/18 15:19, Jonas Karlman wrote:
> Some ethernet PHY require being reset before a phy-id can be read back
> on the MDIO bus. This can result in the following message being show
> on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY.
>
> Could not get PHY for ethernet@ff540000: addr -1
>
> Add support to designware ethernet driver to reset eth phy by calling
> the eth phy uclass function eth_phy_set_mdio_bus(). The call use NULL
> as bus parameter to not set a shared mdio bus reference that would be
> freed when probe fails. Also add a eth_phy_get_addr() call to try and
> get the phy addr from DT when DM_MDIO is disabled.
>
> This help fix ethernet on Radxa ROCK Pi E v1.21:
>
> => mdio list
> ethernet@ff540000:
> 1 - RealTek RTL8211F <--> ethernet@ff540000
>
> Reported-by: Trevor Woerner <twoerner@gmail.com>
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Thanks,
- Kever
> ---
> drivers/net/designware.c | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/drivers/net/designware.c b/drivers/net/designware.c
> index a174344b3ef5..9aa5d8a1409e 100644
> --- a/drivers/net/designware.c
> +++ b/drivers/net/designware.c
> @@ -13,6 +13,7 @@
> #include <cpu_func.h>
> #include <dm.h>
> #include <errno.h>
> +#include <eth_phy.h>
> #include <log.h>
> #include <miiphy.h>
> #include <malloc.h>
> @@ -576,6 +577,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
> struct phy_device *phydev;
> int ret;
>
> + if (IS_ENABLED(CONFIG_DM_ETH_PHY))
> + eth_phy_set_mdio_bus(dev, NULL);
> +
> #if IS_ENABLED(CONFIG_DM_MDIO)
> phydev = dm_eth_phy_connect(dev);
> if (!phydev)
> @@ -583,6 +587,9 @@ static int dw_phy_init(struct dw_eth_dev *priv, void *dev)
> #else
> int phy_addr = -1;
>
> + if (IS_ENABLED(CONFIG_DM_ETH_PHY))
> + phy_addr = eth_phy_get_addr(dev);
> +
> #ifdef CONFIG_PHY_ADDR
> phy_addr = CONFIG_PHY_ADDR;
> #endif
next prev parent reply other threads:[~2024-02-01 3:09 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-18 7:19 [PATCH 0/2] rockchip: Fix ethernet on Radxa ROCK Pi E v1.21 Jonas Karlman
2024-01-18 7:19 ` [PATCH 1/2] net: designware: Reset eth phy before phy connect Jonas Karlman
2024-02-01 3:08 ` Kever Yang [this message]
2024-01-18 7:19 ` [PATCH 2/2] rockchip: rk3328-rock-pi-e: Enable DM_ETH_PHY and PHY_REALTEK Jonas Karlman
2024-02-01 3:08 ` Kever Yang
2024-01-18 21:00 ` [PATCH 0/2] rockchip: Fix ethernet on Radxa ROCK Pi E v1.21 Trevor Woerner
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