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Mon, 5 Jan 2026 04:30:23 +0000 Received: from AS4P195MB1456.EURP195.PROD.OUTLOOK.COM ([fe80::369c:a760:5bf9:8d4a]) by AS4P195MB1456.EURP195.PROD.OUTLOOK.COM ([fe80::369c:a760:5bf9:8d4a%2]) with mapi id 15.20.9478.004; Mon, 5 Jan 2026 04:30:23 +0000 Message-ID: <30ebbb5c-0237-4da0-be97-b802ea7c0fdc@phytec.de> Date: Mon, 5 Jan 2026 11:29:28 +0700 User-Agent: Mozilla Thunderbird Subject: Re: [Upstream] [PATCH 2/3] board: phytec: Add PHYTEC phyCORE-AM68x/TDA4x SoM To: Dominik Haller , Tom Rini , Manorit Chawdhry Cc: upstream@lists.phytec.de, u-boot@lists.denx.de References: <20251231014255.87648-1-d.haller@phytec.de> <20251231014255.87648-2-d.haller@phytec.de> Content-Language: en-US From: Wadim Egorov In-Reply-To: <20251231014255.87648-2-d.haller@phytec.de> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: KL1PR01CA0033.apcprd01.prod.exchangelabs.com (2603:1096:820:1::21) To AS4P195MB1456.EURP195.PROD.OUTLOOK.COM (2603:10a6:20b:4b3::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS4P195MB1456:EE_|AM4P195MB2989:EE_ X-MS-Office365-Filtering-Correlation-Id: e24dd844-a560-425f-724c-08de4c132422 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Drop this include. Rest looks good to me. Reviewed-by: Wadim Egorov > + > +DECLARE_GLOBAL_DATA_PTR; > + > +phys_addr_t board_get_usable_ram_top(phys_size_t total_size) > +{ > +#ifdef CONFIG_PHYS_64BIT > + /* Limit RAM used by U-Boot to the DDR low region */ > + if (gd->ram_top > 0x100000000) > + return 0x100000000; > +#endif > + > + return gd->ram_top; > +} > + > +int dram_init(void) > +{ > + s32 ret; > + > + ret = fdtdec_setup_mem_size_base_lowest(); > + if (ret) > + printf("Error setting up mem size and base. %d\n", ret); > + > + return ret; > +} > + > +int dram_init_banksize(void) > +{ > + s32 ret; > + > + ret = fdtdec_setup_memory_banksize(); > + if (ret) > + printf("Error setting up memory banksize. %d\n", ret); > + > + return ret; > +} > + > +#if defined(CONFIG_XPL_BUILD) > +void spl_perform_board_fixups(struct spl_image_info *spl_image) > +{ > + if (IS_ENABLED(CONFIG_K3_DDRSS)) { > + if (IS_ENABLED(CONFIG_K3_INLINE_ECC)) > + fixup_ddr_driver_for_ecc(spl_image); > + } else { > + fixup_memory_node(spl_image); > + } > +} > +#endif > + > +void spl_board_init(void) > +{ > + struct udevice *dev; > + int ret; > + > + if (IS_ENABLED(CONFIG_ESM_K3)) { > + const char * const esms[] = {"esm@700000", "esm@40800000", "esm@42080000"}; > + > + for (int i = 0; i < ARRAY_SIZE(esms); ++i) { > + ret = uclass_get_device_by_name(UCLASS_MISC, esms[i], > + &dev); > + if (ret) { > + printf("MISC init for %s failed: %d\n", esms[i], ret); > + break; > + } > + } > + } > + > + if (IS_ENABLED(CONFIG_ESM_PMIC) && ret == 0) { > + ret = uclass_get_device_by_driver(UCLASS_MISC, > + DM_DRIVER_GET(pmic_esm), > + &dev); > + if (ret) > + printf("ESM PMIC init failed: %d\n", ret); > + } > +} > diff --git a/board/phytec/phycore_am68x/phycore_am68x.env b/board/phytec/phycore_am68x/phycore_am68x.env > new file mode 100644 > index 000000000000..4908055b5425 > --- /dev/null > +++ b/board/phytec/phycore_am68x/phycore_am68x.env > @@ -0,0 +1,22 @@ > +fdtaddr=0x88000000 > +loadaddr=0x82000000 > +scriptaddr=0x89100000 > +fdt_addr_r=0x88000000 > +kernel_addr_r=0x82000000 > +ramdisk_addr_r=0x88080000 > +fdtoverlay_addr_r=0x89000000 > +fit_addr_r=0x90000000 > + > +fdtfile=CONFIG_DEFAULT_FDT_FILE > +mmcdev=1 > +mmcroot=2 > +mmcpart=1 > +console=ttyS2,115200n8 > +earlycon=ns16550a,mmio32,0x02880000 > + > +spi_fdt_addr=0x700000 > +spi_image_addr=0x800000 > +spi_ramdisk_addr=0x2200000 > + > +bootmeths=script efi extlinux pxe > +boot_targets=mmc1 mmc0 spi_flash dhcp > diff --git a/board/phytec/phycore_am68x/pm-cfg.yaml b/board/phytec/phycore_am68x/pm-cfg.yaml > new file mode 100644 > index 000000000000..e6496512b6b7 > --- /dev/null > +++ b/board/phytec/phycore_am68x/pm-cfg.yaml > @@ -0,0 +1,12 @@ > +# SPDX-License-Identifier: GPL-2.0+ > +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ > +# > +# Power management configuration for J721S2 > +# > + > +--- > + > +pm-cfg: > + rev: > + boardcfg_abi_maj: 0x0 > + boardcfg_abi_min: 0x1 > diff --git a/board/phytec/phycore_am68x/rm-cfg.yaml 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num_resource: 0 > + type: 17485 > + host_id: 5 > + reserved: 0 > + - > + start_resource: 14 > + num_resource: 9 > + type: 17485 > + host_id: 12 > + reserved: 0 > + - > + start_resource: 23 > + num_resource: 6 > + type: 17485 > + host_id: 13 > + reserved: 0 > + - > + start_resource: 29 > + num_resource: 1 > + type: 17485 > + host_id: 21 > + reserved: 0 > + - > + start_resource: 30 > + num_resource: 1 > + type: 17485 > + host_id: 23 > + reserved: 0 > + - > + start_resource: 31 > + num_resource: 2 > + type: 17485 > + host_id: 35 > + reserved: 0 > + - > + start_resource: 33 > + num_resource: 1 > + type: 17485 > + host_id: 37 > + reserved: 0 > + - > + start_resource: 34 > + num_resource: 1 > + type: 17485 > + host_id: 40 > + reserved: 0 > + - > + start_resource: 35 > + num_resource: 1 > + type: 17485 > + host_id: 42 > + reserved: 0 > + - > + start_resource: 36 > + num_resource: 3 > + type: 17485 > + host_id: 3 > + reserved: 0 > + - > + start_resource: 39 > + num_resource: 2 > + type: 17485 > + host_id: 5 > + reserved: 0 > + - > + start_resource: 41 > + num_resource: 5 > + type: 17485 > + host_id: 128 > + reserved: 0 > + - > + start_resource: 0 > + num_resource: 0 > + type: 17487 > + host_id: 3 > + reserved: 0 > + - > + start_resource: 0 > + num_resource: 2 > + type: 17487 > + host_id: 3 > + reserved: 0 > + - > + start_resource: 22 > + num_resource: 32 > + type: 17610 > + host_id: 12 > + reserved: 0 > + - > + start_resource: 54 > + num_resource: 16 > + type: 17610 > + host_id: 13 > + reserved: 0 > + - > + start_resource: 70 > + num_resource: 8 > + type: 17610 > + host_id: 21 > + reserved: 0 > + - > + start_resource: 78 > + num_resource: 8 > + type: 17610 > + host_id: 23 > + reserved: 0 > + - > + start_resource: 86 > + num_resource: 24 > + type: 17610 > + host_id: 35 > + reserved: 0 > + - > + start_resource: 110 > + num_resource: 8 > + type: 17610 > + host_id: 37 > + reserved: 0 > + - > + start_resource: 118 > + num_resource: 16 > + type: 17610 > + host_id: 40 > + reserved: 0 > + - > + start_resource: 134 > + num_resource: 16 > + type: 17610 > + host_id: 42 > + reserved: 0 > + - > + start_resource: 150 > + num_resource: 64 > + type: 17610 > + host_id: 3 > + reserved: 0 > + - > + start_resource: 214 > + num_resource: 4 > + type: 17610 > + host_id: 5 > + reserved: 0 > + - > + start_resource: 218 > + num_resource: 38 > + type: 17610 > + host_id: 128 > + reserved: 0 > + - > + start_resource: 16406 > + num_resource: 128 > + type: 17613 > + host_id: 12 > + reserved: 0 > + - > + start_resource: 16534 > + num_resource: 128 > + type: 17613 > + host_id: 13 > + reserved: 0 > + - > + start_resource: 16662 > + num_resource: 64 > + type: 17613 > + host_id: 21 > + reserved: 0 > + - > + start_resource: 16726 > + num_resource: 64 > + type: 17613 > + host_id: 23 > + reserved: 0 > + - > + start_resource: 16790 > + num_resource: 128 > + type: 17613 > + host_id: 35 > + reserved: 0 > + - > + start_resource: 16918 > + num_resource: 128 > + type: 17613 > + host_id: 37 > + reserved: 0 > + - > + start_resource: 17046 > + num_resource: 128 > + type: 17613 > + host_id: 40 > + reserved: 0 > + - > + start_resource: 17174 > + num_resource: 128 > + type: 17613 > + host_id: 42 > + reserved: 0 > + - > + start_resource: 17302 > + num_resource: 256 > + type: 17613 > + host_id: 3 > + reserved: 0 > + - > + start_resource: 17558 > + num_resource: 64 > + type: 17613 > + host_id: 5 > + reserved: 0 > + - > + start_resource: 17622 > + num_resource: 298 > + type: 17613 > + host_id: 128 > + reserved: 0 > diff --git a/board/phytec/phycore_am68x/sec-cfg.yaml b/board/phytec/phycore_am68x/sec-cfg.yaml > new file mode 100644 > index 000000000000..020299186131 > --- /dev/null > +++ b/board/phytec/phycore_am68x/sec-cfg.yaml > @@ -0,0 +1,379 @@ > +# SPDX-License-Identifier: GPL-2.0+ > +# Copyright (C) 2022-2023 Texas Instruments Incorporated - https://www.ti.com/ > +# > +# Security management configuration for J721S2 > +# > + > +--- > + > +sec-cfg: > + rev: > + boardcfg_abi_maj: 0x0 > + boardcfg_abi_min: 0x1 > + processor_acl_list: > + subhdr: > + magic: 0xF1EA > + size: 164 > + proc_acl_entries: > + - # 1 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 2 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 3 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 4 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 5 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 6 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 7 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 8 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 9 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 10 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 11 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 12 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 13 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 14 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 15 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 16 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 17 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 18 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 19 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 20 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 21 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 22 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 23 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 24 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 25 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 26 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 27 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 28 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 29 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 30 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 31 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + - # 32 > + processor_id: 0 > + proc_access_master: 0 > + proc_access_secondary: [0, 0, 0] > + host_hierarchy: > + subhdr: > + magic: 0x8D27 > + size: 68 > + host_hierarchy_entries: > + - # 1 > + host_id: 0 > + supervisor_host_id: 0 > + - # 2 > + host_id: 0 > + supervisor_host_id: 0 > + - # 3 > + host_id: 0 > + supervisor_host_id: 0 > + - # 4 > + host_id: 0 > + supervisor_host_id: 0 > + - # 5 > + host_id: 0 > + supervisor_host_id: 0 > + - # 6 > + host_id: 0 > + supervisor_host_id: 0 > + - # 7 > + host_id: 0 > + supervisor_host_id: 0 > + - # 8 > + host_id: 0 > + supervisor_host_id: 0 > + - # 9 > + host_id: 0 > + supervisor_host_id: 0 > + - # 10 > + host_id: 0 > + supervisor_host_id: 0 > + - # 11 > + host_id: 0 > + supervisor_host_id: 0 > + - # 12 > + host_id: 0 > + supervisor_host_id: 0 > + - # 13 > + host_id: 0 > + supervisor_host_id: 0 > + - # 14 > + host_id: 0 > + supervisor_host_id: 0 > + - # 15 > + host_id: 0 > + supervisor_host_id: 0 > + - # 16 > + host_id: 0 > + supervisor_host_id: 0 > + - # 17 > + host_id: 0 > + supervisor_host_id: 0 > + - # 18 > + host_id: 0 > + supervisor_host_id: 0 > + - # 19 > + host_id: 0 > + supervisor_host_id: 0 > + - # 20 > + host_id: 0 > + supervisor_host_id: 0 > + - # 21 > + host_id: 0 > + supervisor_host_id: 0 > + - # 22 > + host_id: 0 > + supervisor_host_id: 0 > + - # 23 > + host_id: 0 > + supervisor_host_id: 0 > + - # 24 > + host_id: 0 > + supervisor_host_id: 0 > + - # 25 > + host_id: 0 > + supervisor_host_id: 0 > + - # 26 > + host_id: 0 > + supervisor_host_id: 0 > + - # 27 > + host_id: 0 > + supervisor_host_id: 0 > + - # 28 > + host_id: 0 > + supervisor_host_id: 0 > + - # 29 > + host_id: 0 > + supervisor_host_id: 0 > + - # 30 > + host_id: 0 > + supervisor_host_id: 0 > + - # 31 > + host_id: 0 > + supervisor_host_id: 0 > + - # 32 > + host_id: 0 > + supervisor_host_id: 0 > + otp_config: > + subhdr: > + magic: 0x4081 > + size: 69 > + otp_entry: > + - # 1 > + host_id: 0 > + host_perms: 0 > + - # 2 > + host_id: 0 > + host_perms: 0 > + - # 3 > + host_id: 0 > + host_perms: 0 > + - # 4 > + host_id: 0 > + host_perms: 0 > + - # 5 > + host_id: 0 > + host_perms: 0 > + - # 6 > + host_id: 0 > + host_perms: 0 > + - # 7 > + host_id: 0 > + host_perms: 0 > + - # 8 > + host_id: 0 > + host_perms: 0 > + - # 9 > + host_id: 0 > + host_perms: 0 > + - # 10 > + host_id: 0 > + host_perms: 0 > + - # 11 > + host_id: 0 > + host_perms: 0 > + - # 12 > + host_id: 0 > + host_perms: 0 > + - # 13 > + host_id: 0 > + host_perms: 0 > + - # 14 > + host_id: 0 > + host_perms: 0 > + - # 15 > + host_id: 0 > + host_perms: 0 > + - # 16 > + host_id: 0 > + host_perms: 0 > + - # 17 > + host_id: 0 > + host_perms: 0 > + - # 18 > + host_id: 0 > + host_perms: 0 > + - # 19 > + host_id: 0 > + host_perms: 0 > + - # 20 > + host_id: 0 > + host_perms: 0 > + - # 21 > + host_id: 0 > + host_perms: 0 > + - # 22 > + host_id: 0 > + host_perms: 0 > + - # 23 > + host_id: 0 > + host_perms: 0 > + - # 24 > + host_id: 0 > + host_perms: 0 > + - # 25 > + host_id: 0 > + host_perms: 0 > + - # 26 > + host_id: 0 > + host_perms: 0 > + - # 27 > + host_id: 0 > + host_perms: 0 > + - # 28 > + host_id: 0 > + host_perms: 0 > + - # 29 > + host_id: 0 > + host_perms: 0 > + - # 30 > + host_id: 0 > + host_perms: 0 > + - # 31 > + host_id: 0 > + host_perms: 0 > + - # 32 > + host_id: 0 > + host_perms: 0 > + write_host_id: 0 > + dkek_config: > + subhdr: > + magic: 0x5170 > + size: 12 > + allowed_hosts: [128, 0, 0, 0] > + allow_dkek_export_tisci: 0x5A > + rsvd: [0, 0, 0] > + sa2ul_cfg: > + subhdr: > + magic: 0x23BE > + size: 0 > + auth_resource_owner: 0 > + enable_saul_psil_global_config_writes: 0 > + rsvd: [0, 0] > + sec_dbg_config: > + subhdr: > + magic: 0x42AF > + size: 16 > + allow_jtag_unlock: 0x0 > + allow_wildcard_unlock: 0x0 > + allowed_debug_level_rsvd: 0 > + rsvd: 0 > + min_cert_rev: 0x0 > + jtag_unlock_hosts: [0, 0, 0, 0] > + sec_handover_cfg: > + subhdr: > + magic: 0x608F > + size: 10 > + handover_msg_sender: 0 > + handover_to_host_id: 0 > + rsvd: [0, 0, 0, 0] > diff --git a/configs/phycore_am68x_a72_defconfig b/configs/phycore_am68x_a72_defconfig > new file mode 100644 > index 000000000000..22ad5c3d6eec > --- /dev/null > +++ b/configs/phycore_am68x_a72_defconfig > @@ -0,0 +1,204 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_K3=y > +CONFIG_SYS_MALLOC_F_LEN=0x8000 > +CONFIG_SPL_GPIO=y > +CONFIG_SPL_LIBCOMMON_SUPPORT=y > +CONFIG_SPL_LIBGENERIC_SUPPORT=y > +CONFIG_SOC_K3_J721S2=y > +CONFIG_PHYTEC_SOM_DETECTION=y > +CONFIG_PHYTEC_SOM_DETECTION_BLOCKS=y > +CONFIG_TARGET_PHYCORE_AM68X_A72=y > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 > +CONFIG_SF_DEFAULT_SPEED=25000000 > +CONFIG_ENV_SIZE=0x20000 > +CONFIG_ENV_OFFSET=0x680000 > +CONFIG_ENV_SECT_SIZE=0x20000 > +CONFIG_DM_GPIO=y > +CONFIG_SPL_DM_SPI=y > +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am68-phyboard-izar" > +CONFIG_OF_LIBFDT_OVERLAY=y > +CONFIG_DM_RESET=y > +CONFIG_SPL_MMC=y > +CONFIG_SPL_SERIAL=y > +CONFIG_SPL_DRIVERS_MISC=y > +CONFIG_SPL_STACK_R_ADDR=0x82000000 > +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y > +CONFIG_SPL_BSS_START_ADDR=0x80a00000 > +CONFIG_SPL_BSS_MAX_SIZE=0x80000 > +CONFIG_SPL_STACK_R=y > +CONFIG_ENV_OFFSET_REDUND=0x6c0000 > +CONFIG_SPL_FS_FAT=y > +CONFIG_SPL_LIBDISK_SUPPORT=y > +CONFIG_SPL_SPI_FLASH_SUPPORT=y > +CONFIG_SPL_SPI=y > +# CONFIG_PSCI_RESET is not set > +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > +CONFIG_SPL_LOAD_FIT=y > +CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 > +CONFIG_BOOTSTD_FULL=y > +CONFIG_OF_SYSTEM_SETUP=y > +CONFIG_BOOTCOMMAND="bootflow scan -lb; run ${boot}boot" > +CONFIG_DEFAULT_FDT_FILE="oftree" > +CONFIG_LOGLEVEL=7 > +# CONFIG_BOARD_INIT is not set > +CONFIG_SPL_MAX_SIZE=0xc0000 > +CONFIG_SPL_BOARD_INIT=y > +CONFIG_SPL_SYS_MALLOC_SIMPLE=y > +CONFIG_SPL_SYS_MALLOC=y > +CONFIG_SPL_SYS_MALLOC_SIZE=0x800000 > +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y > +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 > +CONFIG_SPL_DMA=y > +CONFIG_SPL_ENV_SUPPORT=y > +CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" > +CONFIG_SPL_I2C=y > +CONFIG_SPL_DM_MAILBOX=y > +CONFIG_SPL_MTD=y > +CONFIG_SPL_DM_SPI_FLASH=y > +CONFIG_SPL_NOR_SUPPORT=y > +CONFIG_SPL_DM_RESET=y > +CONFIG_SPL_POWER_DOMAIN=y > +CONFIG_SPL_RAM_DEVICE=y > +# CONFIG_SPL_SPI_FLASH_TINY is not set > +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y > +CONFIG_SPL_SPI_LOAD=y > +CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 > +CONFIG_SPL_THERMAL=y > +CONFIG_SPL_YMODEM_SUPPORT=y > +CONFIG_CMD_BOOTEFI_SELFTEST=y > +CONFIG_CMD_NVEDIT_EFI=y > +CONFIG_CMD_DFU=y > +# CONFIG_CMD_FLASH is not set > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_I2C=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_MTD=y > +CONFIG_CMD_USB=y > +CONFIG_CMD_USB_MASS_STORAGE=y > +CONFIG_CMD_CACHE=y > +CONFIG_CMD_EFIDEBUG=y > +CONFIG_CMD_SMC=y > +CONFIG_CMD_UBI=y > +# CONFIG_ISO_PARTITION is not set > +# CONFIG_SPL_EFI_PARTITION is not set > +CONFIG_OF_CONTROL=y > +CONFIG_SPL_OF_CONTROL=y > +CONFIG_SPL_MULTI_DTB_FIT=y > +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y > +CONFIG_ENV_OVERWRITE=y > +CONFIG_ENV_IS_NOWHERE=y > +CONFIG_ENV_IS_IN_MMC=y > +CONFIG_ENV_IS_IN_SPI_FLASH=y > +CONFIG_ENV_REDUNDANT=y > +CONFIG_ENV_RELOC_GD_ENV_ADDR=y > +CONFIG_ENV_MMC_DEVICE_INDEX=1 > +CONFIG_NET_RANDOM_ETHADDR=y > +CONFIG_SPL_DM=y > +CONFIG_SPL_DM_DEVICE_REMOVE=y > +CONFIG_SPL_DM_SEQ_ALIAS=y > +CONFIG_REGMAP=y > +CONFIG_SPL_REGMAP=y > +CONFIG_SPL_OF_TRANSLATE=y > +CONFIG_CLK=y > +CONFIG_SPL_CLK=y > +CONFIG_CLK_CCF=y > +CONFIG_CLK_TI_SCI=y > +CONFIG_DFU_MMC=y > +CONFIG_DFU_RAM=y > +CONFIG_DFU_SF=y > +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 > +CONFIG_SYS_DFU_MAX_FILE_SIZE=0x800000 > +CONFIG_DMA_CHANNELS=y > +CONFIG_TI_K3_NAVSS_UDMA=y > +CONFIG_USB_FUNCTION_FASTBOOT=y > +CONFIG_FASTBOOT_BUF_ADDR=0x82000000 > +CONFIG_FASTBOOT_BUF_SIZE=0x2F000000 > +CONFIG_FASTBOOT_FLASH=y > +CONFIG_FASTBOOT_FLASH_MMC_DEV=0 > +CONFIG_TI_SCI_PROTOCOL=y > +CONFIG_DA8XX_GPIO=y > +CONFIG_DM_PCA953X=y > +CONFIG_DM_I2C=y > +CONFIG_DM_I2C_GPIO=y > +CONFIG_SYS_I2C_OMAP24XX=y > +CONFIG_DM_MAILBOX=y > +CONFIG_K3_SEC_PROXY=y > +CONFIG_SUPPORT_EMMC_BOOT=y > +CONFIG_MMC_IO_VOLTAGE=y > +CONFIG_MMC_UHS_SUPPORT=y > +CONFIG_MMC_HS400_SUPPORT=y > +CONFIG_SPL_MMC_HS400_SUPPORT=y > +CONFIG_MMC_SDHCI=y > +CONFIG_MMC_SDHCI_ADMA=y > +CONFIG_SPL_MMC_SDHCI_ADMA=y > +CONFIG_MMC_SDHCI_AM654=y > +CONFIG_MTD=y > +CONFIG_DM_MTD=y > +CONFIG_MTD_NOR_FLASH=y > +CONFIG_FLASH_SHOW_PROGRESS=0 > +CONFIG_CFI_FLASH=y > +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y > +CONFIG_FLASH_CFI_MTD=y > +CONFIG_SYS_FLASH_CFI=y > +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y > +CONFIG_DM_SPI_FLASH=y > +CONFIG_SPI_FLASH_SFDP_SUPPORT=y > +CONFIG_SPI_FLASH_SOFT_RESET=y > +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y > +CONFIG_SPI_FLASH_SPANSION=y > +CONFIG_SPI_FLASH_S28HX_T=y > +CONFIG_SPI_FLASH_STMICRO=y > +CONFIG_SPI_FLASH_MT35XU=y > +# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set > +CONFIG_SPI_FLASH_MTD=y > +CONFIG_MULTIPLEXER=y > +CONFIG_MUX_MMIO=y > +CONFIG_PHY_TI_DP83867=y > +CONFIG_PHY_FIXED=y > +CONFIG_TI_AM65_CPSW_NUSS=y > +CONFIG_PHY=y > +CONFIG_SPL_PHY=y > +CONFIG_PHY_CADENCE_TORRENT=y > +CONFIG_PHY_J721E_WIZ=y > +CONFIG_PINCTRL=y > +# CONFIG_PINCTRL_GENERIC is not set > +CONFIG_SPL_PINCTRL=y > +# CONFIG_SPL_PINCTRL_GENERIC is not set > +CONFIG_PINCTRL_SINGLE=y > +CONFIG_POWER_DOMAIN=y > +CONFIG_TI_SCI_POWER_DOMAIN=y > +CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_FIXED=y > +CONFIG_DM_REGULATOR_GPIO=y > +CONFIG_RAM=y > +CONFIG_SPL_RAM=y > +CONFIG_RESET_TI_SCI=y > +CONFIG_SCSI=y > +CONFIG_DM_SERIAL=y > +CONFIG_SOC_DEVICE=y > +CONFIG_SOC_DEVICE_TI_K3=y > +CONFIG_SOC_TI=y > +CONFIG_SPI=y > +CONFIG_DM_SPI=y > +CONFIG_CADENCE_QSPI=y > +CONFIG_HAS_CQSPI_REF_CLK=y > +CONFIG_CQSPI_REF_CLK=133333333 > +CONFIG_SYSRESET=y > +CONFIG_SPL_SYSRESET=y > +CONFIG_SYSRESET_TI_SCI=y > +CONFIG_DM_THERMAL=y > +CONFIG_USB=y > +CONFIG_DM_USB_GADGET=y > +CONFIG_SPL_DM_USB_GADGET=y > +CONFIG_USB_XHCI_HCD=y > +CONFIG_USB_CDNS3=y > +CONFIG_USB_CDNS3_GADGET=y > +CONFIG_USB_CDNS3_HOST=y > +CONFIG_SPL_USB_CDNS3_GADGET=y > +CONFIG_USB_GADGET=y > +CONFIG_SPL_USB_GADGET=y > +CONFIG_USB_GADGET_MANUFACTURER="PHYTEC" > +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 > +CONFIG_USB_GADGET_PRODUCT_NUM=0x6168 > +CONFIG_SPL_DFU=y > diff --git a/configs/phycore_am68x_r5_defconfig b/configs/phycore_am68x_r5_defconfig > new file mode 100644 > index 000000000000..e941c340488b > --- /dev/null > +++ b/configs/phycore_am68x_r5_defconfig > @@ -0,0 +1,184 @@ > +CONFIG_ARM=y > +CONFIG_ARCH_K3=y > +CONFIG_SYS_MALLOC_F_LEN=0x10000 > +CONFIG_SPL_GPIO=y > +CONFIG_SPL_LIBCOMMON_SUPPORT=y > +CONFIG_SPL_LIBGENERIC_SUPPORT=y > +CONFIG_SOC_K3_J721S2=y > +CONFIG_K3_EARLY_CONS=y > +CONFIG_K3_QOS=y > +CONFIG_TARGET_PHYCORE_AM68X_R5=y > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c76000 > +CONFIG_SF_DEFAULT_SPEED=25000000 > +CONFIG_ENV_SIZE=0x20000 > +CONFIG_DM_GPIO=y > +CONFIG_SPL_DM_SPI=y > +CONFIG_DEFAULT_DEVICE_TREE="k3-am68-r5-phycore-som-4gb" > +CONFIG_DM_RESET=y > +CONFIG_SPL_MMC=y > +CONFIG_SPL_SERIAL=y > +CONFIG_SPL_DRIVERS_MISC=y > +CONFIG_SPL_STACK_R_ADDR=0x82000000 > +CONFIG_SPL_TEXT_BASE=0x41c00000 > +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y > +CONFIG_SPL_BSS_START_ADDR=0x41c76000 > +CONFIG_SPL_BSS_MAX_SIZE=0xa000 > +CONFIG_SPL_STACK_R=y > +CONFIG_SPL_SIZE_LIMIT=0x80000 > +CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x4000 > +CONFIG_SPL_FS_FAT=y > +CONFIG_SPL_LIBDISK_SUPPORT=y > +CONFIG_SPL_SPI_FLASH_SUPPORT=y > +CONFIG_SPL_SPI=y > +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set > +CONFIG_SPL_LOAD_FIT=y > +CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 > +CONFIG_USE_BOOTCOMMAND=y > +# CONFIG_DISPLAY_CPUINFO is not set > +# CONFIG_BOARD_INIT is not set > +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y > +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y > +CONFIG_SPL_MAX_SIZE=0xc0000 > +CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y > +CONFIG_SPL_BOARD_INIT=y > +CONFIG_SPL_SYS_MALLOC_SIMPLE=y > +CONFIG_SPL_SEPARATE_BSS=y > +CONFIG_SPL_SYS_MALLOC=y > +CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y > +CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x84000000 > +CONFIG_SPL_SYS_MALLOC_SIZE=0x1000000 > +CONFIG_SPL_EARLY_BSS=y > +CONFIG_SPL_SYS_MMCSD_RAW_MODE=y > +CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 > +CONFIG_SPL_DMA=y > +CONFIG_CMD_ASKENV=y > +CONFIG_ENV_MMC_EMMC_HW_PARTITION=1 > +CONFIG_SPL_ENV_SUPPORT=y > +CONFIG_SPL_FS_EXT4=y > +CONFIG_SPL_I2C=y > +CONFIG_SPL_DM_MAILBOX=y > +CONFIG_SPL_MTD=y > +CONFIG_SPL_DM_SPI_FLASH=y > +CONFIG_SPL_NOR_SUPPORT=y > +CONFIG_SPL_DM_RESET=y > +CONFIG_SPL_POWER_DOMAIN=y > +CONFIG_SPL_RAM_DEVICE=y > +# CONFIG_SPL_SPI_FLASH_TINY is not set > +CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y > +CONFIG_SPL_SPI_LOAD=y > +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 > +CONFIG_SPL_THERMAL=y > +CONFIG_SPL_YMODEM_SUPPORT=y > +CONFIG_HUSH_PARSER=y > +CONFIG_CMD_DFU=y > +# CONFIG_CMD_FLASH is not set > +CONFIG_CMD_GPT=y > +CONFIG_CMD_MMC=y > +# CONFIG_CMD_SETEXPR is not set > +CONFIG_CMD_TIME=y > +CONFIG_CMD_FAT=y > +CONFIG_OF_CONTROL=y > +CONFIG_SPL_OF_CONTROL=y > +CONFIG_SPL_MULTI_DTB_FIT=y > +CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y > +CONFIG_ENV_OVERWRITE=y > +CONFIG_ENV_RELOC_GD_ENV_ADDR=y > +CONFIG_SPL_DM=y > +CONFIG_SPL_DM_DEVICE_REMOVE=y > +CONFIG_SPL_DM_SEQ_ALIAS=y > +CONFIG_REGMAP=y > +CONFIG_SPL_REGMAP=y > +CONFIG_SYSCON=y > +CONFIG_SPL_SYSCON=y > +CONFIG_SPL_OF_TRANSLATE=y > +CONFIG_CLK=y > +CONFIG_SPL_CLK=y > +CONFIG_SPL_CLK_CCF=y > +CONFIG_SPL_CLK_K3_PLL=y > +CONFIG_SPL_CLK_K3=y > +CONFIG_SYS_DFU_DATA_BUF_SIZE=0x40000 > +CONFIG_DMA_CHANNELS=y > +CONFIG_TI_K3_NAVSS_UDMA=y > +CONFIG_TI_SCI_PROTOCOL=y > +CONFIG_DA8XX_GPIO=y > +CONFIG_DM_PCA953X=y > +CONFIG_DM_I2C=y > +CONFIG_I2C_SET_DEFAULT_BUS_NUM=y > +CONFIG_SYS_I2C_OMAP24XX=y > +CONFIG_DM_MAILBOX=y > +CONFIG_K3_SEC_PROXY=y > +CONFIG_FS_LOADER=y > +CONFIG_SPL_FS_LOADER=y > +CONFIG_K3_AVS0=y > +CONFIG_SUPPORT_EMMC_BOOT=y > +CONFIG_SPL_MMC_HS400_SUPPORT=y > +CONFIG_MMC_SDHCI=y > +CONFIG_SPL_MMC_SDHCI_ADMA=y > +CONFIG_MMC_SDHCI_AM654=y > +CONFIG_MTD=y > +CONFIG_DM_MTD=y > +CONFIG_MTD_NOR_FLASH=y > +CONFIG_FLASH_SHOW_PROGRESS=0 > +CONFIG_CFI_FLASH=y > +CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y > +CONFIG_FLASH_CFI_MTD=y > +CONFIG_SYS_FLASH_CFI=y > +CONFIG_SYS_MAX_FLASH_BANKS_DETECT=y > +CONFIG_DM_SPI_FLASH=y > +CONFIG_SPI_FLASH_SFDP_SUPPORT=y > +CONFIG_SPI_FLASH_SOFT_RESET=y > +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y > +CONFIG_SPI_FLASH_SPANSION=y > +CONFIG_SPI_FLASH_S28HX_T=y > +CONFIG_SPI_FLASH_STMICRO=y > +CONFIG_SPI_FLASH_MT35XU=y > +CONFIG_PINCTRL=y > +# CONFIG_PINCTRL_GENERIC is not set > +CONFIG_SPL_PINCTRL=y > +# CONFIG_SPL_PINCTRL_GENERIC is not set > +CONFIG_PINCTRL_SINGLE=y > +CONFIG_POWER_DOMAIN=y > +CONFIG_TI_POWER_DOMAIN=y > +CONFIG_DM_PMIC=y > +CONFIG_PMIC_TPS65941=y > +CONFIG_DM_REGULATOR=y > +CONFIG_SPL_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_TPS65941=y > +CONFIG_K3_SYSTEM_CONTROLLER=y > +CONFIG_RESET_TI_SCI=y > +CONFIG_DM_SERIAL=y > +CONFIG_SOC_DEVICE=y > +CONFIG_SOC_DEVICE_TI_K3=y > +CONFIG_SOC_TI=y > +CONFIG_SPI=y > +CONFIG_DM_SPI=y > +CONFIG_CADENCE_QSPI=y > +CONFIG_HAS_CQSPI_REF_CLK=y > +CONFIG_CQSPI_REF_CLK=133333333 > +CONFIG_SYSRESET=y > +CONFIG_SPL_SYSRESET=y > +CONFIG_SYSRESET_TI_SCI=y > +CONFIG_DM_THERMAL=y > +CONFIG_TIMER=y > +CONFIG_SPL_TIMER=y > +CONFIG_OMAP_TIMER=y > +CONFIG_USB=y > +CONFIG_PHYTEC_SOM_DETECTION=y > +CONFIG_DM_USB_GADGET=y > +CONFIG_SPL_DM_USB_GADGET=y > +CONFIG_USB_CDNS3=y > +CONFIG_USB_CDNS3_GADGET=y > +CONFIG_SPL_USB_CDNS3_GADGET=y > +CONFIG_USB_GADGET=y > +CONFIG_SPL_USB_GADGET=y > +CONFIG_USB_GADGET_MANUFACTURER="PHYTEC" > +CONFIG_USB_GADGET_VENDOR_NUM=0x0451 > +CONFIG_USB_GADGET_PRODUCT_NUM=0x6168 > +CONFIG_USB_GADGET_DOWNLOAD=y > +CONFIG_SPL_DFU=y > +CONFIG_FS_EXT4=y > +CONFIG_FS_FAT_MAX_CLUSTSIZE=16384 > +CONFIG_PANIC_HANG=y > +CONFIG_LIB_RATIONAL=y > +CONFIG_SPL_LIB_RATIONAL=y > diff --git a/include/configs/phycore_am68x.h b/include/configs/phycore_am68x.h > new file mode 100644 > index 000000000000..341c3ff4a315 > --- /dev/null > +++ b/include/configs/phycore_am68x.h > @@ -0,0 +1,25 @@ > +/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT */ > +/* > + * Configuration header file for PHYTEC phyCORE-AM68x > + * > + */ > + > +#ifndef __PHYCORE_AM68X_H > +#define __PHYCORE_AM68X_H > + > +/* DDR Configuration */ > +#define CFG_SYS_SDRAM_BASE 0x80000000 > + > +/* SPL Loader Configuration */ > +#if defined(CONFIG_TARGET_PHYCORE_AM68X_A72) > +#define CFG_SYS_UBOOT_BASE 0x50280000 > +/* Image load address in RAM for DFU boot*/ > +#else > +#define CFG_SYS_UBOOT_BASE 0x50080000 > +#endif > + > +#define PHYCORE_AM6XX_FW_NAME_TIBOOT3 u"PHYCORE_AM68X_TIBOOT3" > +#define PHYCORE_AM6XX_FW_NAME_SPL u"PHYCORE_AM68X_SPL" > +#define PHYCORE_AM6XX_FW_NAME_UBOOT u"PHYCORE_AM68X_UBOOT" > + > +#endif /* __PHYCORE_AM62AX_H */