From: Michal Simek <michal.simek@amd.com>
To: u-boot@lists.denx.de, git@xilinx.com
Cc: Ashok Reddy Soma <ashok.reddy.soma@amd.com>,
Marek Vasut <marek.vasut+renesas@mailbox.org>,
Martyn Welch <martyn.welch@collabora.com>,
Prasad Kummari <prasad.kummari@amd.com>,
Simon Glass <sjg@chromium.org>,
Svyatoslav Ryhel <clamor95@gmail.com>,
Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>,
Tom Rini <trini@konsulko.com>,
Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com>
Subject: Re: [PATCH] xilinx: Enable SIMPLE_PM_BUS
Date: Fri, 6 Sep 2024 08:54:21 +0200 [thread overview]
Message-ID: <33797fdc-dc3c-4156-89df-65c19c07439e@amd.com> (raw)
In-Reply-To: <b9f4bb85be502616edf3be2b79e52a0e2c03e821.1725349691.git.michal.simek@amd.com>
On 9/3/24 09:48, Michal Simek wrote:
> Enable simple-pm-bus driver to handle case where axi bus coming between PS
> (fixed) part to PL (programmable) part has own clock or power domain.
> That's why enable driver to be ready for this configuration.
>
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
>
> configs/amd_versal2_virt_defconfig | 1 +
> configs/xilinx_versal_net_virt_defconfig | 1 +
> configs/xilinx_versal_virt_defconfig | 1 +
> configs/xilinx_zynq_virt_defconfig | 2 ++
> configs/xilinx_zynqmp_kria_defconfig | 1 +
> configs/xilinx_zynqmp_virt_defconfig | 1 +
> 6 files changed, 7 insertions(+)
>
> diff --git a/configs/amd_versal2_virt_defconfig b/configs/amd_versal2_virt_defconfig
> index c4bf77186cd5..78f6ffcc3a74 100644
> --- a/configs/amd_versal2_virt_defconfig
> +++ b/configs/amd_versal2_virt_defconfig
> @@ -72,6 +72,7 @@ CONFIG_NETCONSOLE=y
> CONFIG_IP_DEFRAG=y
> CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
> CONFIG_TFTP_BLOCKSIZE=4096
> +CONFIG_SIMPLE_PM_BUS=y
> CONFIG_CLK_CCF=y
> CONFIG_CLK_SCMI=y
> CONFIG_DFU_RAM=y
> diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig
> index 40a9b16b9cf5..776af9ae29fe 100644
> --- a/configs/xilinx_versal_net_virt_defconfig
> +++ b/configs/xilinx_versal_net_virt_defconfig
> @@ -73,6 +73,7 @@ CONFIG_NETCONSOLE=y
> CONFIG_IP_DEFRAG=y
> CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
> CONFIG_TFTP_BLOCKSIZE=4096
> +CONFIG_SIMPLE_PM_BUS=y
> CONFIG_CLK_VERSAL=y
> CONFIG_DFU_RAM=y
> CONFIG_ARM_FFA_TRANSPORT=y
> diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig
> index dc1754f6d18a..0d4591411e1e 100644
> --- a/configs/xilinx_versal_virt_defconfig
> +++ b/configs/xilinx_versal_virt_defconfig
> @@ -72,6 +72,7 @@ CONFIG_NETCONSOLE=y
> CONFIG_IP_DEFRAG=y
> CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
> CONFIG_TFTP_BLOCKSIZE=4096
> +CONFIG_SIMPLE_PM_BUS=y
> CONFIG_CLK_VERSAL=y
> CONFIG_DFU_TIMEOUT=y
> CONFIG_DFU_RAM=y
> diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig
> index f8b6a3f1aa2a..b2921df1d0da 100644
> --- a/configs/xilinx_zynq_virt_defconfig
> +++ b/configs/xilinx_zynq_virt_defconfig
> @@ -94,6 +94,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
> CONFIG_NETCONSOLE=y
> CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
> CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_SIMPLE_PM_BUS=y
> CONFIG_DFU_TIMEOUT=y
> CONFIG_DFU_MMC=y
> CONFIG_DFU_RAM=y
> @@ -138,6 +139,7 @@ CONFIG_PHY_XILINX=y
> CONFIG_DM_ETH_PHY=y
> CONFIG_MII=y
> CONFIG_ZYNQ_GEM=y
> +CONFIG_POWER_DOMAIN=y
> CONFIG_ARM_DCC=y
> CONFIG_ZYNQ_SERIAL=y
> CONFIG_ZYNQ_SPI=y
> diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig
> index 4c66c536d0f6..5a07edf5cd21 100644
> --- a/configs/xilinx_zynqmp_kria_defconfig
> +++ b/configs/xilinx_zynqmp_kria_defconfig
> @@ -117,6 +117,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
> CONFIG_NETCONSOLE=y
> CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
> CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_SIMPLE_PM_BUS=y
> CONFIG_SATA=y
> CONFIG_SCSI_AHCI=y
> CONFIG_SATA_CEVA=y
> diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig
> index 1133134e3fee..491206998da0 100644
> --- a/configs/xilinx_zynqmp_virt_defconfig
> +++ b/configs/xilinx_zynqmp_virt_defconfig
> @@ -118,6 +118,7 @@ CONFIG_NET_RANDOM_ETHADDR=y
> CONFIG_NETCONSOLE=y
> CONFIG_SYS_FAULT_ECHO_LINK_DOWN=y
> CONFIG_SPL_DM_SEQ_ALIAS=y
> +CONFIG_SIMPLE_PM_BUS=y
> CONFIG_SATA=y
> CONFIG_SCSI_AHCI=y
> CONFIG_SATA_CEVA=y
Applied.
M
prev parent reply other threads:[~2024-09-06 6:54 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-03 7:48 [PATCH] xilinx: Enable SIMPLE_PM_BUS Michal Simek
2024-09-06 6:54 ` Michal Simek [this message]
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