[U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH

public inbox for u-boot@lists.denx.de
 help / color / mirror / Atom feed

* [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
@ 2013-04-09 19:48 Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 02/30] mtd: nand: mxc_nand: Fix is_16bit_nand() Benoît Thébaudeau
                   ` (31 more replies)
  0 siblings, 32 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

From: Fabio Estevam <fabio.estevam@freescale.com>

Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller
drivers could use it when a 16-bit NAND is deployed.

drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
other NAND drivers could reuse the same symbol.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 README                  |    9 ++++++---
 drivers/mtd/nand/ndfc.c |    4 ++--
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/README b/README
index 5c5cd18..e9c3145 100644
--- a/README
+++ b/README
@@ -3755,9 +3755,12 @@ Low Level (hardware related) configuration options:
 - CONFIG_SYS_SRIOn_MEM_SIZE:
 		Size of SRIO port 'n' memory region
 
-- CONFIG_SYS_NDFC_16
-		Defined to tell the NDFC that the NAND chip is using a
-		16 bit bus.
+- CONFIG_SYS_NAND_BUSWIDTH_16BIT
+		Defined to tell the NAND controller that the NAND chip is using
+		a 16 bit bus.
+		Not all NAND drivers use this symbol.
+		Example of driver that uses it:
+		- drivers/mtd/nand/ndfc.c
 
 - CONFIG_SYS_NDFC_EBC0_CFG
 		Sets the EBC0_CFG register for the NDFC. If not defined
diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
index 6ebbb5e..213d2c9 100644
--- a/drivers/mtd/nand/ndfc.c
+++ b/drivers/mtd/nand/ndfc.c
@@ -156,7 +156,7 @@ static uint8_t ndfc_read_byte(struct mtd_info *mtd)
 
 	struct nand_chip *chip = mtd->priv;
 
-#ifdef CONFIG_SYS_NDFC_16BIT
+#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
 	return (uint8_t) readw(chip->IO_ADDR_R);
 #else
 	return readb(chip->IO_ADDR_R);
@@ -218,7 +218,7 @@ int board_nand_init(struct nand_chip *nand)
 	nand->ecc.bytes = 3;
 	nand->select_chip = ndfc_select_chip;
 
-#ifdef CONFIG_SYS_NDFC_16BIT
+#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
 	nand->options |= NAND_BUSWIDTH_16;
 #endif
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 02/30] mtd: nand: mxc_nand: Fix is_16bit_nand()
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 03/30] nand: mxc: Prepare to add support for i.MX5 Benoît Thébaudeau
                   ` (30 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

From: Fabio Estevam <fabio.estevam@freescale.com>

Currently is_16bit_nand() is a per SoC function and it decides the bus nand
width by reading some boot related registers.

This method works when NAND is the boot medium, but does not work if another
boot medium is used. For example: booting from a SD card and then using NAND
to store the environment variables, would lead to the following error:

NAND bus width 16 instead 8 bit
No NAND device found!!!
0 MiB

Use CONFIG_SYS_NAND_BUSWIDTH_16BIT symbol to decide the bus width.

If it is defined in the board file, then consider 16-bit NAND bus-width,
otherwise assume 8-bit NAND is used.

This also aligns with Documentation/devicetree/bindings/mtd/nand.txt, which
states:

nand-bus-width : 8 or 16 bus width if not present 8

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 README                      |    3 ++-
 drivers/mtd/nand/mxc_nand.c |   37 +++----------------------------------
 2 files changed, 5 insertions(+), 35 deletions(-)

diff --git a/README b/README
index e9c3145..9285ddd 100644
--- a/README
+++ b/README
@@ -3759,8 +3759,9 @@ Low Level (hardware related) configuration options:
 		Defined to tell the NAND controller that the NAND chip is using
 		a 16 bit bus.
 		Not all NAND drivers use this symbol.
-		Example of driver that uses it:
+		Example of drivers that use it:
 		- drivers/mtd/nand/ndfc.c
+		- drivers/mtd/nand/mxc_nand.c
 
 - CONFIG_SYS_NDFC_EBC0_CFG
 		Sets the EBC0_CFG register for the NDFC. If not defined
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index d0ded48..bb475f2 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -98,45 +98,14 @@ static struct nand_ecclayout nand_hw_eccoob2k = {
 #endif
 #endif
 
-#ifdef CONFIG_MX27
 static int is_16bit_nand(void)
 {
-	struct system_control_regs *sc_regs =
-		(struct system_control_regs *)IMX_SYSTEM_CTL_BASE;
-
-	if (readl(&sc_regs->fmcr) & NF_16BIT_SEL)
-		return 1;
-	else
-		return 0;
-}
-#elif defined(CONFIG_MX31)
-static int is_16bit_nand(void)
-{
-	struct clock_control_regs *sc_regs =
-		(struct clock_control_regs *)CCM_BASE;
-
-	if (readl(&sc_regs->rcsr) & CCM_RCSR_NF16B)
-		return 1;
-	else
-		return 0;
-}
-#elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
-static int is_16bit_nand(void)
-{
-	struct ccm_regs *ccm = (struct ccm_regs *)IMX_CCM_BASE;
-
-	if (readl(&ccm->rcsr) & CCM_RCSR_NF_16BIT_SEL)
-		return 1;
-	else
-		return 0;
-}
+#if defined(CONFIG_SYS_NAND_BUSWIDTH_16BIT)
+	return 1;
 #else
-#warning "8/16 bit NAND autodetection not supported"
-static int is_16bit_nand(void)
-{
 	return 0;
-}
 #endif
+}
 
 static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t size)
 {
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 03/30] nand: mxc: Prepare to add support for i.MX5
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 02/30] mtd: nand: mxc_nand: Fix is_16bit_nand() Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 04/30] nand: mxc: Add " Benoît Thébaudeau
                   ` (29 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Add some abstraction to NFC definitions so that some parts of the current code
can also be used for future i.MX5 code.

Clean up a few things by the way.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7:
 - Fix typo in patch description.

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
 - Separate code reformatting from behavioral changes.

Changes in v2:
 - Fix warning for unused tmp variable in board_nand_init() for NFC V1.

 drivers/mtd/nand/mxc_nand.c  |   92 +++++++++++++++++++++---------------------
 include/fsl_nfc.h            |   72 ++++++++++++---------------------
 nand_spl/nand_boot_fsl_nfc.c |   47 +++++++++++----------
 3 files changed, 97 insertions(+), 114 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index bb475f2..6ae95d6 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -119,7 +119,7 @@ static uint32_t *mxc_nand_memcpy32(uint32_t *dest, uint32_t *source, size_t size
 
 /*
  * This function polls the NANDFC to wait for the basic operation to
- * complete by checking the INT bit of config2 register.
+ * complete by checking the INT bit.
  */
 static void wait_op_done(struct mxc_nand_host *host, int max_retries,
 				uint16_t param)
@@ -127,10 +127,10 @@ static void wait_op_done(struct mxc_nand_host *host, int max_retries,
 	uint32_t tmp;
 
 	while (max_retries-- > 0) {
-		if (readw(&host->regs->config2) & NFC_INT) {
-			tmp = readw(&host->regs->config2);
-			tmp  &= ~NFC_INT;
-			writew(tmp, &host->regs->config2);
+		tmp = readnfc(&host->regs->config2);
+		if (tmp & NFC_V1_V2_CONFIG2_INT) {
+			tmp &= ~NFC_V1_V2_CONFIG2_INT;
+			writenfc(tmp, &host->regs->config2);
 			break;
 		}
 		udelay(1);
@@ -149,8 +149,8 @@ static void send_cmd(struct mxc_nand_host *host, uint16_t cmd)
 {
 	MTDDEBUG(MTD_DEBUG_LEVEL3, "send_cmd(host, 0x%x)\n", cmd);
 
-	writew(cmd, &host->regs->flash_cmd);
-	writew(NFC_CMD, &host->regs->config2);
+	writenfc(cmd, &host->regs->flash_cmd);
+	writenfc(NFC_CMD, &host->regs->operation);
 
 	/* Wait for operation to complete */
 	wait_op_done(host, TROP_US_DELAY, cmd);
@@ -165,8 +165,8 @@ static void send_addr(struct mxc_nand_host *host, uint16_t addr)
 {
 	MTDDEBUG(MTD_DEBUG_LEVEL3, "send_addr(host, 0x%x)\n", addr);
 
-	writew(addr, &host->regs->flash_addr);
-	writew(NFC_ADDR, &host->regs->config2);
+	writenfc(addr, &host->regs->flash_addr);
+	writenfc(NFC_ADDR, &host->regs->operation);
 
 	/* Wait for operation to complete */
 	wait_op_done(host, TROP_US_DELAY, addr);
@@ -198,19 +198,19 @@ static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
 		}
 	}
 
-	writew(buf_id, &host->regs->buf_addr);
+	writenfc(buf_id, &host->regs->buf_addr);
 
 	/* Configure spare or page+spare access */
 	if (!host->pagesize_2k) {
-		uint16_t config1 = readw(&host->regs->config1);
+		uint16_t config1 = readnfc(&host->regs->config1);
 		if (spare_only)
-			config1 |= NFC_SP_EN;
+			config1 |= NFC_CONFIG1_SP_EN;
 		else
-			config1 &= ~NFC_SP_EN;
-		writew(config1, &host->regs->config1);
+			config1 &= ~NFC_CONFIG1_SP_EN;
+		writenfc(config1, &host->regs->config1);
 	}
 
-	writew(NFC_INPUT, &host->regs->config2);
+	writenfc(NFC_INPUT, &host->regs->operation);
 
 	/* Wait for operation to complete */
 	wait_op_done(host, TROP_US_DELAY, spare_only);
@@ -225,19 +225,19 @@ static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
 {
 	MTDDEBUG(MTD_DEBUG_LEVEL3, "send_read_page (%d)\n", spare_only);
 
-	writew(buf_id, &host->regs->buf_addr);
+	writenfc(buf_id, &host->regs->buf_addr);
 
 	/* Configure spare or page+spare access */
 	if (!host->pagesize_2k) {
-		uint32_t config1 = readw(&host->regs->config1);
+		uint32_t config1 = readnfc(&host->regs->config1);
 		if (spare_only)
-			config1 |= NFC_SP_EN;
+			config1 |= NFC_CONFIG1_SP_EN;
 		else
-			config1 &= ~NFC_SP_EN;
-		writew(config1, &host->regs->config1);
+			config1 &= ~NFC_CONFIG1_SP_EN;
+		writenfc(config1, &host->regs->config1);
 	}
 
-	writew(NFC_OUTPUT, &host->regs->config2);
+	writenfc(NFC_OUTPUT, &host->regs->operation);
 
 	/* Wait for operation to complete */
 	wait_op_done(host, TROP_US_DELAY, spare_only);
@@ -265,14 +265,14 @@ static void send_read_id(struct mxc_nand_host *host)
 	uint16_t tmp;
 
 	/* NANDFC buffer 0 is used for device ID output */
-	writew(0x0, &host->regs->buf_addr);
+	writenfc(0x0, &host->regs->buf_addr);
 
 	/* Read ID into main buffer */
-	tmp = readw(&host->regs->config1);
-	tmp &= ~NFC_SP_EN;
-	writew(tmp, &host->regs->config1);
+	tmp = readnfc(&host->regs->config1);
+	tmp &= ~NFC_CONFIG1_SP_EN;
+	writenfc(tmp, &host->regs->config1);
 
-	writew(NFC_ID, &host->regs->config2);
+	writenfc(NFC_ID, &host->regs->operation);
 
 	/* Wait for operation to complete */
 	wait_op_done(host, TROP_US_DELAY, 0);
@@ -292,14 +292,14 @@ static uint16_t get_dev_status(struct mxc_nand_host *host)
 	/* store the main area1 first word, later do recovery */
 	store = readl(main_buf);
 	/* NANDFC buffer 1 is used for device status */
-	writew(1, &host->regs->buf_addr);
+	writenfc(1, &host->regs->buf_addr);
 
 	/* Read status into main buffer */
-	tmp = readw(&host->regs->config1);
-	tmp &= ~NFC_SP_EN;
-	writew(tmp, &host->regs->config1);
+	tmp = readnfc(&host->regs->config1);
+	tmp &= ~NFC_CONFIG1_SP_EN;
+	writenfc(tmp, &host->regs->config1);
 
-	writew(NFC_STATUS, &host->regs->config2);
+	writenfc(NFC_STATUS, &host->regs->operation);
 
 	/* Wait for operation to complete */
 	wait_op_done(host, TROP_US_DELAY, 0);
@@ -328,13 +328,13 @@ static void _mxc_nand_enable_hwecc(struct mtd_info *mtd, int on)
 {
 	struct nand_chip *nand_chip = mtd->priv;
 	struct mxc_nand_host *host = nand_chip->priv;
-	uint16_t tmp = readw(&host->regs->config1);
+	uint16_t tmp = readnfc(&host->regs->config1);
 
 	if (on)
-		tmp |= NFC_ECC_EN;
+		tmp |= NFC_V1_V2_CONFIG1_ECC_EN;
 	else
-		tmp &= ~NFC_ECC_EN;
-	writew(tmp, &host->regs->config1);
+		tmp &= ~NFC_V1_V2_CONFIG1_ECC_EN;
+	writenfc(tmp, &host->regs->config1);
 }
 
 #ifdef CONFIG_MXC_NAND_HWECC
@@ -667,7 +667,7 @@ static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat,
 	 * additional correction.  2-Bit errors cannot be corrected by
 	 * HW ECC, so we need to return failure
 	 */
-	uint16_t ecc_status = readw(&host->regs->ecc_status_result);
+	uint16_t ecc_status = readnfc(&host->regs->ecc_status_result);
 
 	if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) {
 		MTDDEBUG(MTD_DEBUG_LEVEL0,
@@ -1210,24 +1210,24 @@ int board_nand_init(struct nand_chip *this)
 #endif
 
 #ifdef MXC_NFC_V2_1
-	tmp = readw(&host->regs->config1);
-	tmp |= NFC_ONE_CYCLE;
-	tmp |= NFC_4_8N_ECC;
-	writew(tmp, &host->regs->config1);
+	tmp = readnfc(&host->regs->config1);
+	tmp |= NFC_V2_CONFIG1_ONE_CYCLE;
+	tmp |= NFC_V2_CONFIG1_ECC_MODE_4;
+	writenfc(tmp, &host->regs->config1);
 	if (host->pagesize_2k)
-		writew(64/2, &host->regs->spare_area_size);
+		writenfc(64/2, &host->regs->spare_area_size);
 	else
-		writew(16/2, &host->regs->spare_area_size);
+		writenfc(16/2, &host->regs->spare_area_size);
 #endif
 
 	/*
 	 * preset operation
 	 * Unlock the internal RAM Buffer
 	 */
-	writew(0x2, &host->regs->config);
+	writenfc(0x2, &host->regs->config);
 
 	/* Blocks to be unlocked */
-	writew(0x0, &host->regs->unlockstart_blkaddr);
+	writenfc(0x0, &host->regs->unlockstart_blkaddr);
 	/* Originally (Freescale LTIB 2.6.21) 0x4000 was written to the
 	 * unlockend_blkaddr, but the magic 0x4000 does not always work
 	 * when writing more than some 32 megabytes (on 2k page nands)
@@ -1239,10 +1239,10 @@ int board_nand_init(struct nand_chip *this)
 	 * This might be NAND chip specific and the i.MX31 datasheet is
 	 * extremely vague about the semantics of this register.
 	 */
-	writew(0xFFFF, &host->regs->unlockend_blkaddr);
+	writenfc(0xFFFF, &host->regs->unlockend_blkaddr);
 
 	/* Unlock Block Command for given address range */
-	writew(0x4, &host->regs->wrprot);
+	writenfc(0x4, &host->regs->wrprot);
 
 	return 0;
 }
diff --git a/include/fsl_nfc.h b/include/fsl_nfc.h
index ff537b4..013e9e2 100644
--- a/include/fsl_nfc.h
+++ b/include/fsl_nfc.h
@@ -113,58 +113,38 @@ struct fsl_nfc_regs {
 #endif
 };
 
-/*
- * Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register for Command
- * operation
- */
-#define NFC_CMD		0x1
+/* Set FCMD to 1, rest to 0 for Command operation */
+#define NFC_CMD				0x1
 
-/*
- * Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register for Address
- * operation
- */
-#define NFC_ADDR	0x2
+/* Set FADD to 1, rest to 0 for Address operation */
+#define NFC_ADDR			0x2
 
-/*
- * Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register for Input
- * operation
- */
-#define NFC_INPUT	0x4
+/* Set FDI to 1, rest to 0 for Input operation */
+#define NFC_INPUT			0x4
 
-/*
- * Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register for Data
- * Output operation
- */
-#define NFC_OUTPUT	0x8
+/* Set FDO to 001, rest to 0 for Data Output operation */
+#define NFC_OUTPUT			0x8
 
-/*
- * Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register for Read ID
- * operation
- */
-#define NFC_ID		0x10
+/* Set FDO to 010, rest to 0 for Read ID operation */
+#define NFC_ID				0x10
 
-/*
- * Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register for Read
- * Status operation
- */
-#define NFC_STATUS	0x20
+/* Set FDO to 100, rest to 0 for Read Status operation */
+#define NFC_STATUS			0x20
 
-/*
- * Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read Status
- * operation
- */
-#define NFC_INT		0x8000
+#define NFC_CONFIG1_SP_EN		(1 << 2)
+#define NFC_CONFIG1_RST			(1 << 6)
+#define NFC_CONFIG1_CE			(1 << 7)
+#define NFC_V1_V2_CONFIG1_ECC_EN	(1 << 3)
+#define NFC_V1_V2_CONFIG1_INT_MSK	(1 << 4)
+#define NFC_V1_V2_CONFIG1_BIG		(1 << 5)
+#define NFC_V2_CONFIG1_ECC_MODE_4	(1 << 0)
+#define NFC_V2_CONFIG1_ONE_CYCLE	(1 << 8)
+#define NFC_V2_CONFIG1_FP_INT		(1 << 11)
 
-#ifdef MXC_NFC_V2_1
-#define NFC_4_8N_ECC	(1 << 0)
-#endif
-#define NFC_SP_EN	(1 << 2)
-#define NFC_ECC_EN	(1 << 3)
-#define NFC_INT_MSK	(1 << 4)
-#define NFC_BIG		(1 << 5)
-#define NFC_RST		(1 << 6)
-#define NFC_CE		(1 << 7)
-#define NFC_ONE_CYCLE	(1 << 8)
-#define NFC_FP_INT	(1 << 11)
+#define NFC_V1_V2_CONFIG2_INT		(1 << 15)
+
+#define operation	config2
+#define readnfc		readw
+#define writenfc	writew
 
 #endif /* __FSL_NFC_H */
diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c
index a40c998..615e820 100644
--- a/nand_spl/nand_boot_fsl_nfc.c
+++ b/nand_spl/nand_boot_fsl_nfc.c
@@ -36,13 +36,13 @@ static void nfc_wait_ready(void)
 {
 	uint32_t tmp;
 
-	while (!(readw(&nfc->config2) & NFC_INT))
+	while (!(readnfc(&nfc->config2) & NFC_V1_V2_CONFIG2_INT))
 		;
 
 	/* Reset interrupt flag */
-	tmp = readw(&nfc->config2);
-	tmp &= ~NFC_INT;
-	writew(tmp, &nfc->config2);
+	tmp = readnfc(&nfc->config2);
+	tmp &= ~NFC_V1_V2_CONFIG2_INT;
+	writenfc(tmp, &nfc->config2);
 }
 
 static void nfc_nand_init(void)
@@ -51,43 +51,45 @@ static void nfc_nand_init(void)
 	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
 	int config1;
 
-	writew(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
+	writenfc(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
 
 	/* unlocking RAM Buff */
-	writew(0x2, &nfc->config);
+	writenfc(0x2, &nfc->config);
 
 	/* hardware ECC checking and correct */
-	config1 = readw(&nfc->config1) | NFC_ECC_EN | NFC_INT_MSK |
-			NFC_ONE_CYCLE | NFC_FP_INT;
+	config1 = readnfc(&nfc->config1) | NFC_V1_V2_CONFIG1_ECC_EN |
+			NFC_V1_V2_CONFIG1_INT_MSK | NFC_V2_CONFIG1_ONE_CYCLE |
+			NFC_V2_CONFIG1_FP_INT;
 	/*
 	 * if spare size is larger that 16 bytes per 512 byte hunk
 	 * then use 8 symbol correction instead of 4
 	 */
 	if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
-		config1 &= ~NFC_4_8N_ECC;
+		config1 &= ~NFC_V2_CONFIG1_ECC_MODE_4;
 	else
-		config1 |= NFC_4_8N_ECC;
-	writew(config1, &nfc->config1);
+		config1 |= NFC_V2_CONFIG1_ECC_MODE_4;
+	writenfc(config1, &nfc->config1);
 #elif defined(MXC_NFC_V1)
 	/* unlocking RAM Buff */
-	writew(0x2, &nfc->config);
+	writenfc(0x2, &nfc->config);
 
 	/* hardware ECC checking and correct */
-	writew(NFC_ECC_EN | NFC_INT_MSK, &nfc->config1);
+	writenfc(NFC_V1_V2_CONFIG1_ECC_EN | NFC_V1_V2_CONFIG1_INT_MSK,
+			&nfc->config1);
 #endif
 }
 
 static void nfc_nand_command(unsigned short command)
 {
-	writew(command, &nfc->flash_cmd);
-	writew(NFC_CMD, &nfc->config2);
+	writenfc(command, &nfc->flash_cmd);
+	writenfc(NFC_CMD, &nfc->operation);
 	nfc_wait_ready();
 }
 
 static void nfc_nand_address(unsigned short address)
 {
-	writew(address, &nfc->flash_addr);
-	writew(NFC_ADDR, &nfc->config2);
+	writenfc(address, &nfc->flash_addr);
+	writenfc(NFC_ADDR, &nfc->operation);
 	nfc_wait_ready();
 }
 
@@ -121,8 +123,8 @@ static void nfc_nand_data_output(void)
 	int i;
 #endif
 
-	writew(0, &nfc->buf_addr);
-	writew(NFC_OUTPUT, &nfc->config2);
+	writenfc(0, &nfc->buf_addr);
+	writenfc(NFC_OUTPUT, &nfc->operation);
 	nfc_wait_ready();
 #ifdef NAND_MXC_2K_MULTI_CYCLE
 	/*
@@ -130,8 +132,8 @@ static void nfc_nand_data_output(void)
 	 * for pages larger than 512 bytes.
 	 */
 	for (i = 1; i < CONFIG_SYS_NAND_PAGE_SIZE / 512; i++) {
-		writew(i, &nfc->buf_addr);
-		writew(NFC_OUTPUT, &nfc->config2);
+		writenfc(i, &nfc->buf_addr);
+		writenfc(NFC_OUTPUT, &nfc->operation);
 		nfc_wait_ready();
 	}
 #endif
@@ -160,7 +162,8 @@ static int nfc_nand_check_ecc(void)
 
 static void nfc_nand_read_page(unsigned int page_address)
 {
-	writew(0, &nfc->buf_addr); /* read in first 0 buffer */
+	/* read in first 0 buffer */
+	writenfc(0, &nfc->buf_addr);
 	nfc_nand_command(NAND_CMD_READ0);
 	nfc_nand_page_address(page_address);
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 04/30] nand: mxc: Add support for i.MX5
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 02/30] mtd: nand: mxc_nand: Fix is_16bit_nand() Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 03/30] nand: mxc: Prepare to add support for i.MX5 Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 05/30] imx: mx5: lowlevel_init: Simplify code Benoît Thébaudeau
                   ` (28 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9:
 - Drop the now unused SRC register definitions.

Changes in v8:
 - Rebase on Fabio's patches using CONFIG_SYS_NAND_BUSWIDTH_16BIT instead of
   NAND Flash boot config pins to determine NAND Flash bus width.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
 - Separate code reformatting from behavioral changes.

Changes in v2: None

 drivers/mtd/nand/mxc_nand.c  |  119 ++++++++++++++++++++++++++++++++++++++----
 include/fsl_nfc.h            |   79 +++++++++++++++++++++++++++-
 nand_spl/nand_boot_fsl_nfc.c |   67 +++++++++++++++++++++++-
 3 files changed, 250 insertions(+), 15 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 6ae95d6..db72cdc 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -22,7 +22,8 @@
 #include <nand.h>
 #include <linux/err.h>
 #include <asm/io.h>
-#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35)
+#if defined(CONFIG_MX25) || defined(CONFIG_MX27) || defined(CONFIG_MX35) || \
+	defined(CONFIG_MX51) || defined(CONFIG_MX53)
 #include <asm/arch/imx-regs.h>
 #endif
 #include <fsl_nfc.h>
@@ -36,6 +37,9 @@ struct mxc_nand_host {
 	struct nand_chip		*nand;
 
 	struct fsl_nfc_regs __iomem	*regs;
+#ifdef MXC_NFC_V3_2
+	struct fsl_nfc_ip_regs __iomem	*ip_regs;
+#endif
 	int				spare_only;
 	int				status_request;
 	int				pagesize_2k;
@@ -77,7 +81,7 @@ static struct nand_ecclayout nand_hw_eccoob2k = {
 	.oobfree = { {2, 4}, {11, 11}, {27, 11}, {43, 11}, {59, 5} },
 };
 #endif
-#elif defined(MXC_NFC_V2_1)
+#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
 #ifndef CONFIG_SYS_NAND_LARGEPAGE
 static struct nand_ecclayout nand_hw_eccoob = {
 	.eccbytes = 9,
@@ -127,10 +131,17 @@ static void wait_op_done(struct mxc_nand_host *host, int max_retries,
 	uint32_t tmp;
 
 	while (max_retries-- > 0) {
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 		tmp = readnfc(&host->regs->config2);
 		if (tmp & NFC_V1_V2_CONFIG2_INT) {
 			tmp &= ~NFC_V1_V2_CONFIG2_INT;
 			writenfc(tmp, &host->regs->config2);
+#elif defined(MXC_NFC_V3_2)
+		tmp = readnfc(&host->ip_regs->ipc);
+		if (tmp & NFC_V3_IPC_INT) {
+			tmp &= ~NFC_V3_IPC_INT;
+			writenfc(tmp, &host->ip_regs->ipc);
+#endif
 			break;
 		}
 		udelay(1);
@@ -182,7 +193,7 @@ static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
 	if (spare_only)
 		MTDDEBUG(MTD_DEBUG_LEVEL1, "send_prog_page (%d)\n", spare_only);
 
-	if (is_mxc_nfc_21()) {
+	if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
 		int i;
 		/*
 		 *  The controller copies the 64 bytes of spare data from
@@ -198,11 +209,18 @@ static void send_prog_page(struct mxc_nand_host *host, uint8_t buf_id,
 		}
 	}
 
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	writenfc(buf_id, &host->regs->buf_addr);
+#elif defined(MXC_NFC_V3_2)
+	uint32_t tmp = readnfc(&host->regs->config1);
+	tmp &= ~NFC_V3_CONFIG1_RBA_MASK;
+	tmp |= NFC_V3_CONFIG1_RBA(buf_id);
+	writenfc(tmp, &host->regs->config1);
+#endif
 
 	/* Configure spare or page+spare access */
 	if (!host->pagesize_2k) {
-		uint16_t config1 = readnfc(&host->regs->config1);
+		uint32_t config1 = readnfc(&host->regs->config1);
 		if (spare_only)
 			config1 |= NFC_CONFIG1_SP_EN;
 		else
@@ -225,7 +243,14 @@ static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
 {
 	MTDDEBUG(MTD_DEBUG_LEVEL3, "send_read_page (%d)\n", spare_only);
 
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	writenfc(buf_id, &host->regs->buf_addr);
+#elif defined(MXC_NFC_V3_2)
+	uint32_t tmp = readnfc(&host->regs->config1);
+	tmp &= ~NFC_V3_CONFIG1_RBA_MASK;
+	tmp |= NFC_V3_CONFIG1_RBA(buf_id);
+	writenfc(tmp, &host->regs->config1);
+#endif
 
 	/* Configure spare or page+spare access */
 	if (!host->pagesize_2k) {
@@ -242,7 +267,7 @@ static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
 	/* Wait for operation to complete */
 	wait_op_done(host, TROP_US_DELAY, spare_only);
 
-	if (is_mxc_nfc_21()) {
+	if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
 		int i;
 
 		/*
@@ -262,10 +287,16 @@ static void send_read_page(struct mxc_nand_host *host, uint8_t buf_id,
 /* Request the NANDFC to perform a read of the NAND device ID. */
 static void send_read_id(struct mxc_nand_host *host)
 {
-	uint16_t tmp;
+	uint32_t tmp;
 
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	/* NANDFC buffer 0 is used for device ID output */
 	writenfc(0x0, &host->regs->buf_addr);
+#elif defined(MXC_NFC_V3_2)
+	tmp = readnfc(&host->regs->config1);
+	tmp &= ~NFC_V3_CONFIG1_RBA_MASK;
+	writenfc(tmp, &host->regs->config1);
+#endif
 
 	/* Read ID into main buffer */
 	tmp = readnfc(&host->regs->config1);
@@ -284,15 +315,19 @@ static void send_read_id(struct mxc_nand_host *host)
  */
 static uint16_t get_dev_status(struct mxc_nand_host *host)
 {
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	void __iomem *main_buf = host->regs->main_area[1];
 	uint32_t store;
-	uint16_t ret, tmp;
+#endif
+	uint32_t ret, tmp;
 	/* Issue status request to NAND device */
 
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	/* store the main area1 first word, later do recovery */
 	store = readl(main_buf);
 	/* NANDFC buffer 1 is used for device status */
 	writenfc(1, &host->regs->buf_addr);
+#endif
 
 	/* Read status into main buffer */
 	tmp = readnfc(&host->regs->config1);
@@ -304,12 +339,16 @@ static uint16_t get_dev_status(struct mxc_nand_host *host)
 	/* Wait for operation to complete */
 	wait_op_done(host, TROP_US_DELAY, 0);
 
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	/*
 	 *  Status is placed in first word of main buffer
 	 * get status, then recovery area 1 data
 	 */
 	ret = readw(main_buf);
 	writel(store, main_buf);
+#elif defined(MXC_NFC_V3_2)
+	ret = readnfc(&host->regs->config1) >> 16;
+#endif
 
 	return ret;
 }
@@ -328,6 +367,7 @@ static void _mxc_nand_enable_hwecc(struct mtd_info *mtd, int on)
 {
 	struct nand_chip *nand_chip = mtd->priv;
 	struct mxc_nand_host *host = nand_chip->priv;
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	uint16_t tmp = readnfc(&host->regs->config1);
 
 	if (on)
@@ -335,6 +375,15 @@ static void _mxc_nand_enable_hwecc(struct mtd_info *mtd, int on)
 	else
 		tmp &= ~NFC_V1_V2_CONFIG1_ECC_EN;
 	writenfc(tmp, &host->regs->config1);
+#elif defined(MXC_NFC_V3_2)
+	uint32_t tmp = readnfc(&host->ip_regs->config2);
+
+	if (on)
+		tmp |= NFC_V3_CONFIG2_ECC_EN;
+	else
+		tmp &= ~NFC_V3_CONFIG2_ECC_EN;
+	writenfc(tmp, &host->ip_regs->config2);
+#endif
 }
 
 #ifdef CONFIG_MXC_NAND_HWECC
@@ -346,7 +395,7 @@ static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode)
 	 */
 }
 
-#ifdef MXC_NFC_V2_1
+#if defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
 static int mxc_nand_read_oob_syndrome(struct mtd_info *mtd,
 				      struct nand_chip *chip,
 				      int page, int sndcmd)
@@ -1136,8 +1185,8 @@ static struct nand_bbt_descr bbt_mirror_descr = {
 int board_nand_init(struct nand_chip *this)
 {
 	struct mtd_info *mtd;
-#ifdef MXC_NFC_V2_1
-	uint16_t tmp;
+#if defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
+	uint32_t tmp;
 #endif
 
 #ifdef CONFIG_SYS_NAND_USE_FLASH_BBT
@@ -1165,13 +1214,17 @@ int board_nand_init(struct nand_chip *this)
 	this->verify_buf = mxc_nand_verify_buf;
 
 	host->regs = (struct fsl_nfc_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
+#ifdef MXC_NFC_V3_2
+	host->ip_regs =
+		(struct fsl_nfc_ip_regs __iomem *)CONFIG_MXC_NAND_IP_REGS_BASE;
+#endif
 	host->clk_act = 1;
 
 #ifdef CONFIG_MXC_NAND_HWECC
 	this->ecc.calculate = mxc_nand_calculate_ecc;
 	this->ecc.hwctl = mxc_nand_enable_hwecc;
 	this->ecc.correct = mxc_nand_correct_data;
-	if (is_mxc_nfc_21()) {
+	if (is_mxc_nfc_21() || is_mxc_nfc_32()) {
 		this->ecc.mode = NAND_ECC_HW_SYNDROME;
 		this->ecc.read_page = mxc_nand_read_page_syndrome;
 		this->ecc.read_page_raw = mxc_nand_read_page_raw_syndrome;
@@ -1209,6 +1262,7 @@ int board_nand_init(struct nand_chip *this)
 	this->ecc.layout = &nand_hw_eccoob;
 #endif
 
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 #ifdef MXC_NFC_V2_1
 	tmp = readnfc(&host->regs->config1);
 	tmp |= NFC_V2_CONFIG1_ONE_CYCLE;
@@ -1243,6 +1297,49 @@ int board_nand_init(struct nand_chip *this)
 
 	/* Unlock Block Command for given address range */
 	writenfc(0x4, &host->regs->wrprot);
+#elif defined(MXC_NFC_V3_2)
+	writenfc(NFC_V3_CONFIG1_RBA(0), &host->regs->config1);
+	writenfc(NFC_V3_IPC_CREQ, &host->ip_regs->ipc);
+
+	/* Unlock the internal RAM Buffer */
+	writenfc(NFC_V3_WRPROT_BLS_UNLOCK | NFC_V3_WRPROT_UNLOCK,
+			&host->ip_regs->wrprot);
+
+	/* Blocks to be unlocked */
+	for (tmp = 0; tmp < CONFIG_SYS_NAND_MAX_CHIPS; tmp++)
+		writenfc(0x0 | 0xFFFF << 16,
+				&host->ip_regs->wrprot_unlock_blkaddr[tmp]);
+
+	writenfc(0, &host->ip_regs->ipc);
+
+	tmp = readnfc(&host->ip_regs->config2);
+	tmp &= ~(NFC_V3_CONFIG2_SPAS_MASK | NFC_V3_CONFIG2_EDC_MASK |
+			NFC_V3_CONFIG2_ECC_MODE_8 | NFC_V3_CONFIG2_PS_MASK);
+	tmp |= NFC_V3_CONFIG2_ONE_CYCLE;
+
+	if (host->pagesize_2k) {
+		tmp |= NFC_V3_CONFIG2_SPAS(64/2);
+		tmp |= NFC_V3_CONFIG2_PS_2048;
+	} else {
+		tmp |= NFC_V3_CONFIG2_SPAS(16/2);
+		tmp |= NFC_V3_CONFIG2_PS_512;
+	}
+
+	writenfc(tmp, &host->ip_regs->config2);
+
+	tmp = NFC_V3_CONFIG3_NUM_OF_DEVS(0) |
+			NFC_V3_CONFIG3_NO_SDMA |
+			NFC_V3_CONFIG3_RBB_MODE |
+			NFC_V3_CONFIG3_SBB(6) | /* Reset default */
+			NFC_V3_CONFIG3_ADD_OP(0);
+
+	if (!(this->options & NAND_BUSWIDTH_16))
+		tmp |= NFC_V3_CONFIG3_FW8;
+
+	writenfc(tmp, &host->ip_regs->config3);
+
+	writenfc(0, &host->ip_regs->delay_line);
+#endif
 
 	return 0;
 }
diff --git a/include/fsl_nfc.h b/include/fsl_nfc.h
index 013e9e2..48a6448 100644
--- a/include/fsl_nfc.h
+++ b/include/fsl_nfc.h
@@ -33,7 +33,8 @@
  *	to support up to 2K byte pagesize nand.
  *	Reading or writing a 2K page requires 4 FDI/FDO cycles.
  *
- * MX25 and MX35 have version 2.1, which has:
+ * MX25 and MX35 have version 2.1, and MX51 and MX53 have version 3.2, which
+ * have:
  *	8 512-byte main buffers and
  *	8 64-byte spare buffers
  *	to support up to 4K byte pagesize nand.
@@ -44,20 +45,29 @@
 #define MXC_NFC_V1
 #define is_mxc_nfc_1()		1
 #define is_mxc_nfc_21()		0
+#define is_mxc_nfc_32()		0
 #elif defined(CONFIG_MX25) || defined(CONFIG_MX35)
 #define MXC_NFC_V2_1
 #define is_mxc_nfc_1()		0
 #define is_mxc_nfc_21()		1
+#define is_mxc_nfc_32()		0
+#elif defined(CONFIG_MX51) || defined(CONFIG_MX53)
+#define MXC_NFC_V3
+#define MXC_NFC_V3_2
+#define is_mxc_nfc_1()		0
+#define is_mxc_nfc_21()		0
+#define is_mxc_nfc_32()		1
 #else
 #error "MXC NFC implementation not supported"
 #endif
+#define is_mxc_nfc_3()		is_mxc_nfc_32()
 
 #if defined(MXC_NFC_V1)
 #define NAND_MXC_NR_BUFS		4
 #define NAND_MXC_SPARE_BUF_SIZE		16
 #define NAND_MXC_REG_OFFSET		0xe00
 #define NAND_MXC_2K_MULTI_CYCLE
-#elif defined(MXC_NFC_V2_1)
+#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
 #define NAND_MXC_NR_BUFS		8
 #define NAND_MXC_SPARE_BUF_SIZE		64
 #define NAND_MXC_REG_OFFSET		0x1e00
@@ -110,9 +120,28 @@ struct fsl_nfc_regs {
 	u16 unlockend_blkaddr2;
 	u16 unlockstart_blkaddr3;
 	u16 unlockend_blkaddr3;
+#elif defined(MXC_NFC_V3_2)
+	u32 flash_cmd;
+	u32 flash_addr[12];
+	u32 config1;
+	u32 ecc_status_result;
+	u32 status_sum;
+	u32 launch;
 #endif
 };
 
+#ifdef MXC_NFC_V3_2
+struct fsl_nfc_ip_regs {
+	u32 wrprot;
+	u32 wrprot_unlock_blkaddr[8];
+	u32 config2;
+	u32 config3;
+	u32 ipc;
+	u32 err_addr;
+	u32 delay_line;
+};
+#endif
+
 /* Set FCMD to 1, rest to 0 for Command operation */
 #define NFC_CMD				0x1
 
@@ -131,20 +160,66 @@ struct fsl_nfc_regs {
 /* Set FDO to 100, rest to 0 for Read Status operation */
 #define NFC_STATUS			0x20
 
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 #define NFC_CONFIG1_SP_EN		(1 << 2)
 #define NFC_CONFIG1_RST			(1 << 6)
 #define NFC_CONFIG1_CE			(1 << 7)
+#elif defined(MXC_NFC_V3_2)
+#define NFC_CONFIG1_SP_EN		(1 << 0)
+#define NFC_CONFIG1_CE			(1 << 1)
+#define NFC_CONFIG1_RST			(1 << 2)
+#endif
 #define NFC_V1_V2_CONFIG1_ECC_EN	(1 << 3)
 #define NFC_V1_V2_CONFIG1_INT_MSK	(1 << 4)
 #define NFC_V1_V2_CONFIG1_BIG		(1 << 5)
 #define NFC_V2_CONFIG1_ECC_MODE_4	(1 << 0)
 #define NFC_V2_CONFIG1_ONE_CYCLE	(1 << 8)
 #define NFC_V2_CONFIG1_FP_INT		(1 << 11)
+#define NFC_V3_CONFIG1_RBA_MASK		(0x7 << 4)
+#define NFC_V3_CONFIG1_RBA(x)		(((x) & 0x7) << 4)
 
 #define NFC_V1_V2_CONFIG2_INT		(1 << 15)
+#define NFC_V3_CONFIG2_PS_MASK		(0x3 << 0)
+#define NFC_V3_CONFIG2_PS_512		(0 << 0)
+#define NFC_V3_CONFIG2_PS_2048		(1 << 0)
+#define NFC_V3_CONFIG2_PS_4096		(2 << 0)
+#define NFC_V3_CONFIG2_ONE_CYCLE	(1 << 2)
+#define NFC_V3_CONFIG2_ECC_EN		(1 << 3)
+#define NFC_V3_CONFIG2_2CMD_PHASES	(1 << 4)
+#define NFC_V3_CONFIG2_NUM_ADDR_PH0	(1 << 5)
+#define NFC_V3_CONFIG2_ECC_MODE_8	(1 << 6)
+#define NFC_V3_CONFIG2_PPB_MASK		(0x3 << 7)
+#define NFC_V3_CONFIG2_PPB(x)		(((x) & 0x3) << 7)
+#define NFC_V3_CONFIG2_EDC_MASK		(0x7 << 9)
+#define NFC_V3_CONFIG2_EDC(x)		(((x) & 0x7) << 9)
+#define NFC_V3_CONFIG2_NUM_ADDR_PH1(x)	(((x) & 0x3) << 12)
+#define NFC_V3_CONFIG2_INT_MSK		(1 << 15)
+#define NFC_V3_CONFIG2_SPAS_MASK	(0xff << 16)
+#define NFC_V3_CONFIG2_SPAS(x)		(((x) & 0xff) << 16)
+#define NFC_V3_CONFIG2_ST_CMD_MASK	(0xff << 24)
+#define NFC_V3_CONFIG2_ST_CMD(x)	(((x) & 0xff) << 24)
+
+#define NFC_V3_CONFIG3_ADD_OP(x)	(((x) & 0x3) << 0)
+#define NFC_V3_CONFIG3_FW8		(1 << 3)
+#define NFC_V3_CONFIG3_SBB(x)		(((x) & 0x7) << 8)
+#define NFC_V3_CONFIG3_NUM_OF_DEVS(x)	(((x) & 0x7) << 12)
+#define NFC_V3_CONFIG3_RBB_MODE		(1 << 15)
+#define NFC_V3_CONFIG3_NO_SDMA		(1 << 20)
 
+#define NFC_V3_WRPROT_UNLOCK		(1 << 2)
+#define NFC_V3_WRPROT_BLS_UNLOCK	(2 << 6)
+
+#define NFC_V3_IPC_CREQ			(1 << 0)
+#define NFC_V3_IPC_INT			(1 << 31)
+
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 #define operation	config2
 #define readnfc		readw
 #define writenfc	writew
+#elif defined(MXC_NFC_V3_2)
+#define operation	launch
+#define readnfc		readl
+#define writenfc	writel
+#endif
 
 #endif /* __FSL_NFC_H */
diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c
index 615e820..1096727 100644
--- a/nand_spl/nand_boot_fsl_nfc.c
+++ b/nand_spl/nand_boot_fsl_nfc.c
@@ -30,12 +30,18 @@
 #include <asm/io.h>
 #include <fsl_nfc.h>
 
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;
+#elif defined(MXC_NFC_V3_2)
+static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR_AXI;
+static struct fsl_nfc_ip_regs *const nfc_ip = (void *)NFC_BASE_ADDR;
+#endif
 
 static void nfc_wait_ready(void)
 {
 	uint32_t tmp;
 
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	while (!(readnfc(&nfc->config2) & NFC_V1_V2_CONFIG2_INT))
 		;
 
@@ -43,11 +49,56 @@ static void nfc_wait_ready(void)
 	tmp = readnfc(&nfc->config2);
 	tmp &= ~NFC_V1_V2_CONFIG2_INT;
 	writenfc(tmp, &nfc->config2);
+#elif defined(MXC_NFC_V3_2)
+	while (!(readnfc(&nfc_ip->ipc) & NFC_V3_IPC_INT))
+		;
+
+	/* Reset interrupt flag */
+	tmp = readnfc(&nfc_ip->ipc);
+	tmp &= ~NFC_V3_IPC_INT;
+	writenfc(tmp, &nfc_ip->ipc);
+#endif
 }
 
 static void nfc_nand_init(void)
 {
-#if defined(MXC_NFC_V2_1)
+#if defined(MXC_NFC_V3_2)
+	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
+	int tmp;
+
+	tmp = (readnfc(&nfc_ip->config2) & ~(NFC_V3_CONFIG2_SPAS_MASK |
+			NFC_V3_CONFIG2_EDC_MASK | NFC_V3_CONFIG2_PS_MASK)) |
+		NFC_V3_CONFIG2_SPAS(CONFIG_SYS_NAND_SPARE_SIZE / 2) |
+		NFC_V3_CONFIG2_INT_MSK | NFC_V3_CONFIG2_ECC_EN |
+		NFC_V3_CONFIG2_ONE_CYCLE;
+	if (CONFIG_SYS_NAND_PAGE_SIZE == 4096)
+		tmp |= NFC_V3_CONFIG2_PS_4096;
+	else if (CONFIG_SYS_NAND_PAGE_SIZE == 2048)
+		tmp |= NFC_V3_CONFIG2_PS_2048;
+	else if (CONFIG_SYS_NAND_PAGE_SIZE == 512)
+		tmp |= NFC_V3_CONFIG2_PS_512;
+	/*
+	 * if spare size is larger that 16 bytes per 512 byte hunk
+	 * then use 8 symbol correction instead of 4
+	 */
+	if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
+		tmp |= NFC_V3_CONFIG2_ECC_MODE_8;
+	else
+		tmp &= ~NFC_V3_CONFIG2_ECC_MODE_8;
+	writenfc(tmp, &nfc_ip->config2);
+
+	tmp = NFC_V3_CONFIG3_NUM_OF_DEVS(0) |
+			NFC_V3_CONFIG3_NO_SDMA |
+			NFC_V3_CONFIG3_RBB_MODE |
+			NFC_V3_CONFIG3_SBB(6) | /* Reset default */
+			NFC_V3_CONFIG3_ADD_OP(0);
+#ifndef CONFIG_SYS_NAND_BUSWIDTH_16
+	tmp |= NFC_V3_CONFIG3_FW8;
+#endif
+	writenfc(tmp, &nfc_ip->config3);
+
+	writenfc(0, &nfc_ip->delay_line);
+#elif defined(MXC_NFC_V2_1)
 	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
 	int config1;
 
@@ -123,7 +174,13 @@ static void nfc_nand_data_output(void)
 	int i;
 #endif
 
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	writenfc(0, &nfc->buf_addr);
+#elif defined(MXC_NFC_V3_2)
+	int config1 = readnfc(&nfc->config1);
+	config1 &= ~NFC_V3_CONFIG1_RBA_MASK;
+	writenfc(config1, &nfc->config1);
+#endif
 	writenfc(NFC_OUTPUT, &nfc->operation);
 	nfc_wait_ready();
 #ifdef NAND_MXC_2K_MULTI_CYCLE
@@ -144,7 +201,7 @@ static int nfc_nand_check_ecc(void)
 #if defined(MXC_NFC_V1)
 	u16 ecc_status = readw(&nfc->ecc_status_result);
 	return (ecc_status & 0x3) == 2 || (ecc_status >> 2) == 2;
-#elif defined(MXC_NFC_V2_1)
+#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
 	u32 ecc_status = readl(&nfc->ecc_status_result);
 	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
 	int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4;
@@ -163,7 +220,13 @@ static int nfc_nand_check_ecc(void)
 static void nfc_nand_read_page(unsigned int page_address)
 {
 	/* read in first 0 buffer */
+#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
 	writenfc(0, &nfc->buf_addr);
+#elif defined(MXC_NFC_V3_2)
+	int config1 = readnfc(&nfc->config1);
+	config1 &= ~NFC_V3_CONFIG1_RBA_MASK;
+	writenfc(config1, &nfc->config1);
+#endif
 	nfc_nand_command(NAND_CMD_READ0);
 	nfc_nand_page_address(page_address);
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 05/30] imx: mx5: lowlevel_init: Simplify code
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (2 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 04/30] nand: mxc: Add " Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 06/30] imx: mx53ard: Add support for NAND Flash Benoît Thébaudeau
                   ` (27 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Don't use several instructions to build constant values.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Acked-by: Stefano Babic <sbabic@denx.de>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
 - New patch.

Changes in v2: None

 arch/arm/cpu/armv7/mx5/lowlevel_init.S |    8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/arch/arm/cpu/armv7/mx5/lowlevel_init.S b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
index 6d9396a..dfce0ca 100644
--- a/arch/arm/cpu/armv7/mx5/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/mx5/lowlevel_init.S
@@ -309,8 +309,7 @@ setup_pll_func:
         ldr r0, =CCM_BASE_ADDR
         ldr r1, =0x00015154
         str r1, [r0, #CLKCTL_CBCMR]
-        ldr r1, =0x02888945
-        orr r1, r1, #(1 << 16)
+        ldr r1, =0x02898945
         str r1, [r0, #CLKCTL_CBCDR]
         /* make sure change is effective */
 1:      ldr r1, [r0, #CLKCTL_CDHIPR]
@@ -321,10 +320,7 @@ setup_pll_func:
 
 	/* Switch peripheral to PLL2 */
 	ldr r0, =CCM_BASE_ADDR
-	ldr r1, =0x00808145
-	orr r1, r1, #(2 << 10)
-	orr r1, r1, #(0 << 16)
-	orr r1, r1, #(1 << 19)
+	ldr r1, =0x00888945
 	str r1, [r0, #CLKCTL_CBCDR]
 
 	ldr r1, =0x00016154
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 06/30] imx: mx53ard: Add support for NAND Flash
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (3 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 05/30] imx: mx5: lowlevel_init: Simplify code Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 07/30] nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome() Benoît Thébaudeau
                   ` (26 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Add support for the Samsung K9LAG08U0M NAND Flash (2-GiB MLC NAND Flash, 2-kiB
pages, 256-kiB blocks, 30-ns R/W cycles, 1 CS) on mx53ard.

eNFC_CLK_ROOT is set up with a cycle time of 37.5 ns (400 MHz / 3 / 5) for this
board, which satisfies the 30-ns NF R/W cycle requirement.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - Fix NFC pad setup using Freescale's.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3:
 - New patch.

Changes in v2: None

 board/freescale/mx53ard/mx53ard.c |   66 +++++++++++++++++++++++++++++++++++++
 include/configs/mx53ard.h         |   10 ++++++
 2 files changed, 76 insertions(+)

diff --git a/board/freescale/mx53ard/mx53ard.c b/board/freescale/mx53ard/mx53ard.c
index 2fc8570..8d433a3 100644
--- a/board/freescale/mx53ard/mx53ard.c
+++ b/board/freescale/mx53ard/mx53ard.c
@@ -58,6 +58,71 @@ void dram_init_banksize(void)
 	gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
 }
 
+#ifdef CONFIG_NAND_MXC
+static void setup_iomux_nand(void)
+{
+	u32 i, reg;
+	#define M4IF_GENP_WEIM_MM_MASK		0x00000001
+	#define WEIM_GCR2_MUX16_BYP_GRANT_MASK	0x00001000
+
+	reg = __raw_readl(M4IF_BASE_ADDR + 0xc);
+	reg &= ~M4IF_GENP_WEIM_MM_MASK;
+	__raw_writel(reg, M4IF_BASE_ADDR + 0xc);
+	for (i = 0x4; i < 0x94; i += 0x18) {
+		reg = __raw_readl(WEIM_BASE_ADDR + i);
+		reg &= ~WEIM_GCR2_MUX16_BYP_GRANT_MASK;
+		__raw_writel(reg, WEIM_BASE_ADDR + i);
+	}
+
+	mxc_request_iomux(MX53_PIN_NANDF_CS0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_NANDF_CS0, PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_NANDF_CS1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_NANDF_CS1, PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_NANDF_RB0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_NANDF_RB0, PAD_CTL_PKE_ENABLE |
+					PAD_CTL_PUE_PULL | PAD_CTL_100K_PU);
+	mxc_request_iomux(MX53_PIN_NANDF_CLE, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_NANDF_CLE, PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_NANDF_ALE, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_NANDF_ALE, PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_NANDF_WP_B, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_NANDF_WP_B, PAD_CTL_PKE_ENABLE |
+					PAD_CTL_PUE_PULL | PAD_CTL_100K_PU);
+	mxc_request_iomux(MX53_PIN_NANDF_RE_B, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_NANDF_RE_B, PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_NANDF_WE_B, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_NANDF_WE_B, PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_EIM_DA0, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_EIM_DA0, PAD_CTL_PKE_ENABLE |
+					PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_EIM_DA1, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_EIM_DA1, PAD_CTL_PKE_ENABLE |
+					PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_EIM_DA2, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_EIM_DA2, PAD_CTL_PKE_ENABLE |
+					PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_EIM_DA3, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_EIM_DA3, PAD_CTL_PKE_ENABLE |
+					PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_EIM_DA4, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_EIM_DA4, PAD_CTL_PKE_ENABLE |
+					PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_EIM_DA5, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_EIM_DA5, PAD_CTL_PKE_ENABLE |
+					PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_EIM_DA6, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_EIM_DA6, PAD_CTL_PKE_ENABLE |
+					PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+	mxc_request_iomux(MX53_PIN_EIM_DA7, IOMUX_CONFIG_ALT0);
+	mxc_iomux_set_pad(MX53_PIN_EIM_DA7, PAD_CTL_PKE_ENABLE |
+					PAD_CTL_100K_PU | PAD_CTL_DRV_HIGH);
+}
+#else
+static void setup_iomux_nand(void)
+{
+}
+#endif
+
 static void setup_iomux_uart(void)
 {
 	/* UART1 RXD */
@@ -277,6 +342,7 @@ static void weim_cs1_settings(void)
 
 int board_early_init_f(void)
 {
+	setup_iomux_nand();
 	setup_iomux_uart();
 	return 0;
 }
diff --git a/include/configs/mx53ard.h b/include/configs/mx53ard.h
index 62cb42b..148f7a2 100644
--- a/include/configs/mx53ard.h
+++ b/include/configs/mx53ard.h
@@ -41,6 +41,16 @@
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_MXC_GPIO
 
+#define CONFIG_SYS_MAX_NAND_DEVICE	1
+#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR_AXI
+#define CONFIG_NAND_MXC
+#define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR_AXI
+#define CONFIG_MXC_NAND_IP_REGS_BASE	NFC_BASE_ADDR
+#define CONFIG_SYS_NAND_LARGEPAGE
+#define CONFIG_MXC_NAND_HWECC
+#define CONFIG_SYS_NAND_USE_FLASH_BBT
+#define CONFIG_CMD_NAND
+
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE	UART1_BASE
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 07/30] nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome()
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (4 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 06/30] imx: mx53ard: Add support for NAND Flash Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 08/30] nand: mxc: Use appropriate page number in syndrome functions Benoît Thébaudeau
                   ` (25 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

The page number indicated in the debug trace of mxc_nand_read_oob_syndrome() did
not match the page being worked on.

By the way, replace the GCC-specific __FUNCTION__ with __func__.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5:
 - Replace __FUNCTION__ with __func__.

Changes in v4:
 - New patch.

Changes in v3: None
Changes in v2: None

 drivers/mtd/nand/mxc_nand.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index db72cdc..62d6965 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -409,7 +409,7 @@ static int mxc_nand_read_oob_syndrome(struct mtd_info *mtd,
 
 	MTDDEBUG(MTD_DEBUG_LEVEL0,
 			"%s: Reading OOB area of page %u to oob %p\n",
-			 __FUNCTION__, host->page_addr, buf);
+			 __func__, page, buf);
 
 	chip->cmdfunc(mtd, NAND_CMD_READOOB, mtd->writesize, page);
 	for (i = 0; i < chip->ecc.steps; i++) {
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 08/30] nand: mxc: Use appropriate page number in syndrome functions
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (5 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 07/30] nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome() Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 09/30] arm: start.S: Fix _TEXT_BASE for SPL Benoît Thébaudeau
                   ` (24 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

The syndrome functions should use the page number passed as argument instead of
the page number saved upon NAND_CMD_READ0.

This does not make any difference if the NAND_NO_AUTOINCR option is set, but
otherwise this fixes accesses to the wrong pages.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4:
 - New patch.

Changes in v3: None
Changes in v2: None

 drivers/mtd/nand/mxc_nand.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 62d6965..29ceab3 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -463,7 +463,7 @@ static int mxc_nand_read_page_raw_syndrome(struct mtd_info *mtd,
 	int n;
 
 	_mxc_nand_enable_hwecc(mtd, 0);
-	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, host->page_addr);
+	chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
 
 	for (n = 0, steps = chip->ecc.steps; steps > 0; n++, steps--) {
 		host->col_addr = n * eccsize;
@@ -507,7 +507,7 @@ static int mxc_nand_read_page_syndrome(struct mtd_info *mtd,
 	uint8_t *oob = chip->oob_poi;
 
 	MTDDEBUG(MTD_DEBUG_LEVEL1, "Reading page %u to buf %p oob %p\n",
-	      host->page_addr, buf, oob);
+	      page, buf, oob);
 
 	/* first read the data area and the available portion of OOB */
 	for (n = 0; eccsteps; n++, eccsteps--, p += eccsize) {
@@ -545,7 +545,7 @@ static int mxc_nand_read_page_syndrome(struct mtd_info *mtd,
 
 	/* Then switch ECC off and read the OOB area to get the ECC code */
 	_mxc_nand_enable_hwecc(mtd, 0);
-	chip->cmdfunc(mtd, NAND_CMD_READOOB, mtd->writesize, host->page_addr);
+	chip->cmdfunc(mtd, NAND_CMD_READOOB, mtd->writesize, page);
 	eccsteps = chip->ecc.steps;
 	oob = chip->oob_poi + chip->ecc.prepad;
 	for (n = 0; eccsteps; n++, eccsteps--, p += eccsize) {
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 09/30] arm: start.S: Fix _TEXT_BASE for SPL
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (6 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 08/30] nand: mxc: Use appropriate page number in syndrome functions Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 10/30] arm: relocate_code() is no longer noreturn Benoît Thébaudeau
                   ` (23 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

_TEXT_BASE must be set to CONFIG_SPL_TEXT_BASE for generic SPL, and to
CONFIG_SYS_TEXT_BASE for non-SPL builds.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Reviewed-by: Tom Rini <trini@ti.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - Apply to mxs SPL too.

Changes in v7: None
Changes in v6:
 - New patch.

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm1136/start.S       |    4 ++++
 arch/arm/cpu/arm1176/start.S       |    8 ++++++++
 arch/arm/cpu/arm720t/start.S       |    2 +-
 arch/arm/cpu/arm920t/start.S       |    4 ++++
 arch/arm/cpu/arm925t/start.S       |    4 ++++
 arch/arm/cpu/arm926ejs/mxs/start.S |    4 ++++
 arch/arm/cpu/arm926ejs/start.S     |    2 +-
 arch/arm/cpu/arm946es/start.S      |    4 ++++
 arch/arm/cpu/arm_intcm/start.S     |    6 +++++-
 arch/arm/cpu/armv7/start.S         |    4 ++++
 arch/arm/cpu/ixp/start.S           |    4 ++++
 arch/arm/cpu/pxa/start.S           |    2 +-
 arch/arm/cpu/s3c44b0/start.S       |    4 ++++
 arch/arm/cpu/sa1100/start.S        |    4 ++++
 14 files changed, 52 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index eba2324..0cd2400 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -88,7 +88,11 @@ _end_vect:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+	.word	CONFIG_SPL_TEXT_BASE
+#else
 	.word	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 3c291fb..accccdc 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -98,7 +98,15 @@ _end_vect:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
 	.word	CONFIG_SYS_TEXT_BASE
+#else
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+	.word	CONFIG_SPL_TEXT_BASE
+#else
+	.word	CONFIG_SYS_TEXT_BASE
+#endif
+#endif
 
 /*
  * Below variable is very important because we use MMU in U-Boot.
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 43bd6ed..1e3e5a1 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -85,7 +85,7 @@ _pad:			.word 0x12345678 /* now 16*4=64 */
 
 .globl _TEXT_BASE
 _TEXT_BASE:
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
 	.word	CONFIG_SPL_TEXT_BASE
 #else
 	.word	CONFIG_SYS_TEXT_BASE
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 2864d12..8c2c836 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -73,7 +73,11 @@ _fiq:			.word fiq
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+	.word	CONFIG_SPL_TEXT_BASE
+#else
 	.word	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
index 827fee2..7f067c0 100644
--- a/arch/arm/cpu/arm925t/start.S
+++ b/arch/arm/cpu/arm925t/start.S
@@ -79,7 +79,11 @@ _fiq:			.word fiq
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+	.word	CONFIG_SPL_TEXT_BASE
+#else
 	.word	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
diff --git a/arch/arm/cpu/arm926ejs/mxs/start.S b/arch/arm/cpu/arm926ejs/mxs/start.S
index 373e6d8..bf54423 100644
--- a/arch/arm/cpu/arm926ejs/mxs/start.S
+++ b/arch/arm/cpu/arm926ejs/mxs/start.S
@@ -119,7 +119,11 @@ fiq:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#ifdef CONFIG_SPL_TEXT_BASE
+	.word	CONFIG_SPL_TEXT_BASE
+#else
 	.word	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index f5d1582..efdff3e 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -123,7 +123,7 @@ _TEXT_BASE:
 #ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
 	.word	CONFIG_SYS_TEXT_BASE
 #else
-#ifdef CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
 	.word	CONFIG_SPL_TEXT_BASE
 #else
 	.word	CONFIG_SYS_TEXT_BASE
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 9dec35b..85adc62 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -89,7 +89,11 @@ _vectors_end:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+	.word	CONFIG_SPL_TEXT_BASE
+#else
 	.word	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index 04d0845..a69fb17 100644
--- a/arch/arm/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
@@ -85,7 +85,11 @@ _fiq:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
-	.word	CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+	.word	CONFIG_SPL_TEXT_BASE
+#else
+	.word	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 36a4c3c..5e5f42e 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -81,7 +81,11 @@ _end_vect:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+	.word	CONFIG_SPL_TEXT_BASE
+#else
 	.word	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index b725964..8f4fa7b 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -98,7 +98,11 @@ _fiq:			.word fiq
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+	.word	CONFIG_SPL_TEXT_BASE
+#else
 	.word	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 456a783..2e2afd7 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -102,7 +102,7 @@ _end_vect:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
-#ifdef	CONFIG_SPL_BUILD
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
 	.word	CONFIG_SPL_TEXT_BASE
 #else
 	.word	CONFIG_SYS_TEXT_BASE
diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
index c096177..aab81f5 100644
--- a/arch/arm/cpu/s3c44b0/start.S
+++ b/arch/arm/cpu/s3c44b0/start.S
@@ -64,7 +64,11 @@ _start:	b       reset
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+	.word	CONFIG_SPL_TEXT_BASE
+#else
 	.word	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 4bf6f5f..01d1a59 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -74,7 +74,11 @@ _fiq:			.word fiq
 
 .globl _TEXT_BASE
 _TEXT_BASE:
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
+	.word	CONFIG_SPL_TEXT_BASE
+#else
 	.word	CONFIG_SYS_TEXT_BASE
+#endif
 
 /*
  * These are defined in the board-specific linker script.
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 10/30] arm: relocate_code() is no longer noreturn
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (7 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 09/30] arm: start.S: Fix _TEXT_BASE for SPL Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 11/30] arm1136: Remove redundant relocate_code() return Benoît Thébaudeau
                   ` (22 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Commit e05e5de7fae5bec79617e113916dac6631251156 made ARM's relocate_code()
return to its caller, but it did not update its declaration accordingly.

Fixing this function declaration fixes dropped C code following calls to
relocate_code().

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - Update relocate_code() description in ARM start.S comments.

Changes in v7: None
Changes in v6:
 - New patch, extracted from "nand: mxc: Switch NAND SPL to generic SPL".

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm1136/start.S   |    4 +---
 arch/arm/cpu/arm1176/start.S   |    4 +---
 arch/arm/cpu/arm720t/start.S   |    4 +---
 arch/arm/cpu/arm920t/start.S   |    4 +---
 arch/arm/cpu/arm925t/start.S   |    4 +---
 arch/arm/cpu/arm926ejs/start.S |    4 +---
 arch/arm/cpu/arm946es/start.S  |    4 +---
 arch/arm/cpu/arm_intcm/start.S |    4 +---
 arch/arm/cpu/armv7/start.S     |    4 +---
 arch/arm/cpu/ixp/start.S       |    4 +---
 arch/arm/cpu/pxa/start.S       |    4 +---
 arch/arm/cpu/s3c44b0/start.S   |    4 +---
 arch/arm/cpu/sa1100/start.S    |    4 +---
 include/common.h               |    6 +++++-
 14 files changed, 18 insertions(+), 40 deletions(-)

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 0cd2400..eda4bc0 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -176,9 +176,7 @@ next:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index accccdc..c0698e6 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -239,9 +239,7 @@ skip_tcmdisable:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 1e3e5a1..c65af3f 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -154,9 +154,7 @@ reset:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 8c2c836..2b8b7ad 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -193,9 +193,7 @@ copyex:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
index 7f067c0..6920c93 100644
--- a/arch/arm/cpu/arm925t/start.S
+++ b/arch/arm/cpu/arm925t/start.S
@@ -183,9 +183,7 @@ poll1:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index efdff3e..90b4e53 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -200,9 +200,7 @@ reset:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 85adc62..84fabf4 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -158,9 +158,7 @@ reset:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index a69fb17..d0f8a48 100644
--- a/arch/arm/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
@@ -154,9 +154,7 @@ reset:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 5e5f42e..0146c76 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -167,9 +167,7 @@ reset:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 ENTRY(relocate_code)
 	mov	r4, r0	/* save addr_sp */
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index 8f4fa7b..0f00e3d 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -256,9 +256,7 @@ reset:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index 2e2afd7..a31dfc0 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -171,9 +171,7 @@ reset:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
index aab81f5..c1ed4f2 100644
--- a/arch/arm/cpu/s3c44b0/start.S
+++ b/arch/arm/cpu/s3c44b0/start.S
@@ -139,9 +139,7 @@ reset:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 01d1a59..fbc2d35 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -143,9 +143,7 @@ reset:
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
- * This "function" does not return, instead it continues in RAM
- * after relocating the monitor code.
- *
+ * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
diff --git a/include/common.h b/include/common.h
index d41aeb4..52df70c 100644
--- a/include/common.h
+++ b/include/common.h
@@ -530,7 +530,11 @@ int	dcache_status (void);
 void	dcache_enable (void);
 void	dcache_disable(void);
 void	mmu_disable(void);
-void	relocate_code (ulong, gd_t *, ulong) __attribute__ ((noreturn));
+void	relocate_code(ulong, gd_t *, ulong)
+#if !defined(CONFIG_ARM)
+__attribute__ ((noreturn))
+#endif
+;
 ulong	get_endaddr   (void);
 void	trap_init     (ulong);
 #if defined (CONFIG_4xx)	|| \
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 11/30] arm1136: Remove redundant relocate_code() return
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (8 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 10/30] arm: relocate_code() is no longer noreturn Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 12/30] arm: relocate_code(): Remove useless relocation offset computation Benoît Thébaudeau
                   ` (21 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
 - New patch, extracted from "nand: mxc: Switch NAND SPL to generic SPL".

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm1136/start.S |    2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index eda4bc0..5225639 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -237,8 +237,6 @@ fixnext:
 	add	r2, r2, #8		/* each rel.dyn entry is 8 bytes */
 	cmp	r2, r3
 	blo	fixloop
-	bx	lr
-
 #endif
 
 relocate_done:
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 12/30] arm: relocate_code(): Remove useless relocation offset computation
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (9 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 11/30] arm1136: Remove redundant relocate_code() return Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 13/30] arm: relocate_code(): Use __image_copy_end for end of relocation Benoît Thébaudeau
                   ` (20 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - Make sure that r9 is initialized in all cases because it may be used after
   relocate_code().

Changes in v7: None
Changes in v6:
 - New patch.

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm1136/start.S   |    8 +++-----
 arch/arm/cpu/arm1176/start.S   |    8 +++-----
 arch/arm/cpu/arm720t/start.S   |    8 +++-----
 arch/arm/cpu/arm920t/start.S   |    8 +++-----
 arch/arm/cpu/arm925t/start.S   |    8 +++-----
 arch/arm/cpu/arm926ejs/start.S |    9 +++------
 arch/arm/cpu/arm946es/start.S  |    8 +++-----
 arch/arm/cpu/arm_intcm/start.S |    8 +++-----
 arch/arm/cpu/armv7/start.S     |    8 +++-----
 arch/arm/cpu/ixp/start.S       |    8 +++-----
 arch/arm/cpu/pxa/start.S       |    8 +++-----
 arch/arm/cpu/s3c44b0/start.S   |    8 +++-----
 arch/arm/cpu/sa1100/start.S    |    8 +++-----
 13 files changed, 39 insertions(+), 66 deletions(-)

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 5225639..67fcc4f 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -185,16 +185,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -203,7 +202,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index c0698e6..17b1277 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -248,16 +248,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -266,7 +265,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index c65af3f..95f4447 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -163,16 +163,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -181,7 +180,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 2b8b7ad..cd8c8db 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -202,16 +202,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -220,7 +219,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
index 6920c93..9358f3e 100644
--- a/arch/arm/cpu/arm925t/start.S
+++ b/arch/arm/cpu/arm925t/start.S
@@ -192,16 +192,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -210,7 +209,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 90b4e53..6949645 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -209,17 +209,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	sub	r9, r6, r0		/* r9 <- relocation offset */
-	cmp	r0, r6
-	moveq	r9, #0			/* no relocation. offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -228,7 +226,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 84fabf4..90c15f2 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -167,16 +167,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -185,7 +184,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index d0f8a48..a6e08ab 100644
--- a/arch/arm/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
@@ -163,16 +163,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -181,7 +180,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 0146c76..222b505 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -175,16 +175,15 @@ ENTRY(relocate_code)
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -192,7 +191,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index 0f00e3d..3a1253d 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -265,16 +265,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -283,7 +282,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index a31dfc0..d807241 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -187,16 +187,15 @@ relocate_code:
 #endif
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -205,7 +204,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
index c1ed4f2..8cd4a5b 100644
--- a/arch/arm/cpu/s3c44b0/start.S
+++ b/arch/arm/cpu/s3c44b0/start.S
@@ -148,16 +148,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -166,7 +165,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index fbc2d35..508c21e 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -152,16 +152,15 @@ relocate_code:
 	mov	r6, r2	/* save addr of destination */
 
 	adr	r0, _start
-	cmp	r0, r6
-	moveq	r9, #0		/* no relocation. relocation offset(r9) = 0 */
+	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
 	ldr	r3, _bss_start_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
-	ldmia	r0!, {r9-r10}		/* copy from source address [r0]    */
-	stmia	r1!, {r9-r10}		/* copy to   target address [r1]    */
+	ldmia	r0!, {r10-r11}		/* copy from source address [r0]    */
+	stmia	r1!, {r10-r11}		/* copy to   target address [r1]    */
 	cmp	r0, r2			/* until source end address [r2]    */
 	blo	copy_loop
 
@@ -170,7 +169,6 @@ copy_loop:
 	 * fix .rel.dyn relocations
 	 */
 	ldr	r0, _TEXT_BASE		/* r0 <- Text base */
-	sub	r9, r6, r0		/* r9 <- relocation offset */
 	ldr	r10, _dynsym_start_ofs	/* r10 <- sym table ofs */
 	add	r10, r10, r0		/* r10 <- sym table in FLASH */
 	ldr	r2, _rel_dyn_start_ofs	/* r2 <- rel dyn start ofs */
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 13/30] arm: relocate_code(): Use __image_copy_end for end of relocation
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (10 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 12/30] arm: relocate_code(): Remove useless relocation offset computation Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 14/30] arm: crt0.S: Remove bogus .globl Benoît Thébaudeau
                   ` (19 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Use __image_copy_end instead of __bss_start for the end of the image to
relocate. This is the same as commit 033ca72, but applied to all ARM start.S.

This is a more appropriate symbol naming for an image copy & relocate feature,
and this also saves a useless copy of data put between __image_copy_end and
__bss_start in linker scripts (e.g. relocation information, or MMU
initialization tables used only before jumping to the relocated image).

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10:
 - Rebase on current u-boot-arm/master.

Changes in v9: None
Changes in v8:
 - Fix "space before tab" warning.
 - Give more details in patch description.

Changes in v7: None
Changes in v6:
 - New patch.

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm1136/start.S               |    4 ++--
 arch/arm/cpu/arm1176/start.S               |    6 +++++-
 arch/arm/cpu/arm720t/start.S               |    6 +++++-
 arch/arm/cpu/arm920t/ep93xx/u-boot.lds     |    3 +++
 arch/arm/cpu/arm920t/start.S               |    6 +++++-
 arch/arm/cpu/arm925t/start.S               |    6 +++++-
 arch/arm/cpu/arm926ejs/start.S             |    6 +++++-
 arch/arm/cpu/arm946es/start.S              |    6 +++++-
 arch/arm/cpu/arm_intcm/start.S             |    6 +++++-
 arch/arm/cpu/armv7/start.S                 |    4 ++--
 arch/arm/cpu/ixp/start.S                   |    6 +++++-
 arch/arm/cpu/ixp/u-boot.lds                |    2 ++
 arch/arm/cpu/pxa/start.S                   |    6 +++++-
 arch/arm/cpu/s3c44b0/start.S               |    6 +++++-
 arch/arm/cpu/sa1100/start.S                |    6 +++++-
 board/actux1/u-boot.lds                    |    3 +++
 board/actux2/u-boot.lds                    |    3 +++
 board/actux3/u-boot.lds                    |    3 +++
 board/davinci/da8xxevm/u-boot-spl-hawk.lds |    1 +
 board/dvlhost/u-boot.lds                   |    3 +++
 board/samsung/smdk6400/u-boot-nand.lds     |    4 ++++
 board/vpac270/u-boot-spl.lds               |    2 ++
 nand_spl/board/karo/tx25/u-boot.lds        |    2 ++
 nand_spl/board/samsung/smdk6400/u-boot.lds |    2 ++
 24 files changed, 87 insertions(+), 15 deletions(-)

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index 67fcc4f..e36d7d3 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -104,9 +104,9 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
-.global	_image_copy_end_ofs
+.globl _image_copy_end_ofs
 _image_copy_end_ofs:
-	.word 	__image_copy_end - _start
+	.word __image_copy_end - _start
 
 .globl _bss_end_ofs
 _bss_end_ofs:
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 17b1277..0b570d5 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -127,6 +127,10 @@ _TEXT_PHY_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -251,7 +255,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index 95f4447..a640eaa 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -101,6 +101,10 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -166,7 +170,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
index e483820..d0b1ada 100644
--- a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
+++ b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
@@ -55,6 +55,9 @@ SECTIONS
 	}
 
 	. = ALIGN(4);
+
+	__image_copy_end = .;
+
 	__bss_start = .;
 	.bss : { *(.bss) }
 	__bss_end = .;
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index cd8c8db..940ce72 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -89,6 +89,10 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -205,7 +209,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
index 9358f3e..ed683b4 100644
--- a/arch/arm/cpu/arm925t/start.S
+++ b/arch/arm/cpu/arm925t/start.S
@@ -95,6 +95,10 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -195,7 +199,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 6949645..552279f 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -140,6 +140,10 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -212,7 +216,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 90c15f2..2dd1fa3 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -105,6 +105,10 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -170,7 +174,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index a6e08ab..cc054e8 100644
--- a/arch/arm/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
@@ -101,6 +101,10 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -166,7 +170,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index 222b505..d0b17c9 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -94,9 +94,9 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
-.global	_image_copy_end_ofs
+.globl _image_copy_end_ofs
 _image_copy_end_ofs:
-	.word 	__image_copy_end - _start
+	.word __image_copy_end - _start
 
 .globl _bss_end_ofs
 _bss_end_ofs:
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index 3a1253d..a305ff5 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -114,6 +114,10 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -268,7 +272,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/arch/arm/cpu/ixp/u-boot.lds b/arch/arm/cpu/ixp/u-boot.lds
index 8345b55..388a67f 100644
--- a/arch/arm/cpu/ixp/u-boot.lds
+++ b/arch/arm/cpu/ixp/u-boot.lds
@@ -54,6 +54,8 @@ SECTIONS
 
 	. = ALIGN(4);
 
+	__image_copy_end = .;
+
 	.rel.dyn : {
 		__rel_dyn_start = .;
 		*(.rel*)
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index d807241..cd88af8 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -118,6 +118,10 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -190,7 +194,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
index 8cd4a5b..579f6e2 100644
--- a/arch/arm/cpu/s3c44b0/start.S
+++ b/arch/arm/cpu/s3c44b0/start.S
@@ -80,6 +80,10 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -151,7 +155,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 508c21e..13cf132 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -90,6 +90,10 @@ _TEXT_BASE:
 _bss_start_ofs:
 	.word __bss_start - _start
 
+.globl _image_copy_end_ofs
+_image_copy_end_ofs:
+	.word __image_copy_end - _start
+
 .globl _bss_end_ofs
 _bss_end_ofs:
 	.word __bss_end - _start
@@ -155,7 +159,7 @@ relocate_code:
 	subs	r9, r6, r0		/* r9 <- relocation offset */
 	beq	relocate_done		/* skip relocation */
 	mov	r1, r6			/* r1 <- scratch for copy_loop */
-	ldr	r3, _bss_start_ofs
+	ldr	r3, _image_copy_end_ofs
 	add	r2, r0, r3		/* r2 <- source end address	    */
 
 copy_loop:
diff --git a/board/actux1/u-boot.lds b/board/actux1/u-boot.lds
index c76728a..52fc9fc 100644
--- a/board/actux1/u-boot.lds
+++ b/board/actux1/u-boot.lds
@@ -61,6 +61,9 @@ SECTIONS
 	}
 
 	. = ALIGN (4);
+
+	__image_copy_end = .;
+
 	.rel.dyn : {
 		__rel_dyn_start = .;
 		*(.rel*)
diff --git a/board/actux2/u-boot.lds b/board/actux2/u-boot.lds
index 984f70e..cafd3d8 100644
--- a/board/actux2/u-boot.lds
+++ b/board/actux2/u-boot.lds
@@ -61,6 +61,9 @@ SECTIONS
 	}
 
 	. = ALIGN (4);
+
+	__image_copy_end = .;
+
 	.rel.dyn : {
 		__rel_dyn_start = .;
 		*(.rel*)
diff --git a/board/actux3/u-boot.lds b/board/actux3/u-boot.lds
index fc48cf0..168fe17 100644
--- a/board/actux3/u-boot.lds
+++ b/board/actux3/u-boot.lds
@@ -61,6 +61,9 @@ SECTIONS
 	}
 
 	. = ALIGN (4);
+
+	__image_copy_end = .;
+
 	.rel.dyn : {
 		__rel_dyn_start = .;
 		*(.rel*)
diff --git a/board/davinci/da8xxevm/u-boot-spl-hawk.lds b/board/davinci/da8xxevm/u-boot-spl-hawk.lds
index 2557830..4839364 100644
--- a/board/davinci/da8xxevm/u-boot-spl-hawk.lds
+++ b/board/davinci/da8xxevm/u-boot-spl-hawk.lds
@@ -58,6 +58,7 @@ SECTIONS
 	}
 
 	. = ALIGN(4);
+	__image_copy_end = .;
 	__rel_dyn_start = .;
 	__rel_dyn_end = .;
 	__dynsym_start = .;
diff --git a/board/dvlhost/u-boot.lds b/board/dvlhost/u-boot.lds
index b13d3e1..dd50bdb 100644
--- a/board/dvlhost/u-boot.lds
+++ b/board/dvlhost/u-boot.lds
@@ -61,6 +61,9 @@ SECTIONS
 	}
 
 	. = ALIGN (4);
+
+	__image_copy_end = .;
+
 	.rel.dyn : {
 		__rel_dyn_start = .;
 		*(.rel*)
diff --git a/board/samsung/smdk6400/u-boot-nand.lds b/board/samsung/smdk6400/u-boot-nand.lds
index 64c650d..7c74267 100644
--- a/board/samsung/smdk6400/u-boot-nand.lds
+++ b/board/samsung/smdk6400/u-boot-nand.lds
@@ -53,6 +53,10 @@ SECTIONS
 		KEEP(*(SORT(.u_boot_list*)));
 	}
 
+	. = ALIGN(4);
+
+	__image_copy_end = .;
+
 	. = align(4);
 	.mmudata : { *(.mmudata) }
 
diff --git a/board/vpac270/u-boot-spl.lds b/board/vpac270/u-boot-spl.lds
index dc437d1..ab65407 100644
--- a/board/vpac270/u-boot-spl.lds
+++ b/board/vpac270/u-boot-spl.lds
@@ -59,6 +59,8 @@ SECTIONS
 
 	. = ALIGN(4);
 
+	__image_copy_end = .;
+
 	.rel.dyn : {
 		__rel_dyn_start = .;
 		*(.rel*)
diff --git a/nand_spl/board/karo/tx25/u-boot.lds b/nand_spl/board/karo/tx25/u-boot.lds
index 4d1aac3..e5363e2 100644
--- a/nand_spl/board/karo/tx25/u-boot.lds
+++ b/nand_spl/board/karo/tx25/u-boot.lds
@@ -54,6 +54,8 @@ SECTIONS
 
 	. = ALIGN(4);
 
+	__image_copy_end = .;
+
 	.rel.dyn : {
 		__rel_dyn_start = .;
 		*(.rel*)
diff --git a/nand_spl/board/samsung/smdk6400/u-boot.lds b/nand_spl/board/samsung/smdk6400/u-boot.lds
index b6c573b..78907fd 100644
--- a/nand_spl/board/samsung/smdk6400/u-boot.lds
+++ b/nand_spl/board/samsung/smdk6400/u-boot.lds
@@ -58,6 +58,8 @@ SECTIONS
 
 	. = ALIGN(4);
 
+	__image_copy_end = .;
+
 	.rel.dyn : {
 	__rel_dyn_start = .;
 	*(.rel*)
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 14/30] arm: crt0.S: Remove bogus .globl
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (11 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 13/30] arm: relocate_code(): Use __image_copy_end for end of relocation Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 15/30] autoconfig.mk: Make it possible to define configs from other configs Benoît Thébaudeau
                   ` (18 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

The purpose of .globl is to export symbols for ld, not to declare external
symbols.

By the way, use the ENTRY() and ENDPROC() macros to define functions rather than
using .global directly.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10:
 - Rebase on current u-boot-arm/master.

Changes in v9: None
Changes in v8:
 - Use ENTRY() and ENDPROC() to define functions.

Changes in v7: None
Changes in v6:
 - New patch.

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/lib/crt0.S |   28 ++++------------------------
 1 file changed, 4 insertions(+), 24 deletions(-)

diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 37d9927..1524f7e 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -24,6 +24,7 @@
 
 #include <config.h>
 #include <asm-offsets.h>
+#include <linux/linkage.h>
 
 /*
  * This file handles the target-independent stages of the U-Boot
@@ -67,33 +68,10 @@
  */
 
 /*
- * declare nand_boot() or board_init_r() to jump to at end of crt0
- */
-
-#if defined(CONFIG_NAND_SPL)
-
-.globl nand_boot
-
-#elif ! defined(CONFIG_SPL_BUILD)
-
-.globl board_init_r
-
-#endif
-
-/*
- * start and end of BSS
- */
-
-.globl __bss_start
-.globl __bss_end
-
-/*
  * entry point of crt0 sequence
  */
 
-.global _main
-
-_main:
+ENTRY(_main)
 
 /*
  * Set up initial C runtime environment and call board_init_f(0).
@@ -171,3 +149,5 @@ clbss_l:cmp	r0, r1			/* while not at end of BSS */
 	/* we should not return here. */
 
 #endif
+
+ENDPROC(_main)
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 15/30] autoconfig.mk: Make it possible to define configs from other configs
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (12 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 14/30] arm: crt0.S: Remove bogus .globl Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 16/30] Makefile: Change CONFIG_SPL_PAD_TO to image offset Benoît Thébaudeau
                   ` (17 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Give more flexibility to define configs that can be interpreted by make, e.g. to
define fallback values of configs like in the example below.

Before this change, the config lines:
 #define CONFIG_SPL_MAX_SIZE	2048
 #define CONFIG_SPL_PAD_TO	CONFIG_SPL_MAX_SIZE
would have been changed in autoconfig.mk into:
 CONFIG_SPL_MAX_SIZE=2048
 CONFIG_SPL_PAD_TO="CONFIG_SPL_MAX_SIZE"

Hence, a make recipe using as an argument to $(OBJCOPY):
 --pad-to=$(CONFIG_SPL_PAD_TO)
would have issued:
 --pad-to="CONFIG_SPL_MAX_SIZE"
which means nothing for $(OBJCOPY) and makes it fail.

Thanks to this change, the config lines above are changed in autoconfig.mk into:
 CONFIG_SPL_MAX_SIZE=2048
 CONFIG_SPL_PAD_TO=$(CONFIG_SPL_MAX_SIZE)

Hence, the make recipe above now issues:
 --pad-to=2048
as expected from the defined config.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Reviewed-by: Tom Rini <trini@ti.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9:
 - Add detailed patch description.

Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 tools/scripts/define2mk.sed |    2 ++
 1 file changed, 2 insertions(+)

diff --git a/tools/scripts/define2mk.sed b/tools/scripts/define2mk.sed
index 13e2845..c641edf 100644
--- a/tools/scripts/define2mk.sed
+++ b/tools/scripts/define2mk.sed
@@ -24,6 +24,8 @@
 	s/="\([0-9][0-9]*\)"/=\1/;
 	# ... and from hex numbers
 	s/="\(0[Xx][0-9a-fA-F][0-9a-fA-F]*\)"/=\1/;
+	# ... and from configs defined from other configs
+	s/="\(CONFIG_[A-Za-z0-9_][A-Za-z0-9_]*\)"/=$(\1)/;
 	# Change '1' and empty values to "y" (not perfect, but
 	# supports conditional compilation in the makefiles
 	s/=$/=y/;
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 16/30] Makefile: Change CONFIG_SPL_PAD_TO to image offset
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (13 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 15/30] autoconfig.mk: Make it possible to define configs from other configs Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 17/30] imx: Fix automatic make targets for imx images Benoît Thébaudeau
                   ` (16 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Change CONFIG_SPL_PAD_TO from a link address to an image offset since this is
more handy and closer to the purpose of this config.

Automatically define CONFIG_SPL_PAD_TO to CONFIG_SPL_MAX_SIZE (or 0 without
CONFIG_SPL_MAX_SIZE).

Test that CONFIG_SPL_PAD_TO >= CONFIG_SPL_MAX_SIZE if CONFIG_SPL_PAD_TO is
non-zero.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - Rebase on latest u-boot-imx/master.
 - Use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for u-boot-with-spl.bin
   padding.

Changes in v7:
 - Use u-boot-spl.bin instead of u-boot-spl in order to avoid having to use
   --change-addresses.

Changes in v6:
 - Fix size passed to --pad-to thanks to --change-addresses.

Changes in v5: None
Changes in v4:
 - New patch.

Changes in v3: None
Changes in v2: None

 Makefile                      |    5 ++---
 README                        |    7 +++++--
 include/config_fallbacks.h    |   16 ++++++++++++++++
 include/configs/MPC8313ERDB.h |    2 +-
 4 files changed, 24 insertions(+), 6 deletions(-)

diff --git a/Makefile b/Makefile
index 4ede937..8d0e2b8 100644
--- a/Makefile
+++ b/Makefile
@@ -486,9 +486,8 @@ $(obj)u-boot.dis:	$(obj)u-boot
 
 
 $(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
-		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(or $(CONFIG_SPL_PAD_TO),0) \
-			-O binary $(obj)spl/u-boot-spl \
-			$(obj)spl/u-boot-spl-pad.bin
+		$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+			-I binary -O binary $< $(obj)spl/u-boot-spl-pad.bin
 		cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
 		rm $(obj)spl/u-boot-spl-pad.bin
 
diff --git a/README b/README
index 9285ddd..6272853 100644
--- a/README
+++ b/README
@@ -2908,8 +2908,11 @@ FIT uImage format:
 		Support for lib/libgeneric.o in SPL binary
 
 		CONFIG_SPL_PAD_TO
-		Linker address to which the SPL should be padded before
-		appending the SPL payload.
+		Image offset to which the SPL should be padded before appending
+		the SPL payload. By default, this is defined as
+		CONFIG_SPL_MAX_SIZE, or 0 if CONFIG_SPL_MAX_SIZE is undefined.
+		CONFIG_SPL_PAD_TO must be either 0, meaning to append the SPL
+		payload without any padding, or >= CONFIG_SPL_MAX_SIZE.
 
 		CONFIG_SPL_TARGET
 		Final target image containing SPL and payload.  Some SPLs
diff --git a/include/config_fallbacks.h b/include/config_fallbacks.h
index 9298d0e..e59ee96 100644
--- a/include/config_fallbacks.h
+++ b/include/config_fallbacks.h
@@ -9,6 +9,22 @@
 #ifndef __CONFIG_FALLBACKS_H
 #define __CONFIG_FALLBACKS_H
 
+#ifdef CONFIG_SPL
+#ifdef CONFIG_SPL_PAD_TO
+#ifdef CONFIG_SPL_MAX_SIZE
+#if CONFIG_SPL_PAD_TO && CONFIG_SPL_PAD_TO < CONFIG_SPL_MAX_SIZE
+#error CONFIG_SPL_PAD_TO < CONFIG_SPL_MAX_SIZE
+#endif
+#endif
+#else
+#ifdef CONFIG_SPL_MAX_SIZE
+#define CONFIG_SPL_PAD_TO	CONFIG_SPL_MAX_SIZE
+#else
+#define CONFIG_SPL_PAD_TO	0
+#endif
+#endif
+#endif
+
 #ifndef CONFIG_SYS_BAUDRATE_TABLE
 #define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
 #endif
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
index 275d4f2..c28dfe0 100644
--- a/include/configs/MPC8313ERDB.h
+++ b/include/configs/MPC8313ERDB.h
@@ -52,7 +52,7 @@
 #define CONFIG_SYS_TEXT_BASE	0x00100000 /* CONFIG_SYS_NAND_U_BOOT_DST */
 #define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
 #define CONFIG_SPL_MAX_SIZE	(4 * 1024)
-#define CONFIG_SPL_PAD_TO	0xfff04000
+#define CONFIG_SPL_PAD_TO	0x4000
 
 #define CONFIG_SYS_NAND_U_BOOT_SIZE  (512 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST   0x00100000
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 17/30] imx: Fix automatic make targets for imx images
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (14 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 16/30] Makefile: Change CONFIG_SPL_PAD_TO to image offset Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 18/30] nand: mxc: Switch NAND SPL to generic SPL Benoît Thébaudeau
                   ` (15 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Automatically build the 'u-boot.imx' (i.e. imx header + u-boot.bin) and 'SPL'
(i.e. imx header + u-boot-spl.bin) make targets for all imx processors
supporting this header, so for arm926ejs, arm1136 and armv7. Some combinations
were missing.

At the same time, fix the build of SPL targets not supporting the imx header on
arm1136. For arm1136, the 'SPL' make target was forced to build in all cases if
CONFIG_SPL_BUILD was defined, even for non-imx platforms or imx setups without
an imx header.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
 - New patch, extracted from "nand: mxc: Switch NAND SPL to generic SPL".

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm1136/config.mk   |    7 +++++++
 arch/arm/cpu/arm926ejs/config.mk |    8 ++++++--
 arch/arm/cpu/armv7/config.mk     |    6 ++++++
 3 files changed, 19 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/arm1136/config.mk b/arch/arm/cpu/arm1136/config.mk
index 9092d91..797d122 100644
--- a/arch/arm/cpu/arm1136/config.mk
+++ b/arch/arm/cpu/arm1136/config.mk
@@ -31,6 +31,13 @@ PLATFORM_CPPFLAGS += -march=armv5
 # =========================================================================
 PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
 PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
+
+ifneq ($(CONFIG_IMX_CONFIG),)
+ifdef CONFIG_SPL
 ifdef CONFIG_SPL_BUILD
 ALL-y	+= $(OBJTREE)/SPL
 endif
+else
+ALL-y	+= $(obj)u-boot.imx
+endif
+endif
diff --git a/arch/arm/cpu/arm926ejs/config.mk b/arch/arm/cpu/arm926ejs/config.mk
index 6a3a1bb..f0e31d1 100644
--- a/arch/arm/cpu/arm926ejs/config.mk
+++ b/arch/arm/cpu/arm926ejs/config.mk
@@ -33,7 +33,11 @@ PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,$(call cc-option,-mali
 PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
 
 ifneq ($(CONFIG_IMX_CONFIG),)
-
+ifdef CONFIG_SPL
+ifdef CONFIG_SPL_BUILD
+ALL-y	+= $(OBJTREE)/SPL
+endif
+else
 ALL-y	+= $(obj)u-boot.imx
-
+endif
 endif
diff --git a/arch/arm/cpu/armv7/config.mk b/arch/arm/cpu/armv7/config.mk
index 9c3e2f3..56b8053 100644
--- a/arch/arm/cpu/armv7/config.mk
+++ b/arch/arm/cpu/armv7/config.mk
@@ -40,5 +40,11 @@ PF_NO_UNALIGNED := $(call cc-option, -mno-unaligned-access,)
 PLATFORM_NO_UNALIGNED := $(PF_NO_UNALIGNED)
 
 ifneq ($(CONFIG_IMX_CONFIG),)
+ifdef CONFIG_SPL
+ifdef CONFIG_SPL_BUILD
+ALL-y	+= $(OBJTREE)/SPL
+endif
+else
 ALL-y	+= $(obj)u-boot.imx
 endif
+endif
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 18/30] nand: mxc: Switch NAND SPL to generic SPL
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (15 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 17/30] imx: Fix automatic make targets for imx images Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 20:17   ` Albert ARIBAUD
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 19/30] arm926ejs: Remove deprecated and now unused NAND SPL Benoît Thébaudeau
                   ` (14 subsequent siblings)
  31 siblings, 1 reply; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

This also fixes support for mx31pdk and tx25, which had been broken by commit
e05e5de7fae5bec79617e113916dac6631251156.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes in v11:
 - mx31pdk: Rename u-boot-nand.bin to u-boot-with-spl.bin (new target binary
   name) in prg_uboot command.
 - mx31pdk: Enlarge CONFIG_SYS_NAND_U_BOOT_SIZE from 0x32000 to 0x3f800 (which
   corresponds to the size allocated for this purpose in NAND Flash) in order to
   leave enough room whatever the toolchain used.
 - mx31pdk: Set back CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE by 0x00100000
   because the original U-Boot at CONFIG_SYS_TEXT_BASE was overlapping the
   global data being written prior to relocation by
   arch/arm/lib/board.c:board_init_f().

Changes in v10:
 - Rebase on current u-boot-arm/master, especially following commits 3ebd1cb and
   65cdd64, which make it necessary to change CONFIG_SPL_LDSCRIPT to
   "arch/$(ARCH)/cpu/u-boot-spl.lds" for mx31pdk.h and tx25.h.

Changes in v9: None
Changes in v8:
 - Update doc/README.arm-relocation.
 - Drop useless line feed at end of inline asm.
 - Set CONFIG_SYS_NAND_U_BOOT_OFFS to CONFIG_SPL_PAD_TO instead of
   CONFIG_SPL_MAX_SIZE (this is a cosmetic change since they now have the same
   value).
 - Enlarge CONFIG_SYS_NAND_U_BOOT_SIZE from 0x30000 to 0x32000 to let u-boot.bin
   fit in for mx31pdk.

Changes in v7: None
Changes in v6:
 - Automate 'u-boot.imx' and 'SPL' make targets for all imx processors.
 - Move board_init_f() to <board>.c.
 - Get rid of board SPL linker scripts.
 - Define CONFIG_SYS_NAND_U_BOOT_OFFS as CONFIG_SPL_MAX_SIZE rather than
   duplicating the constant value.
 - Define CONFIG_SYS_NAND_U_BOOT_DST as CONFIG_SYS_TEXT_BASE rather than
   duplicating the constant value.
 - Pass 0 as the 1st argument to relocate_code() since it's unused.
 - Fix stack pointers.
 - Rebase on latest u-boot-imx/master.
 - Move unrelated changes to separate patches.

Changes in v5:
 - Remove spaces between function name and open parenthesis.
 - Fix mx31pdk and tx25 Makefile-s and SPL linker scripts.
 - Remove the useless definition of CONFIG_SPL_LDSCRIPT.
 - Fix the call to nand_boot().

Changes in v4:
 - New patch.

Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm926ejs/start.S                     |    3 +-
 board/freescale/mx31pdk/Makefile                   |    3 +
 board/freescale/mx31pdk/config.mk                  |    5 --
 board/freescale/mx31pdk/mx31pdk.c                  |    8 ++
 board/karo/tx25/Makefile                           |    4 +-
 board/karo/tx25/config.mk                          |    5 --
 board/karo/tx25/tx25.c                             |    8 ++
 boards.cfg                                         |    2 +-
 doc/README.arm-relocation                          |   14 ++--
 drivers/mtd/nand/Makefile                          |    1 +
 drivers/mtd/nand/mxc_nand.c                        |   10 +--
 include/fsl_nfc.h => drivers/mtd/nand/mxc_nand.h   |   10 +--
 .../mtd/nand/mxc_nand_spl.c                        |   26 ++----
 include/configs/mx31pdk.h                          |   21 +++--
 include/configs/tx25.h                             |   22 +++--
 nand_spl/board/freescale/mx31pdk/Makefile          |   63 --------------
 nand_spl/board/freescale/mx31pdk/u-boot.lds        |   87 --------------------
 nand_spl/board/karo/tx25/Makefile                  |   84 -------------------
 nand_spl/board/karo/tx25/config.mk                 |    1 -
 nand_spl/board/karo/tx25/u-boot.lds                |   87 --------------------
 20 files changed, 81 insertions(+), 383 deletions(-)
 delete mode 100644 board/freescale/mx31pdk/config.mk
 delete mode 100644 board/karo/tx25/config.mk
 rename include/fsl_nfc.h => drivers/mtd/nand/mxc_nand.h (98%)
 rename nand_spl/nand_boot_fsl_nfc.c => drivers/mtd/nand/mxc_nand_spl.c (92%)
 delete mode 100644 nand_spl/board/freescale/mx31pdk/Makefile
 delete mode 100644 nand_spl/board/freescale/mx31pdk/u-boot.lds
 delete mode 100644 nand_spl/board/karo/tx25/Makefile
 delete mode 100644 nand_spl/board/karo/tx25/config.mk
 delete mode 100644 nand_spl/board/karo/tx25/u-boot.lds

diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 552279f..0a9cf1d 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -200,7 +200,6 @@ reset:
 
 /*------------------------------------------------------------------------------*/
 
-#if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_NAND_SPL)
 /*
  * void relocate_code (addr_sp, gd, addr_moni)
  *
@@ -269,6 +268,8 @@ relocate_done:
 
 	bx	lr
 
+#ifndef CONFIG_SPL_BUILD
+
 _rel_dyn_start_ofs:
 	.word __rel_dyn_start - _start
 _rel_dyn_end_ofs:
diff --git a/board/freescale/mx31pdk/Makefile b/board/freescale/mx31pdk/Makefile
index 5b7cafd..b910722 100644
--- a/board/freescale/mx31pdk/Makefile
+++ b/board/freescale/mx31pdk/Makefile
@@ -27,6 +27,9 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).o
 
+ifdef CONFIG_SPL_BUILD
+SOBJS	:= lowlevel_init.o
+endif
 COBJS	:= mx31pdk.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/freescale/mx31pdk/config.mk b/board/freescale/mx31pdk/config.mk
deleted file mode 100644
index de2c642..0000000
--- a/board/freescale/mx31pdk/config.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-ifdef CONFIG_NAND_SPL
-CONFIG_SYS_TEXT_BASE = 0x87ec0000
-else
-CONFIG_SYS_TEXT_BASE = 0x87f00000
-endif
diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
index 895396c..3d0d419 100644
--- a/board/freescale/mx31pdk/mx31pdk.c
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -36,6 +36,14 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong bootflag)
+{
+	relocate_code(0, NULL, CONFIG_SPL_TEXT_BASE);
+	asm volatile("ldr pc, =nand_boot");
+}
+#endif
+
 int dram_init(void)
 {
 	/* dram_init must store complete ramsize in gd->ram_size */
diff --git a/board/karo/tx25/Makefile b/board/karo/tx25/Makefile
index 9617fa5..c26bf36 100644
--- a/board/karo/tx25/Makefile
+++ b/board/karo/tx25/Makefile
@@ -25,8 +25,10 @@ include $(TOPDIR)/config.mk
 
 LIB	= $(obj)lib$(BOARD).o
 
-COBJS	:= tx25.o
+ifdef CONFIG_SPL_BUILD
 SOBJS	:= lowlevel_init.o
+endif
+COBJS	:= tx25.o
 
 SRCS	:= $(SOBJS:.o=.S) $(COBJS:.o=.c)
 OBJS	:= $(addprefix $(obj),$(COBJS))
diff --git a/board/karo/tx25/config.mk b/board/karo/tx25/config.mk
deleted file mode 100644
index 18b2883..0000000
--- a/board/karo/tx25/config.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-ifdef CONFIG_NAND_SPL
-CONFIG_SYS_TEXT_BASE = 0x810c0000
-else
-CONFIG_SYS_TEXT_BASE = 0x81200000
-endif
diff --git a/board/karo/tx25/tx25.c b/board/karo/tx25/tx25.c
index 362f00a..69ee590 100644
--- a/board/karo/tx25/tx25.c
+++ b/board/karo/tx25/tx25.c
@@ -33,6 +33,14 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#ifdef CONFIG_SPL_BUILD
+void board_init_f(ulong bootflag)
+{
+	relocate_code(0, NULL, CONFIG_SPL_TEXT_BASE);
+	asm volatile("ldr pc, =nand_boot");
+}
+#endif
+
 #ifdef CONFIG_FEC_MXC
 #define GPIO_FEC_RESET_B	IMX_GPIO_NR(4, 7)
 #define GPIO_FEC_ENABLE_B	IMX_GPIO_NR(4, 9)
diff --git a/boards.cfg b/boards.cfg
index 1acf56a..860d8f1 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -45,7 +45,7 @@ imx31_phycore                arm         arm1136     -                   -
 imx31_phycore_eet            arm         arm1136     imx31_phycore       -              mx31         imx31_phycore:IMX31_PHYCORE_EET
 qong                         arm         arm1136     -                   davedenx       mx31
 mx31ads                      arm         arm1136     -                   freescale      mx31
-mx31pdk                      arm         arm1136     -                   freescale      mx31         mx31pdk:NAND_U_BOOT
+mx31pdk                      arm         arm1136     -                   freescale      mx31
 tt01                         arm         arm1136     -                   hale           mx31
 imx31_litekit                arm         arm1136     -                   logicpd        mx31
 flea3                        arm         arm1136     -                   CarMediaLab    mx35
diff --git a/doc/README.arm-relocation b/doc/README.arm-relocation
index 5a9a2fb..645b374 100644
--- a/doc/README.arm-relocation
+++ b/doc/README.arm-relocation
@@ -40,15 +40,15 @@ Boards which are not fixed to support relocation will be REMOVED!
 
 -----------------------------------------------------------------------------
 
-For boards which boot from nand_spl, it is possible to save one copy
+For boards which boot from spl, it is possible to save one copy
 if CONFIG_SYS_TEXT_BASE == relocation address! This prevents that uboot code
 is copied again in relocate_code().
 
-example for the tx25 board:
+example for the tx25 board booting from NAND Flash:
 
 a) cpu starts
 b) it copies the first page in nand to internal ram
-   (nand_spl_code)
+   (spl code)
 c) end executes this code
 d) this initialize CPU, RAM, ... and copy itself to RAM
    (this bin must fit in one page, so board_init_f()
@@ -79,20 +79,20 @@ TODO
 
 -----------------------------------------------------------------------------
 
-Relocation with NAND_SPL (example for the tx25):
+Relocation with SPL (example for the tx25 booting from NAND Flash):
 
 - cpu copies the first page from NAND to 0xbb000000 (IMX_NFC_BASE)
   and start with code execution on this address.
 
-- The First page contains u-boot code from u-boot:nand_spl/nand_boot_fsl_nfc.c
-  which inits the dram, cpu registers, reloacte itself to CONFIG_SYS_TEXT_BASE	and loads
+- The First page contains u-boot code from drivers/mtd/nand/mxc_nand_spl.c
+  which inits the dram, cpu registers, reloacte itself to CONFIG_SPL_TEXT_BASE	and loads
   the "real" u-boot to CONFIG_SYS_NAND_U_BOOT_DST and starts execution
   @CONFIG_SYS_NAND_U_BOOT_START
 
 - This u-boot does no RAM init, nor CPU register setup. Just look
   where it has to copy and relocate itself to this address. If
   relocate address = CONFIG_SYS_TEXT_BASE (not the same, as the
-  CONFIG_SYS_TEXT_BASE from the nand_spl code), then there is no need
+  CONFIG_SPL_TEXT_BASE from the spl code), then there is no need
   to copy, just go on with bss clear and jump to board_init_r.
 
 -----------------------------------------------------------------------------
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index c77c0c4..bcb7161 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -82,6 +82,7 @@ COBJS-$(CONFIG_NAND_PLAT) += nand_plat.o
 else  # minimal SPL drivers
 
 COBJS-$(CONFIG_NAND_FSL_ELBC) += fsl_elbc_spl.o
+COBJS-$(CONFIG_NAND_MXC) += mxc_nand_spl.o
 
 endif # drivers
 endif # nand
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c
index 29ceab3..507bbc2 100644
--- a/drivers/mtd/nand/mxc_nand.c
+++ b/drivers/mtd/nand/mxc_nand.c
@@ -26,7 +26,7 @@
 	defined(CONFIG_MX51) || defined(CONFIG_MX53)
 #include <asm/arch/imx-regs.h>
 #endif
-#include <fsl_nfc.h>
+#include "mxc_nand.h"
 
 #define DRIVER_NAME "mxc_nand"
 
@@ -36,9 +36,9 @@ struct mxc_nand_host {
 	struct mtd_info			mtd;
 	struct nand_chip		*nand;
 
-	struct fsl_nfc_regs __iomem	*regs;
+	struct mxc_nand_regs __iomem	*regs;
 #ifdef MXC_NFC_V3_2
-	struct fsl_nfc_ip_regs __iomem	*ip_regs;
+	struct mxc_nand_ip_regs __iomem	*ip_regs;
 #endif
 	int				spare_only;
 	int				status_request;
@@ -1213,10 +1213,10 @@ int board_nand_init(struct nand_chip *this)
 	this->read_buf = mxc_nand_read_buf;
 	this->verify_buf = mxc_nand_verify_buf;
 
-	host->regs = (struct fsl_nfc_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
+	host->regs = (struct mxc_nand_regs __iomem *)CONFIG_MXC_NAND_REGS_BASE;
 #ifdef MXC_NFC_V3_2
 	host->ip_regs =
-		(struct fsl_nfc_ip_regs __iomem *)CONFIG_MXC_NAND_IP_REGS_BASE;
+		(struct mxc_nand_ip_regs __iomem *)CONFIG_MXC_NAND_IP_REGS_BASE;
 #endif
 	host->clk_act = 1;
 
diff --git a/include/fsl_nfc.h b/drivers/mtd/nand/mxc_nand.h
similarity index 98%
rename from include/fsl_nfc.h
rename to drivers/mtd/nand/mxc_nand.h
index 48a6448..308ff8d 100644
--- a/include/fsl_nfc.h
+++ b/drivers/mtd/nand/mxc_nand.h
@@ -20,8 +20,8 @@
  * MA 02111-1307 USA
  */
 
-#ifndef __FSL_NFC_H
-#define __FSL_NFC_H
+#ifndef __MXC_NAND_H
+#define __MXC_NAND_H
 
 /*
  * Register map and bit definitions for the Freescale NAND Flash Controller
@@ -73,7 +73,7 @@
 #define NAND_MXC_REG_OFFSET		0x1e00
 #endif
 
-struct fsl_nfc_regs {
+struct mxc_nand_regs {
 	u8 main_area[NAND_MXC_NR_BUFS][0x200];
 	u8 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE];
 	/*
@@ -131,7 +131,7 @@ struct fsl_nfc_regs {
 };
 
 #ifdef MXC_NFC_V3_2
-struct fsl_nfc_ip_regs {
+struct mxc_nand_ip_regs {
 	u32 wrprot;
 	u32 wrprot_unlock_blkaddr[8];
 	u32 config2;
@@ -222,4 +222,4 @@ struct fsl_nfc_ip_regs {
 #define writenfc	writel
 #endif
 
-#endif /* __FSL_NFC_H */
+#endif /* __MXC_NAND_H */
diff --git a/nand_spl/nand_boot_fsl_nfc.c b/drivers/mtd/nand/mxc_nand_spl.c
similarity index 92%
rename from nand_spl/nand_boot_fsl_nfc.c
rename to drivers/mtd/nand/mxc_nand_spl.c
index 1096727..09f23c3 100644
--- a/nand_spl/nand_boot_fsl_nfc.c
+++ b/drivers/mtd/nand/mxc_nand_spl.c
@@ -28,13 +28,13 @@
 #include <nand.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/io.h>
-#include <fsl_nfc.h>
+#include "mxc_nand.h"
 
 #if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1)
-static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR;
+static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR;
 #elif defined(MXC_NFC_V3_2)
-static struct fsl_nfc_regs *const nfc = (void *)NFC_BASE_ADDR_AXI;
-static struct fsl_nfc_ip_regs *const nfc_ip = (void *)NFC_BASE_ADDR;
+static struct mxc_nand_regs *const nfc = (void *)NFC_BASE_ADDR_AXI;
+static struct mxc_nand_ip_regs *const nfc_ip = (void *)NFC_BASE_ADDR;
 #endif
 
 static void nfc_wait_ready(void)
@@ -68,7 +68,7 @@ static void nfc_nand_init(void)
 
 	tmp = (readnfc(&nfc_ip->config2) & ~(NFC_V3_CONFIG2_SPAS_MASK |
 			NFC_V3_CONFIG2_EDC_MASK | NFC_V3_CONFIG2_PS_MASK)) |
-		NFC_V3_CONFIG2_SPAS(CONFIG_SYS_NAND_SPARE_SIZE / 2) |
+		NFC_V3_CONFIG2_SPAS(CONFIG_SYS_NAND_OOBSIZE / 2) |
 		NFC_V3_CONFIG2_INT_MSK | NFC_V3_CONFIG2_ECC_EN |
 		NFC_V3_CONFIG2_ONE_CYCLE;
 	if (CONFIG_SYS_NAND_PAGE_SIZE == 4096)
@@ -81,7 +81,7 @@ static void nfc_nand_init(void)
 	 * if spare size is larger that 16 bytes per 512 byte hunk
 	 * then use 8 symbol correction instead of 4
 	 */
-	if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
+	if (CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16)
 		tmp |= NFC_V3_CONFIG2_ECC_MODE_8;
 	else
 		tmp &= ~NFC_V3_CONFIG2_ECC_MODE_8;
@@ -102,7 +102,7 @@ static void nfc_nand_init(void)
 	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
 	int config1;
 
-	writenfc(CONFIG_SYS_NAND_SPARE_SIZE / 2, &nfc->spare_area_size);
+	writenfc(CONFIG_SYS_NAND_OOBSIZE / 2, &nfc->spare_area_size);
 
 	/* unlocking RAM Buff */
 	writenfc(0x2, &nfc->config);
@@ -115,7 +115,7 @@ static void nfc_nand_init(void)
 	 * if spare size is larger that 16 bytes per 512 byte hunk
 	 * then use 8 symbol correction instead of 4
 	 */
-	if (CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16)
+	if (CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16)
 		config1 &= ~NFC_V2_CONFIG1_ECC_MODE_4;
 	else
 		config1 |= NFC_V2_CONFIG1_ECC_MODE_4;
@@ -204,7 +204,7 @@ static int nfc_nand_check_ecc(void)
 #elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2)
 	u32 ecc_status = readl(&nfc->ecc_status_result);
 	int ecc_per_page = CONFIG_SYS_NAND_PAGE_SIZE / 512;
-	int err_limit = CONFIG_SYS_NAND_SPARE_SIZE / ecc_per_page > 16 ? 8 : 4;
+	int err_limit = CONFIG_SYS_NAND_OOBSIZE / ecc_per_page > 16 ? 8 : 4;
 	int subpages = CONFIG_SYS_NAND_PAGE_SIZE / 512;
 
 	do {
@@ -332,14 +332,6 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf)
 	return 0;
 }
 
-#if defined(CONFIG_ARM)
-void board_init_f (ulong bootflag)
-{
-	relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
-		       CONFIG_SYS_TEXT_BASE);
-}
-#endif
-
 /*
  * The main entry for NAND booting. It's necessary that SDRAM is already
  * configured and available since this code loads the main U-Boot image
diff --git a/include/configs/mx31pdk.h b/include/configs/mx31pdk.h
index 34e4295..80ec08e 100644
--- a/include/configs/mx31pdk.h
+++ b/include/configs/mx31pdk.h
@@ -45,7 +45,16 @@
 
 #define CONFIG_MACH_TYPE	MACH_TYPE_MX31_3DS
 
-#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#define CONFIG_SPL
+#define CONFIG_SPL_TARGET	"u-boot-with-spl.bin"
+#define CONFIG_SPL_LDSCRIPT	"arch/$(ARCH)/cpu/u-boot-spl.lds"
+#define CONFIG_SPL_MAX_SIZE	2048
+#define CONFIG_SPL_NAND_SUPPORT
+
+#define CONFIG_SPL_TEXT_BASE	0x87dc0000
+#define CONFIG_SYS_TEXT_BASE	0x87e00000
+
+#ifndef CONFIG_SPL_BUILD
 #define CONFIG_SKIP_LOWLEVEL_INIT
 #endif
 
@@ -116,7 +125,7 @@
 	"bootcmd=run bootcmd_net\0"					\
 	"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; "	\
 		"tftpboot 0x81000000 uImage-mx31; bootm\0"		\
-	"prg_uboot=tftpboot 0x81000000 u-boot-nand.bin; "		\
+	"prg_uboot=tftpboot 0x81000000 u-boot-with-spl.bin; "		\
 		"nand erase 0x0 0x40000; "				\
 		"nand write 0x81000000 0x0 0x40000\0"
 
@@ -163,7 +172,7 @@
 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
 						GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_INIT_RAM_ADDR + \
-						CONFIG_SYS_GBL_DATA_OFFSET)
+						CONFIG_SYS_INIT_RAM_SIZE)
 
 /*-----------------------------------------------------------------------
  * FLASH and environment organization
@@ -189,10 +198,10 @@
 /* NAND configuration for the NAND_SPL */
 
 /* Start copying real U-boot from the second page */
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x800
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x30000
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
+#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x3f800
 /* Load U-Boot to this address */
-#define CONFIG_SYS_NAND_U_BOOT_DST	0x87f00000
+#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST
 
 #define CONFIG_SYS_NAND_PAGE_SIZE	0x800
diff --git a/include/configs/tx25.h b/include/configs/tx25.h
index 80194d8..e72f8f6 100644
--- a/include/configs/tx25.h
+++ b/include/configs/tx25.h
@@ -21,6 +21,7 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
+#include <asm/arch/imx-regs.h>
 
 /*
  * KARO TX25 board - SoC Configuration
@@ -31,8 +32,14 @@
 
 #define	CONFIG_SYS_MONITOR_LEN		(256 << 10)	/* 256 kB for U-Boot */
 
-/* NAND BOOT is the only boot method */
-#define CONFIG_NAND_U_BOOT
+#define CONFIG_SPL
+#define CONFIG_SPL_TARGET		"u-boot-with-spl.bin"
+#define CONFIG_SPL_LDSCRIPT		"arch/$(ARCH)/cpu/u-boot-spl.lds"
+#define CONFIG_SPL_MAX_SIZE		2048
+#define CONFIG_SPL_NAND_SUPPORT
+
+#define CONFIG_SPL_TEXT_BASE		0x810c0000
+#define CONFIG_SYS_TEXT_BASE		0x81200000
 
 #ifndef MACH_TYPE_TX25
 #define MACH_TYPE_TX25	2177
@@ -40,16 +47,16 @@
 
 #define CONFIG_MACH_TYPE MACH_TYPE_TX25
 
-#ifdef CONFIG_NAND_SPL
+#ifdef CONFIG_SPL_BUILD
 /* Start copying real U-boot from the second page */
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x800
+#define CONFIG_SYS_NAND_U_BOOT_OFFS	CONFIG_SPL_PAD_TO
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	0x30000
 
-#define CONFIG_SYS_NAND_U_BOOT_DST      (0x81200000)
+#define CONFIG_SYS_NAND_U_BOOT_DST      CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_NAND_U_BOOT_DST
 
 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
-#define CONFIG_SYS_NAND_SPARE_SIZE	64
+#define CONFIG_SYS_NAND_OOBSIZE		64
 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
 #define CONFIG_SYS_NAND_PAGE_COUNT	64
 #define CONFIG_SYS_NAND_SIZE		(128 * 1024 * 1024)
@@ -173,7 +180,6 @@
 
 /* additions for new relocation code, must be added to all boards */
 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x1000 - /* Fix this */ \
-					GENERATED_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_SP_ADDR		(IMX_RAM_BASE + IMX_RAM_SIZE)
 
 #endif /* __CONFIG_H */
diff --git a/nand_spl/board/freescale/mx31pdk/Makefile b/nand_spl/board/freescale/mx31pdk/Makefile
deleted file mode 100644
index 3d57059..0000000
--- a/nand_spl/board/freescale/mx31pdk/Makefile
+++ /dev/null
@@ -1,63 +0,0 @@
-CONFIG_NAND_SPL	= y
-PAD_TO	:= 2048
-
-include $(TOPDIR)/config.mk
-
-nandobj	:= $(OBJTREE)/nand_spl/
-
-LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
-	   $(LDFLAGS_FINAL)
-AFLAGS	+= -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
-CFLAGS	+= -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
-
-SOBJS	= start.o crt0.o lowlevel_init.o
-COBJS	= nand_boot_fsl_nfc.o
-
-SRCS	:= $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
-SRCS	+= $(SRCTREE)/arch/arm/cpu/arm1136/start.S
-SRCS	+= $(SRCTREE)/arch/arm/lib/crt0.S
-SRCS	+= $(SRCTREE)/board/freescale/mx31pdk/lowlevel_init.S
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-__OBJS	:= $(SOBJS) $(COBJS)
-LNDIR	:= $(nandobj)board/$(BOARDDIR)
-
-ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
-
-all:	$(obj).depend $(ALL)
-
-$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
-	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
-
-$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
-	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
-
-$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot.lds
-	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
-		-Map $(nandobj)u-boot-spl.map \
-		-o $@
-
-$(nandobj)u-boot.lds: $(LDSCRIPT)
-	$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
-		-ansi -D__ASSEMBLY__ -P - <$< >$@
-
-#########################################################################
-
-$(obj)%.o:	$(SRCTREE)/arch/arm/cpu/arm1136/%.S
-	$(CC) $(AFLAGS) -c -o $@ $<
-
-$(obj)%.o:	$(SRCTREE)/arch/arm/lib/%.S
-	$(CC) $(AFLAGS) -c -o $@ $<
-
-$(obj)%.o:	$(SRCTREE)/board/freescale/mx31pdk/%.S
-	$(CC) $(AFLAGS) -c -o $@ $<
-
-$(obj)%.o:	$(SRCTREE)/nand_spl/%.c
-	$(CC) $(CFLAGS) -c -o $@ $<
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/nand_spl/board/freescale/mx31pdk/u-boot.lds b/nand_spl/board/freescale/mx31pdk/u-boot.lds
deleted file mode 100644
index 5f2b5e2..0000000
--- a/nand_spl/board/freescale/mx31pdk/u-boot.lds
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * (C) Copyright 2009
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-	. = 0x00000000;
-
-	. = ALIGN(4);
-	.text :
-	{
-		start.o			(.text)
-		lowlevel_init.o		(.text)
-		nand_boot_fsl_nfc.o	(.text)
-		*(.text)
-		. = 2K;
-	}
-
-	. = ALIGN(4);
-	.rodata : { *(.rodata) }
-
-	. = ALIGN(4);
-	.data : {
-		*(.data)
-	}
-
-	. = ALIGN(4);
-
-	. = ALIGN(4);
-	.u_boot_list : {
-		*(SORT(.u_boot_list*));
-	}
-
-	. = ALIGN(4);
-
-	__image_copy_end = .;
-
-	.rel.dyn : {
-		__rel_dyn_start = .;
-		*(.rel*)
-		__rel_dyn_end = .;
-	}
-
-	.dynsym : {
-		__dynsym_start = .;
-		*(.dynsym)
-	}
-
-	_end = .;
-
-	.bss __rel_dyn_start (OVERLAY) : {
-		__bss_start = .;
-		*(.bss)
-		 . = ALIGN(4);
-		__bss_end = .;
-	}
-
-	/DISCARD/ : { *(.bss*) }
-	/DISCARD/ : { *(.dynstr*) }
-	/DISCARD/ : { *(.dynsym*) }
-	/DISCARD/ : { *(.dynamic*) }
-	/DISCARD/ : { *(.hash*) }
-	/DISCARD/ : { *(.plt*) }
-	/DISCARD/ : { *(.interp*) }
-	/DISCARD/ : { *(.gnu*) }
-}
diff --git a/nand_spl/board/karo/tx25/Makefile b/nand_spl/board/karo/tx25/Makefile
deleted file mode 100644
index 9f9c589..0000000
--- a/nand_spl/board/karo/tx25/Makefile
+++ /dev/null
@@ -1,84 +0,0 @@
-#
-# (C) Copyright 2009 DENX Software Engineering
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundatio; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-CONFIG_NAND_SPL	= y
-
-include $(TOPDIR)/config.mk
-include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
-
-nandobj	:= $(OBJTREE)/nand_spl/
-
-LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
-	   $(LDFLAGS_FINAL)
-AFLAGS	+= -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
-CFLAGS	+= -DCONFIG_SPL_BUILD -DCONFIG_NAND_SPL
-
-SOBJS	= start.o crt0.o lowlevel_init.o
-COBJS	= nand_boot_fsl_nfc.o
-
-SRCS	:= $(SRCTREE)/nand_spl/nand_boot_fsl_nfc.c
-SRCS	+= $(SRCTREE)/arch/arm/cpu/arm926ejs/start.S
-SRCS	+= $(SRCTREE)/arch/arm/lib/crt0.S
-SRCS	+= $(SRCTREE)/board/karo/tx25/lowlevel_init.S
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-__OBJS	:= $(SOBJS) $(COBJS)
-LNDIR	:= $(nandobj)board/$(BOARDDIR)
-
-ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
-
-all:	$(obj).depend $(ALL)
-
-$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
-	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
-
-$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
-	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
-
-$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot.lds
-	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
-		-Map $(nandobj)u-boot-spl.map \
-		-o $@
-
-$(nandobj)u-boot.lds: $(LDSCRIPT)
-	$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -I$(nandobj)/board/$(BOARDDIR) \
-		-ansi -D__ASSEMBLY__ -P - <$< >$@
-
-#########################################################################
-
-$(obj)%.o:	$(SRCTREE)/arch/arm/cpu/arm926ejs/%.S
-	$(CC) $(AFLAGS) -c -o $@ $<
-
-$(obj)%.o:	$(SRCTREE)/arch/arm/lib/%.S
-	$(CC) $(AFLAGS) -c -o $@ $<
-
-$(obj)%.o:	$(SRCTREE)/board/karo/tx25/%.S
-	$(CC) $(AFLAGS) -c -o $@ $<
-
-$(obj)%.o:	$(SRCTREE)/nand_spl/%.c
-	$(CC) $(CFLAGS) -c -o $@ $<
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/nand_spl/board/karo/tx25/config.mk b/nand_spl/board/karo/tx25/config.mk
deleted file mode 100644
index 68afbf1..0000000
--- a/nand_spl/board/karo/tx25/config.mk
+++ /dev/null
@@ -1 +0,0 @@
-PAD_TO	:= 2048
diff --git a/nand_spl/board/karo/tx25/u-boot.lds b/nand_spl/board/karo/tx25/u-boot.lds
deleted file mode 100644
index e5363e2..0000000
--- a/nand_spl/board/karo/tx25/u-boot.lds
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * (C) Copyright 2009
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-	. = 0x00000000;
-
-	. = ALIGN(4);
-	.text :
-	{
-		start.o			(.text)
-		lowlevel_init.o		(.text)
-		nand_boot_fsl_nfc.o	(.text)
-		*(.text)
-		. = 2K;
-	}
-
-	. = ALIGN(4);
-	.rodata : { *(.rodata) }
-
-	. = ALIGN(4);
-	.data : {
-		*(.data)
-	}
-
-	. = ALIGN(4);
-
-	. = ALIGN(4);
-	.u_boot_list : {
-	*(SORT(.u_boot_list*));
-	}
-
-	. = ALIGN(4);
-
-	__image_copy_end = .;
-
-	.rel.dyn : {
-		__rel_dyn_start = .;
-		*(.rel*)
-		__rel_dyn_end = .;
-	}
-
-	.dynsym : {
-		__dynsym_start = .;
-		*(.dynsym)
-	}
-
-	_end = .;
-
-	.bss __rel_dyn_start (OVERLAY) : {
-		__bss_start = .;
-		*(.bss)
-		 . = ALIGN(4);
-		__bss_end = .;
-	}
-
-	/DISCARD/ : { *(.bss*) }
-	/DISCARD/ : { *(.dynstr*) }
-	/DISCARD/ : { *(.dynsym*) }
-	/DISCARD/ : { *(.dynamic*) }
-	/DISCARD/ : { *(.hash*) }
-	/DISCARD/ : { *(.plt*) }
-	/DISCARD/ : { *(.interp*) }
-	/DISCARD/ : { *(.gnu*) }
-}
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 18/30] nand: mxc: Switch NAND SPL to generic SPL
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 18/30] nand: mxc: Switch NAND SPL to generic SPL Benoît Thébaudeau
@ 2013-04-09 20:17   ` Albert ARIBAUD
  2013-04-09 20:57     ` Benoît Thébaudeau
  0 siblings, 1 reply; 40+ messages in thread
From: Albert ARIBAUD @ 2013-04-09 20:17 UTC (permalink / raw)
  To: u-boot

Hi Beno?t,

On Tue,  9 Apr 2013 21:48:47 +0200, Beno?t Th?baudeau
<benoit.thebaudeau@advansee.com> wrote:

> This also fixes support for mx31pdk and tx25, which had been broken by commit
> e05e5de7fae5bec79617e113916dac6631251156.
> 
> Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> Acked-by: Scott Wood <scottwood@freescale.com>
> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Changes in v11:
>  - mx31pdk: Rename u-boot-nand.bin to u-boot-with-spl.bin (new target binary
>    name) in prg_uboot command.
>  - mx31pdk: Enlarge CONFIG_SYS_NAND_U_BOOT_SIZE from 0x32000 to 0x3f800 (which
>    corresponds to the size allocated for this purpose in NAND Flash) in order to
>    leave enough room whatever the toolchain used.
>  - mx31pdk: Set back CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE by 0x00100000
>    because the original U-Boot at CONFIG_SYS_TEXT_BASE was overlapping the
>    global data being written prior to relocation by
>    arch/arm/lib/board.c:board_init_f().

I gather this patch is exactly what finally worked for Fabio's mx31?

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 18/30] nand: mxc: Switch NAND SPL to generic SPL
  2013-04-09 20:17   ` Albert ARIBAUD
@ 2013-04-09 20:57     ` Benoît Thébaudeau
  2013-04-09 21:02       ` Benoît Thébaudeau
  0 siblings, 1 reply; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 20:57 UTC (permalink / raw)
  To: u-boot

Hi Albert,

On Tuesday, April 9, 2013 10:17:04 PM, Albert ARIBAUD wrote:
> Hi Beno?t,
> 
> On Tue,  9 Apr 2013 21:48:47 +0200, Beno?t Th?baudeau
> <benoit.thebaudeau@advansee.com> wrote:
> 
> > This also fixes support for mx31pdk and tx25, which had been broken by
> > commit
> > e05e5de7fae5bec79617e113916dac6631251156.
> > 
> > Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> > Acked-by: Scott Wood <scottwood@freescale.com>
> > Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
> > ---
> > Changes in v11:
> >  - mx31pdk: Rename u-boot-nand.bin to u-boot-with-spl.bin (new target
> >  binary
> >    name) in prg_uboot command.
> >  - mx31pdk: Enlarge CONFIG_SYS_NAND_U_BOOT_SIZE from 0x32000 to 0x3f800
> >  (which
> >    corresponds to the size allocated for this purpose in NAND Flash) in
> >    order to
> >    leave enough room whatever the toolchain used.
> >  - mx31pdk: Set back CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE by
> >  0x00100000
> >    because the original U-Boot at CONFIG_SYS_TEXT_BASE was overlapping the
> >    global data being written prior to relocation by
> >    arch/arm/lib/board.c:board_init_f().
> 
> I gather this patch is exactly what finally worked for Fabio's mx31?

Correct, apart from the file renaming in prg_uboot, which has no influence here.

Best regards,
Beno?t

^ permalink raw reply	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 18/30] nand: mxc: Switch NAND SPL to generic SPL
  2013-04-09 20:57     ` Benoît Thébaudeau
@ 2013-04-09 21:02       ` Benoît Thébaudeau
  0 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 21:02 UTC (permalink / raw)
  To: u-boot

On Tuesday, April 9, 2013 10:57:04 PM, Beno?t Th?baudeau wrote:
> Hi Albert,
> 
> On Tuesday, April 9, 2013 10:17:04 PM, Albert ARIBAUD wrote:
> > Hi Beno?t,
> > 
> > On Tue,  9 Apr 2013 21:48:47 +0200, Beno?t Th?baudeau
> > <benoit.thebaudeau@advansee.com> wrote:
> > 
> > > This also fixes support for mx31pdk and tx25, which had been broken by
> > > commit
> > > e05e5de7fae5bec79617e113916dac6631251156.
> > > 
> > > Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> > > Acked-by: Scott Wood <scottwood@freescale.com>
> > > Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
> > > ---
> > > Changes in v11:
> > >  - mx31pdk: Rename u-boot-nand.bin to u-boot-with-spl.bin (new target
> > >  binary
> > >    name) in prg_uboot command.
> > >  - mx31pdk: Enlarge CONFIG_SYS_NAND_U_BOOT_SIZE from 0x32000 to 0x3f800
> > >  (which
> > >    corresponds to the size allocated for this purpose in NAND Flash) in
> > >    order to
> > >    leave enough room whatever the toolchain used.
> > >  - mx31pdk: Set back CONFIG_SPL_TEXT_BASE and CONFIG_SYS_TEXT_BASE by
> > >  0x00100000
> > >    because the original U-Boot at CONFIG_SYS_TEXT_BASE was overlapping
> > >    the
> > >    global data being written prior to relocation by
> > >    arch/arm/lib/board.c:board_init_f().
> > 
> > I gather this patch is exactly what finally worked for Fabio's mx31?
> 
> Correct, apart from the file renaming in prg_uboot, which has no influence
> here.

And with:
http://patchwork.ozlabs.org/patch/235173/

Best regards,
Beno?t

^ permalink raw reply	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 19/30] arm926ejs: Remove deprecated and now unused NAND SPL
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (16 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 18/30] nand: mxc: Switch NAND SPL to generic SPL Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 20/30] arm: Remove unused relocate_code() parameters Benoît Thébaudeau
                   ` (13 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10:
 - Rebase on current u-boot-arm/master.

Changes in v9: None
Changes in v8: None
Changes in v7: None
Changes in v6:
 - New patch.

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm926ejs/start.S |   10 ----------
 1 file changed, 10 deletions(-)

diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 0a9cf1d..3c9de3f 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -120,15 +120,11 @@ _fiq:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
-#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
-	.word	CONFIG_SYS_TEXT_BASE
-#else
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
 	.word	CONFIG_SPL_TEXT_BASE
 #else
 	.word	CONFIG_SYS_TEXT_BASE
 #endif
-#endif
 
 /*
  * These are defined in the board-specific linker script.
@@ -152,12 +148,6 @@ _bss_end_ofs:
 _end_ofs:
 	.word _end - _start
 
-#ifdef CONFIG_NAND_U_BOOT
-.globl _end
-_end:
-	.word __bss_end
-#endif
-
 #ifdef CONFIG_USE_IRQ
 /* IRQ stack memory (calculated at run-time) */
 .globl IRQ_STACK_START
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 20/30] arm: Remove unused relocate_code() parameters
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (17 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 19/30] arm926ejs: Remove deprecated and now unused NAND SPL Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 21/30] Makefile: Move SHELL setup to config.mk Benoît Thébaudeau
                   ` (12 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Commit e05e5de7fae5bec79617e113916dac6631251156 made the 2 1st parameters of
ARM's relocate_code() useless since it moved the code handling them to crt0.S.
So, drop these parameters.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - Update the function prototype in start.S comments.

Changes in v7: None
Changes in v6:
 - New patch.

Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm1136/start.S               |    6 ++----
 arch/arm/cpu/arm1176/start.S               |    6 ++----
 arch/arm/cpu/arm720t/start.S               |    6 ++----
 arch/arm/cpu/arm920t/start.S               |    6 ++----
 arch/arm/cpu/arm925t/start.S               |    6 ++----
 arch/arm/cpu/arm926ejs/start.S             |    6 ++----
 arch/arm/cpu/arm946es/start.S              |    6 ++----
 arch/arm/cpu/arm_intcm/start.S             |    6 ++----
 arch/arm/cpu/armv7/start.S                 |    6 ++----
 arch/arm/cpu/ixp/start.S                   |    6 ++----
 arch/arm/cpu/pxa/start.S                   |    6 ++----
 arch/arm/cpu/s3c44b0/start.S               |    6 ++----
 arch/arm/cpu/sa1100/start.S                |    6 ++----
 arch/arm/lib/crt0.S                        |    8 +++-----
 board/freescale/mx31pdk/mx31pdk.c          |    2 +-
 board/karo/tx25/tx25.c                     |    2 +-
 board/samsung/smdk6400/smdk6400_nand_spl.c |    3 +--
 include/common.h                           |    8 ++++----
 18 files changed, 36 insertions(+), 65 deletions(-)

diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S
index e36d7d3..ad24b80 100644
--- a/arch/arm/cpu/arm1136/start.S
+++ b/arch/arm/cpu/arm1136/start.S
@@ -174,15 +174,13 @@ next:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 0b570d5..5654c19 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -241,15 +241,13 @@ skip_tcmdisable:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S
index a640eaa..9facc7e 100644
--- a/arch/arm/cpu/arm720t/start.S
+++ b/arch/arm/cpu/arm720t/start.S
@@ -156,15 +156,13 @@ reset:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S
index 940ce72..6250025 100644
--- a/arch/arm/cpu/arm920t/start.S
+++ b/arch/arm/cpu/arm920t/start.S
@@ -195,15 +195,13 @@ copyex:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S
index ed683b4..021e241 100644
--- a/arch/arm/cpu/arm925t/start.S
+++ b/arch/arm/cpu/arm925t/start.S
@@ -185,15 +185,13 @@ poll1:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S
index 3c9de3f..4c56711 100644
--- a/arch/arm/cpu/arm926ejs/start.S
+++ b/arch/arm/cpu/arm926ejs/start.S
@@ -191,15 +191,13 @@ reset:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S
index 2dd1fa3..9c2b70d 100644
--- a/arch/arm/cpu/arm946es/start.S
+++ b/arch/arm/cpu/arm946es/start.S
@@ -160,15 +160,13 @@ reset:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S
index cc054e8..5e8c528 100644
--- a/arch/arm/cpu/arm_intcm/start.S
+++ b/arch/arm/cpu/arm_intcm/start.S
@@ -156,15 +156,13 @@ reset:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index d0b17c9..64008ba 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -165,14 +165,12 @@ reset:
 
 #ifndef CONFIG_SPL_BUILD
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 ENTRY(relocate_code)
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S
index a305ff5..69ef8aa 100644
--- a/arch/arm/cpu/ixp/start.S
+++ b/arch/arm/cpu/ixp/start.S
@@ -258,15 +258,13 @@ reset:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S
index cd88af8..3e07c7c 100644
--- a/arch/arm/cpu/pxa/start.S
+++ b/arch/arm/cpu/pxa/start.S
@@ -173,15 +173,13 @@ reset:
 /*------------------------------------------------------------------------------*/
 #ifndef CONFIG_SPL_BUILD
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 /* Disable the Dcache RAM lock for stack now */
 #ifdef	CONFIG_CPU_PXA25X
diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S
index 579f6e2..7361aa2 100644
--- a/arch/arm/cpu/s3c44b0/start.S
+++ b/arch/arm/cpu/s3c44b0/start.S
@@ -141,15 +141,13 @@ reset:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S
index 13cf132..8a2eafd 100644
--- a/arch/arm/cpu/sa1100/start.S
+++ b/arch/arm/cpu/sa1100/start.S
@@ -145,15 +145,13 @@ reset:
 /*------------------------------------------------------------------------------*/
 
 /*
- * void relocate_code (addr_sp, gd, addr_moni)
+ * void relocate_code(addr_moni)
  *
  * This function relocates the monitor code.
  */
 	.globl	relocate_code
 relocate_code:
-	mov	r4, r0	/* save addr_sp */
-	mov	r5, r1	/* save addr of gd */
-	mov	r6, r2	/* save addr of destination */
+	mov	r6, r0	/* save addr of destination */
 
 	adr	r0, _start
 	subs	r9, r6, r0		/* r9 <- relocation offset */
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index 1524f7e..fa25319 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -96,8 +96,8 @@ ENTRY(_main)
 
 /*
  * Set up intermediate environment (new sp and gd) and call
- * relocate_code(addr_sp, gd, addr_moni). Trick here is that
- * we'll return 'here' but relocated.
+ * relocate_code(addr_moni). Trick here is that we'll return
+ * 'here' but relocated.
  */
 
 	ldr	sp, [r8, #GD_START_ADDR_SP]	/* r8 = gd->start_addr_sp */
@@ -108,9 +108,7 @@ ENTRY(_main)
 	adr	lr, here
 	ldr	r0, [r8, #GD_RELOC_OFF]		/* lr = gd->start_addr_sp */
 	add	lr, lr, r0
-	ldr	r0, [r8, #GD_START_ADDR_SP]	/* r0 = gd->start_addr_sp */
-	mov	r1, r8				/* r1 = gd */
-	ldr	r2, [r8, #GD_RELOCADDR]		/* r2 = gd->relocaddr */
+	ldr	r0, [r8, #GD_RELOCADDR]		/* r0 = gd->relocaddr */
 	b	relocate_code
 here:
 
diff --git a/board/freescale/mx31pdk/mx31pdk.c b/board/freescale/mx31pdk/mx31pdk.c
index 3d0d419..49158bd 100644
--- a/board/freescale/mx31pdk/mx31pdk.c
+++ b/board/freescale/mx31pdk/mx31pdk.c
@@ -39,7 +39,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifdef CONFIG_SPL_BUILD
 void board_init_f(ulong bootflag)
 {
-	relocate_code(0, NULL, CONFIG_SPL_TEXT_BASE);
+	relocate_code(CONFIG_SPL_TEXT_BASE);
 	asm volatile("ldr pc, =nand_boot");
 }
 #endif
diff --git a/board/karo/tx25/tx25.c b/board/karo/tx25/tx25.c
index 69ee590..85719a0 100644
--- a/board/karo/tx25/tx25.c
+++ b/board/karo/tx25/tx25.c
@@ -36,7 +36,7 @@ DECLARE_GLOBAL_DATA_PTR;
 #ifdef CONFIG_SPL_BUILD
 void board_init_f(ulong bootflag)
 {
-	relocate_code(0, NULL, CONFIG_SPL_TEXT_BASE);
+	relocate_code(CONFIG_SPL_TEXT_BASE);
 	asm volatile("ldr pc, =nand_boot");
 }
 #endif
diff --git a/board/samsung/smdk6400/smdk6400_nand_spl.c b/board/samsung/smdk6400/smdk6400_nand_spl.c
index a023284..26a6146 100644
--- a/board/samsung/smdk6400/smdk6400_nand_spl.c
+++ b/board/samsung/smdk6400/smdk6400_nand_spl.c
@@ -32,6 +32,5 @@
 
 void board_init_f(unsigned long bootflag)
 {
-	relocate_code(CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL,
-			CONFIG_SYS_TEXT_BASE);
+	relocate_code(CONFIG_SYS_TEXT_BASE);
 }
diff --git a/include/common.h b/include/common.h
index 52df70c..604176c 100644
--- a/include/common.h
+++ b/include/common.h
@@ -530,11 +530,11 @@ int	dcache_status (void);
 void	dcache_enable (void);
 void	dcache_disable(void);
 void	mmu_disable(void);
-void	relocate_code(ulong, gd_t *, ulong)
-#if !defined(CONFIG_ARM)
-__attribute__ ((noreturn))
+#if defined(CONFIG_ARM)
+void	relocate_code(ulong);
+#else
+void	relocate_code(ulong, gd_t *, ulong) __attribute__ ((noreturn));
 #endif
-;
 ulong	get_endaddr   (void);
 void	trap_init     (ulong);
 #if defined (CONFIG_4xx)	|| \
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 21/30] Makefile: Move SHELL setup to config.mk
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (18 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 20/30] arm: Remove unused relocate_code() parameters Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 22/30] .gitignore: Add /SPL Benoît Thébaudeau
                   ` (11 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

make never uses the SHELL variable from the environment. Instead, it
uses /bin/sh, or the value assigned to the SHELL variable by the Makefile. This
makes the export of the SHELL variable useless for sub-makes (but still useful
for the environment of recipes). However, we want all makes to use the same
shell.

This patch fixes this issue by moving the SHELL variable setup and export to the
top config.mk, so that all Makefile-s including it use the same shell.

Since BASH is used by default, this makes it possible to use things
like 'echo -e ...' in sub-makes, which would otherwise fail e.g. with /bin/sh
symlinked to /bin/dash on Ubuntu.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Reviewed-by: Tom Rini <trini@ti.com>
---
Changes in v11: None
Changes in v10:
 - Rebase on current u-boot-arm/master.

Changes in v9: None
Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 Makefile  |    7 +------
 config.mk |    7 +++++++
 2 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/Makefile b/Makefile
index 8d0e2b8..caca851 100644
--- a/Makefile
+++ b/Makefile
@@ -46,12 +46,7 @@ HOSTARCH := $(shell uname -m | \
 HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \
 	    sed -e 's/\(cygwin\).*/cygwin/')
 
-# Set shell to bash if possible, otherwise fall back to sh
-SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
-	else if [ -x /bin/bash ]; then echo /bin/bash; \
-	else echo sh; fi; fi)
-
-export	HOSTARCH HOSTOS SHELL
+export	HOSTARCH HOSTOS
 
 # Deal with colliding definitions from tcsh etc.
 VENDOR=
diff --git a/config.mk b/config.mk
index 4e6a19b..1fd109f 100644
--- a/config.mk
+++ b/config.mk
@@ -23,6 +23,13 @@
 
 #########################################################################
 
+# Set shell to bash if possible, otherwise fall back to sh
+SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
+	else if [ -x /bin/bash ]; then echo /bin/bash; \
+	else echo sh; fi; fi)
+
+export	SHELL
+
 ifeq ($(CURDIR),$(SRCTREE))
 dir :=
 else
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 22/30] .gitignore: Add /SPL
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (19 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 21/30] Makefile: Move SHELL setup to config.mk Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 23/30] imx: Add u-boot-with-spl.imx make target Benoît Thébaudeau
                   ` (10 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 .gitignore |    1 +
 1 file changed, 1 insertion(+)

diff --git a/.gitignore b/.gitignore
index be09894..bff721e 100644
--- a/.gitignore
+++ b/.gitignore
@@ -25,6 +25,7 @@
 #
 
 /MLO
+/SPL
 /System.map
 /u-boot
 /u-boot.hex
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 23/30] imx: Add u-boot-with-spl.imx make target
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (20 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 22/30] .gitignore: Add /SPL Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 24/30] imx: Add u-boot-with-nand-spl.imx " Benoît Thébaudeau
                   ` (9 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

This image combines the SPL with the i.MX header and U-Boot. This is a
convenient way of having a single image to program on some boot devices.

The i.MX header has to be added to the SPL before appending U-Boot, so that the
boot ROM loads only the SPL.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - Use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for padding, which
   allows to pad the SPL after adding the i.MX header, which may save time when
   the boot ROM loads the SPL.
 - Add /u-boot-with-spl.imx to .gitignore.

Changes in v7:
 - New patch.

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 .gitignore                   |    1 +
 Makefile                     |    5 +++++
 arch/arm/imx-common/Makefile |    6 ++++++
 3 files changed, 12 insertions(+)

diff --git a/.gitignore b/.gitignore
index bff721e..e42d837 100644
--- a/.gitignore
+++ b/.gitignore
@@ -30,6 +30,7 @@
 /u-boot
 /u-boot.hex
 /u-boot.imx
+/u-boot-with-spl.imx
 /u-boot.map
 /u-boot.srec
 /u-boot.ldr
diff --git a/Makefile b/Makefile
index caca851..e22faa5 100644
--- a/Makefile
+++ b/Makefile
@@ -486,6 +486,10 @@ $(obj)u-boot-with-spl.bin: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
 		cat $(obj)spl/u-boot-spl-pad.bin $(obj)u-boot.bin > $@
 		rm $(obj)spl/u-boot-spl-pad.bin
 
+$(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+		$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+			$(OBJTREE)/u-boot-with-spl.imx
+
 $(obj)u-boot.ubl:       $(obj)u-boot-with-spl.bin
 		$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
 		-e $(CONFIG_SYS_TEXT_BASE) -d $< $(obj)u-boot.ubl
@@ -850,6 +854,7 @@ clobber:	tidy
 	@rm -f $(obj)u-boot.kwb
 	@rm -f $(obj)u-boot.pbl
 	@rm -f $(obj)u-boot.imx
+	@rm -f $(obj)u-boot-with-spl.imx
 	@rm -f $(obj)u-boot.ubl
 	@rm -f $(obj)u-boot.ais
 	@rm -f $(obj)u-boot.dtb
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index 428a57e..f59ae6f 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -55,6 +55,12 @@ $(OBJTREE)/SPL: $(OBJTREE)/spl/u-boot-spl.bin $(OBJTREE)/$(patsubst "%",%,$(CONF
 	$(OBJTREE)/tools/mkimage -n $(filter-out %.bin,$^) -T imximage \
 	-e $(CONFIG_SPL_TEXT_BASE) -d $< $@
 
+$(OBJTREE)/u-boot-with-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin
+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+		-I binary -O binary $< $(OBJTREE)/spl/u-boot-spl-pad.imx
+	cat $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.bin > $@
+	rm $(OBJTREE)/spl/u-boot-spl-pad.imx
+
 
 #########################################################################
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 24/30] imx: Add u-boot-with-nand-spl.imx make target
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (21 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 23/30] imx: Add u-boot-with-spl.imx make target Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 25/30] arm: Remove support for smdk6400 Benoît Thébaudeau
                   ` (8 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

This image combines the SPL with the i.MX header, the FCB and U-Boot.

For i.MX25/35/51, the FCB is ignored by the boot ROM, so this image is just
useful because it can be programmed on a NAND Flash page boundary.

For i.MX53, the FCB is required by the boot ROM.

This does not support i.MX6 so far because its FCB is more complicated.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - Change the dummy 1024-byte header into a true FCB in order to add support for
   i.MX53.
 - Use CONFIG_SPL_PAD_TO instead of CONFIG_SPL_MAX_SIZE for padding, which
   allows to pad the SPL after adding the i.MX header and the FCB, which may
   save time when the boot ROM loads the SPL.
 - Add /u-boot-with-nand-spl.imx to .gitignore.

Changes in v7:
 - New patch.

Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 .gitignore                   |    1 +
 Makefile                     |    5 +++++
 arch/arm/imx-common/Makefile |   11 +++++++++++
 3 files changed, 17 insertions(+)

diff --git a/.gitignore b/.gitignore
index e42d837..ed21203 100644
--- a/.gitignore
+++ b/.gitignore
@@ -31,6 +31,7 @@
 /u-boot.hex
 /u-boot.imx
 /u-boot-with-spl.imx
+/u-boot-with-nand-spl.imx
 /u-boot.map
 /u-boot.srec
 /u-boot.ldr
diff --git a/Makefile b/Makefile
index e22faa5..df03974 100644
--- a/Makefile
+++ b/Makefile
@@ -490,6 +490,10 @@ $(obj)u-boot-with-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
 		$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
 			$(OBJTREE)/u-boot-with-spl.imx
 
+$(obj)u-boot-with-nand-spl.imx: $(obj)spl/u-boot-spl.bin $(obj)u-boot.bin
+		$(MAKE) -C $(SRCTREE)/arch/arm/imx-common \
+			$(OBJTREE)/u-boot-with-nand-spl.imx
+
 $(obj)u-boot.ubl:       $(obj)u-boot-with-spl.bin
 		$(obj)tools/mkimage -n $(UBL_CONFIG) -T ublimage \
 		-e $(CONFIG_SYS_TEXT_BASE) -d $< $(obj)u-boot.ubl
@@ -855,6 +859,7 @@ clobber:	tidy
 	@rm -f $(obj)u-boot.pbl
 	@rm -f $(obj)u-boot.imx
 	@rm -f $(obj)u-boot-with-spl.imx
+	@rm -f $(obj)u-boot-with-nand-spl.imx
 	@rm -f $(obj)u-boot.ubl
 	@rm -f $(obj)u-boot.ais
 	@rm -f $(obj)u-boot.dtb
diff --git a/arch/arm/imx-common/Makefile b/arch/arm/imx-common/Makefile
index f59ae6f..44b6822 100644
--- a/arch/arm/imx-common/Makefile
+++ b/arch/arm/imx-common/Makefile
@@ -61,6 +61,17 @@ $(OBJTREE)/u-boot-with-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin
 	cat $(OBJTREE)/spl/u-boot-spl-pad.imx $(OBJTREE)/u-boot.bin > $@
 	rm $(OBJTREE)/spl/u-boot-spl-pad.imx
 
+$(OBJTREE)/u-boot-with-nand-spl.imx: $(OBJTREE)/SPL $(OBJTREE)/u-boot.bin
+	(echo -ne '\x00\x00\x00\x00\x46\x43\x42\x20\x01' && \
+			dd bs=1015 count=1 if=/dev/zero 2>/dev/null) | \
+		cat - $< > $(OBJTREE)/spl/u-boot-nand-spl.imx
+	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(CONFIG_SPL_PAD_TO) \
+		-I binary -O binary $(OBJTREE)/spl/u-boot-nand-spl.imx \
+		$(OBJTREE)/spl/u-boot-nand-spl-pad.imx
+	rm $(OBJTREE)/spl/u-boot-nand-spl.imx
+	cat $(OBJTREE)/spl/u-boot-nand-spl-pad.imx $(OBJTREE)/u-boot.bin > $@
+	rm $(OBJTREE)/spl/u-boot-nand-spl-pad.imx
+
 
 #########################################################################
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 25/30] arm: Remove support for smdk6400
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (22 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 24/30] imx: Add u-boot-with-nand-spl.imx " Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 26/30] Revert "mkconfig: start deprecating Makefile config targets" Benoît Thébaudeau
                   ` (7 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

The migration of boards from Makefile to boards.cfg was due for v2012.03, but
smdk6400 did not follow, and it does not build, so move it to scrapyard. It will
still be possible to restore it from the Git history before fixing it.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10:
 - Rebase on current u-boot-arm/master.

Changes in v9:
 - Rebase following upstream changes on doc/README.scrapyard.

Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 MAINTAINERS                                |    4 -
 Makefile                                   |   17 --
 arch/arm/include/asm/mach-types.h          |   13 --
 board/samsung/smdk6400/.gitignore          |    5 -
 board/samsung/smdk6400/Makefile            |   48 -----
 board/samsung/smdk6400/config.mk           |   30 ---
 board/samsung/smdk6400/lowlevel_init.S     |  323 ----------------------------
 board/samsung/smdk6400/smdk6400.c          |  134 ------------
 board/samsung/smdk6400/smdk6400_nand_spl.c |   36 ----
 board/samsung/smdk6400/u-boot-nand.lds     |   90 --------
 doc/README.scrapyard                       |    1 +
 include/configs/smdk6400.h                 |  296 -------------------------
 nand_spl/board/samsung/smdk6400/Makefile   |  117 ----------
 nand_spl/board/samsung/smdk6400/config.mk  |   40 ----
 nand_spl/board/samsung/smdk6400/u-boot.lds |   82 -------
 15 files changed, 1 insertion(+), 1235 deletions(-)
 delete mode 100644 board/samsung/smdk6400/.gitignore
 delete mode 100644 board/samsung/smdk6400/Makefile
 delete mode 100644 board/samsung/smdk6400/config.mk
 delete mode 100644 board/samsung/smdk6400/lowlevel_init.S
 delete mode 100644 board/samsung/smdk6400/smdk6400.c
 delete mode 100644 board/samsung/smdk6400/smdk6400_nand_spl.c
 delete mode 100644 board/samsung/smdk6400/u-boot-nand.lds
 delete mode 100644 include/configs/smdk6400.h
 delete mode 100644 nand_spl/board/samsung/smdk6400/Makefile
 delete mode 100644 nand_spl/board/samsung/smdk6400/config.mk
 delete mode 100644 nand_spl/board/samsung/smdk6400/u-boot.lds

diff --git a/MAINTAINERS b/MAINTAINERS
index e131f80..bbab5fe 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1030,10 +1030,6 @@ Vladimir Zapolskiy <vz@mleia.com>
 
 	devkit3250	lpc32xx
 
-Zhong Hongbo <bocui107@gmail.com>
-
-	SMDK6400	ARM1176 (S3C6400 SoC)
-
 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
 Tetsuyuki Kobayashi <koba@kmckk.co.jp>
 
diff --git a/Makefile b/Makefile
index df03974..e0f2c86 100644
--- a/Makefile
+++ b/Makefile
@@ -784,23 +784,6 @@ lcname	= $(shell echo $(1) | sed -e 's/\(.*\)_config/\L\1/')
 ucname	= $(shell echo $(1) | sed -e 's/\(.*\)_config/\U\1/')
 
 #########################################################################
-## ARM1176 Systems
-#########################################################################
-smdk6400_noUSB_config	\
-smdk6400_config	:	unconfig
-	@mkdir -p $(obj)include $(obj)board/samsung/smdk6400
-	@mkdir -p $(obj)nand_spl/board/samsung/smdk6400
-	@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
-	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
-	@if [ -z "$(findstring smdk6400_noUSB_config,$@)" ]; then			\
-		echo "RAM_TEXT = 0x57e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
-	else										\
-		echo "RAM_TEXT = 0xc7e00000" >> $(obj)board/samsung/smdk6400/config.tmp;\
-	fi
-	@$(MKCONFIG) smdk6400 arm arm1176 smdk6400 samsung s3c64xx
-	@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
-
-#########################################################################
 #########################################################################
 
 clean:
diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h
index a676b6d..440b041 100644
--- a/arch/arm/include/asm/mach-types.h
+++ b/arch/arm/include/asm/mach-types.h
@@ -223,7 +223,6 @@ extern unsigned int __machine_arch_type;
 #define MACH_TYPE_MIOA701              1257
 #define MACH_TYPE_ARMADILLO5X0         1260
 #define MACH_TYPE_CC9P9360JS           1264
-#define MACH_TYPE_SMDK6400             1270
 #define MACH_TYPE_NOKIA_N800           1271
 #define MACH_TYPE_EP80219              1281
 #define MACH_TYPE_GORAMO_MLR           1292
@@ -3640,18 +3639,6 @@ extern unsigned int __machine_arch_type;
 # define machine_is_cc9p9360js()	(0)
 #endif
 
-#ifdef CONFIG_MACH_SMDK6400
-# ifdef machine_arch_type
-#  undef machine_arch_type
-#  define machine_arch_type	__machine_arch_type
-# else
-#  define machine_arch_type	MACH_TYPE_SMDK6400
-# endif
-# define machine_is_smdk6400()	(machine_arch_type == MACH_TYPE_SMDK6400)
-#else
-# define machine_is_smdk6400()	(0)
-#endif
-
 #ifdef CONFIG_MACH_NOKIA_N800
 # ifdef machine_arch_type
 #  undef machine_arch_type
diff --git a/board/samsung/smdk6400/.gitignore b/board/samsung/smdk6400/.gitignore
deleted file mode 100644
index 25ab492..0000000
--- a/board/samsung/smdk6400/.gitignore
+++ /dev/null
@@ -1,5 +0,0 @@
-#
-# Generated files
-#
-
-/config.tmp
diff --git a/board/samsung/smdk6400/Makefile b/board/samsung/smdk6400/Makefile
deleted file mode 100644
index 0d3e63b..0000000
--- a/board/samsung/smdk6400/Makefile
+++ /dev/null
@@ -1,48 +0,0 @@
-#
-# (C) Copyright 2000, 2001, 2002
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# (C) Copyright 2008
-# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(BOARD).o
-
-COBJS-y	:= smdk6400.o
-SOBJS	:= lowlevel_init.o
-
-SRCS    := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
-OBJS	:= $(addprefix $(obj),$(COBJS-y))
-SOBJS	:= $(addprefix $(obj),$(SOBJS))
-
-$(LIB):	$(obj).depend $(SOBJS) $(OBJS)
-	$(call cmd_link_o_target, $(SOBJS) $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/board/samsung/smdk6400/config.mk b/board/samsung/smdk6400/config.mk
deleted file mode 100644
index 6f04c2f..0000000
--- a/board/samsung/smdk6400/config.mk
+++ /dev/null
@@ -1,30 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
-# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
-#
-# (C) Copyright 2008
-# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
-#
-# SAMSUNG SMDK6400 board with mDirac3 (ARM1176) cpu
-#
-# see http://www.samsung.com/ for more information on SAMSUNG
-
-# On SMDK6400 we use the 64 MB SDRAM bank at
-#
-# 0x50000000 to 0x58000000
-#
-# Linux-Kernel is expected to be at 0x50008000, entry 0x50008000
-#
-# we load ourselves to 0x57e00000 without MMU
-# with MMU, load address is changed to 0xc7e00000
-#
-# download area is 0x5000c000
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef CONFIG_NAND_SPL
-CONFIG_SYS_TEXT_BASE = $(RAM_TEXT)
-else
-CONFIG_SYS_TEXT_BASE = 0
-endif
diff --git a/board/samsung/smdk6400/lowlevel_init.S b/board/samsung/smdk6400/lowlevel_init.S
deleted file mode 100644
index f7ce176..0000000
--- a/board/samsung/smdk6400/lowlevel_init.S
+++ /dev/null
@@ -1,323 +0,0 @@
-/*
- * Memory Setup stuff - taken from blob memsetup.S
- *
- * Copyright (C) 1999 2000 2001 Erik Mouw (J.A.K.Mouw at its.tudelft.nl) and
- *		       Jan-Derk Bakker (J.D.Bakker at its.tudelft.nl)
- *
- * Modified for the Samsung SMDK2410 by
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-#include <config.h>
-#include <version.h>
-
-#include <asm/arch/s3c6400.h>
-
-#ifdef CONFIG_SERIAL1
-#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART0_OFFSET)
-#elif defined(CONFIG_SERIAL2)
-#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART1_OFFSET)
-#else
-#define ELFIN_UART_CONSOLE_BASE (ELFIN_UART_BASE + ELFIN_UART2_OFFSET)
-#endif
-
-_TEXT_BASE:
-	.word	CONFIG_SYS_TEXT_BASE
-
-	.globl lowlevel_init
-lowlevel_init:
-	mov	r12, lr
-
-	/* LED on only #8 */
-	ldr	r0, =ELFIN_GPIO_BASE
-	ldr	r1, =0x55540000
-	str	r1, [r0, #GPNCON_OFFSET]
-
-	ldr	r1, =0x55555555
-	str	r1, [r0, #GPNPUD_OFFSET]
-
-	ldr	r1, =0xf000
-	str	r1, [r0, #GPNDAT_OFFSET]
-
-	/* Disable Watchdog */
-	ldr	r0, =0x7e000000		@0x7e004000
-	orr	r0, r0, #0x4000
-	mov	r1, #0
-	str	r1, [r0]
-
-	/* External interrupt pending clear */
-	ldr	r0, =(ELFIN_GPIO_BASE+EINTPEND_OFFSET)	/*EINTPEND*/
-	ldr	r1, [r0]
-	str	r1, [r0]
-
-	ldr	r0, =ELFIN_VIC0_BASE_ADDR	@0x71200000
-	ldr	r1, =ELFIN_VIC1_BASE_ADDR	@0x71300000
-
-	/* Disable all interrupts (VIC0 and VIC1) */
-	mvn	r3, #0x0
-	str	r3, [r0, #oINTMSK]
-	str	r3, [r1, #oINTMSK]
-
-	/* Set all interrupts as IRQ */
-	mov	r3, #0x0
-	str	r3, [r0, #oINTMOD]
-	str	r3, [r1, #oINTMOD]
-
-	/* Pending Interrupt Clear */
-	mov	r3, #0x0
-	str	r3, [r0, #oVECTADDR]
-	str	r3, [r1, #oVECTADDR]
-
-	/* init system clock */
-	bl system_clock_init
-
-#ifndef CONFIG_NAND_SPL
-	/* for UART */
-	bl uart_asm_init
-#endif
-
-#ifdef CONFIG_BOOT_NAND
-	/* simple init for NAND */
-	bl nand_asm_init
-#endif
-
-	/* Memory subsystem address 0x7e00f120 */
-	ldr	r0, =ELFIN_MEM_SYS_CFG
-
-	/* Xm0CSn2 = NFCON CS0, Xm0CSn3 = NFCON CS1 */
-	mov	r1, #S3C64XX_MEM_SYS_CFG_NAND
-	str	r1, [r0]
-
-	bl	mem_ctrl_asm_init
-
-/* Wakeup support. Don't know if it's going to be used, untested. */
-	ldr	r0, =(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET)
-	ldr	r1, [r0]
-	bic	r1, r1, #0xfffffff7
-	cmp	r1, #0x8
-	beq	wakeup_reset
-
-1:
-	mov	lr, r12
-	mov	pc, lr
-
-wakeup_reset:
-
-	/* Clear wakeup status register */
-	ldr	r0, =(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET)
-	ldr	r1, [r0]
-	str	r1, [r0]
-
-	/* LED test */
-	ldr	r0, =ELFIN_GPIO_BASE
-	ldr	r1, =0x3000
-	str	r1, [r0, #GPNDAT_OFFSET]
-
-	/* Load return address and jump to kernel */
-	ldr	r0, =(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET)
-	/* r1 = physical address of s3c6400_cpu_resume function */
-	ldr	r1, [r0]
-	/* Jump to kernel (sleep-s3c6400.S) */
-	mov	pc, r1
-	nop
-	nop
-/*
- * system_clock_init: Initialize core clock and bus clock.
- * void system_clock_init(void)
- */
-system_clock_init:
-	ldr	r0, =ELFIN_CLOCK_POWER_BASE	/* 0x7e00f000 */
-
-#ifdef CONFIG_SYNC_MODE
-	ldr	r1, [r0, #OTHERS_OFFSET]
-	mov	r2, #0x40
-	orr	r1, r1, r2
-	str	r1, [r0, #OTHERS_OFFSET]
-
-	nop
-	nop
-	nop
-	nop
-	nop
-
-	ldr	r2, =0x80
-	orr	r1, r1, r2
-	str	r1, [r0, #OTHERS_OFFSET]
-
-check_syncack:
-	ldr	r1, [r0, #OTHERS_OFFSET]
-	ldr	r2, =0xf00
-	and	r1, r1, r2
-	cmp	r1, #0xf00
-	bne	check_syncack
-#else	/* ASYNC Mode */
-	nop
-	nop
-	nop
-	nop
-	nop
-
-	/*
-	 * This was unconditional in original Samsung sources, but it doesn't
-	 * seem to make much sense on S3C6400.
-	 */
-#ifndef CONFIG_S3C6400
-	ldr	r1, [r0, #OTHERS_OFFSET]
-	bic	r1, r1, #0xC0
-	orr	r1, r1, #0x40
-	str	r1, [r0, #OTHERS_OFFSET]
-
-wait_for_async:
-	ldr	r1, [r0, #OTHERS_OFFSET]
-	and	r1, r1, #0xf00
-	cmp	r1, #0x0
-	bne	wait_for_async
-#endif
-
-	ldr	r1, [r0, #OTHERS_OFFSET]
-	bic	r1, r1, #0x40
-	str	r1, [r0, #OTHERS_OFFSET]
-#endif
-
-	mov	r1, #0xff00
-	orr	r1, r1, #0xff
-	str	r1, [r0, #APLL_LOCK_OFFSET]
-	str	r1, [r0, #MPLL_LOCK_OFFSET]
-
-	/* Set Clock Divider */
-	ldr	r1, [r0, #CLK_DIV0_OFFSET]
-	bic	r1, r1, #0x30000
-	bic	r1, r1, #0xff00
-	bic	r1, r1, #0xff
-	ldr	r2, =CLK_DIV_VAL
-	orr	r1, r1, r2
-	str	r1, [r0, #CLK_DIV0_OFFSET]
-
-	ldr	r1, =APLL_VAL
-	str	r1, [r0, #APLL_CON_OFFSET]
-	ldr	r1, =MPLL_VAL
-	str	r1, [r0, #MPLL_CON_OFFSET]
-
-	/* FOUT of EPLL is 96MHz */
-	ldr	r1, =0x200203
-	str	r1, [r0, #EPLL_CON0_OFFSET]
-	ldr	r1, =0x0
-	str	r1, [r0, #EPLL_CON1_OFFSET]
-
-	/* APLL, MPLL, EPLL select to Fout */
-	ldr	r1, [r0, #CLK_SRC_OFFSET]
-	orr	r1, r1, #0x7
-	str	r1, [r0, #CLK_SRC_OFFSET]
-
-	/* wait at least 200us to stablize all clock */
-	mov	r1, #0x10000
-1:	subs	r1, r1, #1
-	bne	1b
-
-	/* Synchronization for VIC port */
-#if defined(CONFIG_SYNC_MODE)
-	ldr	r1, [r0, #OTHERS_OFFSET]
-	orr	r1, r1, #0x20
-	str	r1, [r0, #OTHERS_OFFSET]
-#elif !defined(CONFIG_S3C6400)
-	/* According to 661558um_S3C6400X_rev10.pdf 0x20 is reserved */
-	ldr	r1, [r0, #OTHERS_OFFSET]
-	bic	r1, r1, #0x20
-	str	r1, [r0, #OTHERS_OFFSET]
-#endif
-	mov	pc, lr
-
-
-#ifndef CONFIG_NAND_SPL
-/*
- * uart_asm_init: Initialize UART's pins
- */
-uart_asm_init:
-	/* set GPIO to enable UART */
-	ldr	r0, =ELFIN_GPIO_BASE
-	ldr	r1, =0x220022
-	str	r1, [r0, #GPACON_OFFSET]
-	mov	pc, lr
-#endif
-
-#ifdef CONFIG_BOOT_NAND
-/*
- * NAND Interface init for SMDK6400
- */
-nand_asm_init:
-	ldr	r0, =ELFIN_NAND_BASE
-	ldr	r1, [r0, #NFCONF_OFFSET]
-	orr	r1, r1, #0x70
-	orr	r1, r1, #0x7700
-	str	r1, [r0, #NFCONF_OFFSET]
-
-	ldr	r1, [r0, #NFCONT_OFFSET]
-	orr	r1, r1, #0x07
-	str	r1, [r0, #NFCONT_OFFSET]
-
-	mov	pc, lr
-#endif
-
-#ifdef CONFIG_ENABLE_MMU
-/*
- * MMU Table for SMDK6400
- */
-
-	/* form a first-level section entry */
-.macro FL_SECTION_ENTRY base,ap,d,c,b
-	.word (\base << 20) | (\ap << 10) | \
-	      (\d << 5) | (1<<4) | (\c << 3) | (\b << 2) | (1<<1)
-.endm
-
-.section .mmudata, "a"
-	.align 14
-	/* the following alignment creates the mmu table@address 0x4000. */
-	.globl mmu_table
-mmu_table:
-	.set __base, 0
-	/* 1:1 mapping for debugging */
-	.rept 0xA00
-	FL_SECTION_ENTRY __base, 3, 0, 0, 0
-	.set __base, __base + 1
-	.endr
-
-	/* access is not allowed. */
-	.rept 0xC00 - 0xA00
-	.word 0x00000000
-	.endr
-
-	/* 128MB for SDRAM 0xC0000000 -> 0x50000000 */
-	.set __base, 0x500
-	.rept 0xC80 - 0xC00
-	FL_SECTION_ENTRY __base, 3, 0, 1, 1
-	.set __base, __base + 1
-	.endr
-
-	/* access is not allowed. */
-	.rept 0x1000 - 0xc80
-	.word 0x00000000
-	.endr
-#endif
diff --git a/board/samsung/smdk6400/smdk6400.c b/board/samsung/smdk6400/smdk6400.c
deleted file mode 100644
index c40d1f9..0000000
--- a/board/samsung/smdk6400/smdk6400.c
+++ /dev/null
@@ -1,134 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <netdev.h>
-#include <asm/arch/s3c6400.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* ------------------------------------------------------------------------- */
-#define CS8900_Tacs	0x0	/* 0clk		address set-up		*/
-#define CS8900_Tcos	0x4	/* 4clk		chip selection set-up	*/
-#define CS8900_Tacc	0xE	/* 14clk	access cycle		*/
-#define CS8900_Tcoh	0x1	/* 1clk		chip selection hold	*/
-#define CS8900_Tah	0x4	/* 4clk		address holding time	*/
-#define CS8900_Tacp	0x6	/* 6clk		page mode access cycle	*/
-#define CS8900_PMC	0x0	/* normal(1data)page mode configuration	*/
-
-static inline void delay(unsigned long loops)
-{
-	__asm__ volatile ("1:\n" "subs %0, %1, #1\n"
-			  "bne 1b"
-			  : "=r" (loops) : "0" (loops));
-}
-
-/*
- * Miscellaneous platform dependent initialisations
- */
-
-static void cs8900_pre_init(void)
-{
-	SROM_BW_REG &= ~(0xf << 4);
-	SROM_BW_REG |= (1 << 7) | (1 << 6) | (1 << 4);
-	SROM_BC1_REG = ((CS8900_Tacs << 28) + (CS8900_Tcos << 24) +
-			(CS8900_Tacc << 16) + (CS8900_Tcoh << 12) +
-			(CS8900_Tah << 8) + (CS8900_Tacp << 4) + CS8900_PMC);
-}
-
-int board_init(void)
-{
-	cs8900_pre_init();
-
-	/* NOR-flash in SROM0 */
-
-	/* Enable WAIT */
-	SROM_BW_REG |= 4 | 8 | 1;
-
-	gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
-
-	return 0;
-}
-
-void dram_init_banksize(void)
-{
-	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
-	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
-}
-
-int dram_init(void)
-{
-	gd->ram_size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE,
-				PHYS_SDRAM_1_SIZE);
-
-	return 0;
-}
-
-#ifdef CONFIG_DISPLAY_BOARDINFO
-int checkboard(void)
-{
-	printf("Board:   SMDK6400\n");
-	return 0;
-}
-#endif
-
-#ifdef CONFIG_ENABLE_MMU
-ulong virt_to_phy_smdk6400(ulong addr)
-{
-	if ((0xc0000000 <= addr) && (addr < 0xc8000000))
-		return addr - 0xc0000000 + 0x50000000;
-	else
-		printf("do not support this address : %08lx\n", addr);
-
-	return addr;
-}
-#endif
-
-ulong board_flash_get_legacy (ulong base, int banknum, flash_info_t *info)
-{
-	if (banknum == 0) {	/* non-CFI boot flash */
-		info->portwidth = FLASH_CFI_16BIT;
-		info->chipwidth = FLASH_CFI_BY16;
-		info->interface = FLASH_CFI_X16;
-		return 1;
-	} else
-		return 0;
-}
-
-#ifdef CONFIG_CMD_NET
-int board_eth_init(bd_t *bis)
-{
-	int rc = 0;
-#ifdef CONFIG_CS8900
-	rc = cs8900_initialize(0, CONFIG_CS8900_BASE);
-#endif
-	return rc;
-}
-#endif
diff --git a/board/samsung/smdk6400/smdk6400_nand_spl.c b/board/samsung/smdk6400/smdk6400_nand_spl.c
deleted file mode 100644
index 26a6146..0000000
--- a/board/samsung/smdk6400/smdk6400_nand_spl.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-void board_init_f(unsigned long bootflag)
-{
-	relocate_code(CONFIG_SYS_TEXT_BASE);
-}
diff --git a/board/samsung/smdk6400/u-boot-nand.lds b/board/samsung/smdk6400/u-boot-nand.lds
deleted file mode 100644
index 7c74267..0000000
--- a/board/samsung/smdk6400/u-boot-nand.lds
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-	. = 0x00000000;
-
-	. = ALIGN(4);
-	.text      :
-	{
-	  arch/arm/cpu/arm1176/start.o	(.text)
-	  *(.text)
-	}
-
-	. = ALIGN(4);
-	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
-	. = ALIGN(4);
-	.data : { *(.data) }
-
-	. = ALIGN(4);
-	.got : { *(.got) }
-
-
-	. = align(4);
-	.u_boot_list : {
-		KEEP(*(SORT(.u_boot_list*)));
-	}
-
-	. = ALIGN(4);
-
-	__image_copy_end = .;
-
-	. = align(4);
-	.mmudata : { *(.mmudata) }
-
-	. = ALIGN(4);
-
-	.rel.dyn : {
-		__rel_dyn_start = .;
-		*(.rel*)
-		__rel_dyn_end = .;
-	}
-
-	.dynsym : {
-		__dynsym_start = .;
-		*(.dynsym)
-	}
-
-	_end = .;
-
-	.bss __rel_dyn_start (OVERLAY) : {
-		__bss_start = .;
-		*(.bss)
-		. = ALIGN(4);
-		__bss_end = .;
-	}
-
-	/DISCARD/ : { *(.dynstr*) }
-	/DISCARD/ : { *(.dynamic*) }
-	/DISCARD/ : { *(.plt*) }
-	/DISCARD/ : { *(.interp*) }
-	/DISCARD/ : { *(.gnu*) }
-}
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index 189b883..2cdb8a9 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -11,6 +11,7 @@ easily if here is something they might want to dig for...
 
 Board            Arch        CPU            Commit      Removed     Last known maintainer/contact
 =================================================================================================
+smdk6400         arm         arm1176        -           -           Zhong Hongbo <bocui107@gmail.com>
 ns9750dev        arm         arm926ejs      -           -           Markus Pietrek <mpietrek@fsforth.de>
 AMX860           powerpc     mpc860         1b0757e     2012-10-28  Wolfgang Denk <wd@denx.de>
 c2mon            powerpc     mpc855         1b0757e     2012-10-28  Wolfgang Denk <wd@denx.de>
diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h
deleted file mode 100644
index d4dc8ef..0000000
--- a/include/configs/smdk6400.h
+++ /dev/null
@@ -1,296 +0,0 @@
-/*
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- * Gary Jennejohn <garyj@denx.de>
- * David Mueller <d.mueller@elsoft.ch>
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * Configuation settings for the SAMSUNG SMDK6400(mDirac-III) board.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/*
- * High Level Configuration Options
- * (easy to change)
- */
-#define CONFIG_S3C6400		1	/* in a SAMSUNG S3C6400 SoC     */
-#define CONFIG_S3C64XX		1	/* in a SAMSUNG S3C64XX Family  */
-#define CONFIG_SMDK6400		1	/* on a SAMSUNG SMDK6400 Board  */
-
-#define CONFIG_PERIPORT_REMAP
-#define CONFIG_PERIPORT_BASE	0x70000000
-#define CONFIG_PERIPORT_SIZE	0x13
-
-#define CONFIG_SYS_IRAM_BASE    0x0c000000  /* Internal SRAM base address */
-#define CONFIG_SYS_IRAM_SIZE    0x2000      /* 8 KB of internal SRAM memory */
-#define CONFIG_SYS_IRAM_END     (CONFIG_SYS_IRAM_BASE + CONFIG_SYS_IRAM_SIZE)
-#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_IRAM_END - GENERATED_GBL_DATA_SIZE)
-
-#define CONFIG_SYS_SDRAM_BASE	0x50000000
-
-/* input clock of PLL: SMDK6400 has 12MHz input clock */
-#define CONFIG_SYS_CLK_FREQ	12000000
-
-#if !defined(CONFIG_NAND_SPL) && (CONFIG_SYS_TEXT_BASE >= 0xc0000000)
-#define CONFIG_ENABLE_MMU
-#endif
-
-#define CONFIG_SETUP_MEMORY_TAGS
-#define CONFIG_CMDLINE_TAG
-#define CONFIG_INITRD_TAG
-
-/*
- * Architecture magic and machine type
- */
-#define CONFIG_MACH_TYPE		1270
-
-#define CONFIG_DISPLAY_CPUINFO
-#define CONFIG_DISPLAY_BOARDINFO
-
-/*
- * Size of malloc() pool
- */
-#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
-
-/*
- * Hardware drivers
- */
-#define CONFIG_CS8900			/* we have a CS8900 on-board	*/
-#define CONFIG_CS8900_BASE	  	0x18800300
-#define CONFIG_CS8900_BUS16		/* follow the Linux driver	*/
-
-/*
- * select serial console configuration
- */
-#define CONFIG_SERIAL1          1	/* we use SERIAL 1 on SMDK6400	*/
-
-#define CONFIG_SYS_HUSH_PARSER			/* use "hush" command parser	*/
-
-#define CONFIG_CMDLINE_EDITING
-
-/* allow to overwrite serial and ethaddr */
-#define CONFIG_ENV_OVERWRITE
-
-#define CONFIG_BAUDRATE		115200
-
-/***********************************************************
- * Command definition
- ***********************************************************/
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_REGINFO
-#define CONFIG_CMD_LOADS
-#define CONFIG_CMD_LOADB
-#define CONFIG_CMD_SAVEENV
-#define CONFIG_CMD_NAND
-#if defined(CONFIG_BOOT_ONENAND)
-#define CONFIG_CMD_ONENAND
-#endif
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_ELF
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_EXT2
-
-#define CONFIG_BOOTDELAY	3
-
-#define CONFIG_ZERO_BOOTDELAY_CHECK
-
-#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE	115200	/* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX	1	/* which serial port to use	 */
-#endif
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_LONGHELP				/* undef to save memory	      */
-#define CONFIG_SYS_PROMPT		"SMDK6400 # "	/* Monitor Command Prompt     */
-#define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size    */
-#define CONFIG_SYS_PBSIZE		384		/* Print Buffer Size          */
-#define CONFIG_SYS_MAXARGS		16		/* max number of command args */
-#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size  */
-
-#define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE	/* memtest works on	      */
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + 0x7e00000) /* 126MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE	/* default load address	*/
-
-#define CONFIG_SYS_HZ			1000
-
-/**********************************
- Support Clock Settings
- **********************************
- Setting	SYNC	ASYNC
- ----------------------------------
- 667_133_66	 X	  O
- 533_133_66	 O	  O
- 400_133_66	 X	  O
- 400_100_50	 O	  O
- **********************************/
-
-/*#define CONFIG_CLK_667_133_66*/
-#define CONFIG_CLK_533_133_66
-/*
-#define CONFIG_CLK_400_100_50
-#define CONFIG_CLK_400_133_66
-#define CONFIG_SYNC_MODE
-*/
-
-/* SMDK6400 has 2 banks of DRAM, but we use only one in U-Boot */
-#define CONFIG_NR_DRAM_BANKS	1
-#define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE	/* SDRAM Bank #1	*/
-#define PHYS_SDRAM_1_SIZE	0x08000000	/* 128 MB in Bank #1	*/
-
-#define CONFIG_SYS_FLASH_BASE		0x10000000
-#define CONFIG_SYS_MONITOR_BASE	0x00000000
-
-/*-----------------------------------------------------------------------
- * FLASH and environment organization
- */
-#define CONFIG_SYS_MAX_FLASH_BANKS	1	/* max number of memory banks	*/
-/* AM29LV160B has 35 sectors, AM29LV800B - 19 */
-#define CONFIG_SYS_MAX_FLASH_SECT	40
-
-#define CONFIG_AMD_LV800
-#define CONFIG_SYS_FLASH_CFI		1	/* Use CFI parameters (needed?) */
-/* Use drivers/cfi_flash.c, even though the flash is not CFI-compliant	*/
-#define CONFIG_FLASH_CFI_DRIVER	1
-#define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
-#define CONFIG_FLASH_CFI_LEGACY
-#define CONFIG_SYS_FLASH_LEGACY_512Kx16
-
-/* timeout values are in ticks */
-#define CONFIG_SYS_FLASH_ERASE_TOUT	(5 * CONFIG_SYS_HZ) /* Timeout for Flash Erase	*/
-#define CONFIG_SYS_FLASH_WRITE_TOUT	(5 * CONFIG_SYS_HZ) /* Timeout for Flash Write	*/
-
-#define CONFIG_ENV_SIZE		0x4000	/* Total Size of Environment Sector */
-
-/*
- * SMDK6400 board specific data
- */
-
-#define CONFIG_IDENT_STRING	" for SMDK6400"
-
-/* base address for uboot */
-#define CONFIG_SYS_PHY_UBOOT_BASE	(CONFIG_SYS_SDRAM_BASE + 0x07e00000)
-/* total memory available to uboot */
-#define CONFIG_SYS_UBOOT_SIZE		(1024 * 1024)
-
-/* Put environment copies after the end of U-Boot owned RAM */
-#define CONFIG_NAND_ENV_DST	(CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE)
-
-#ifdef CONFIG_ENABLE_MMU
-#define CONFIG_SYS_MAPPED_RAM_BASE	0xc0000000
-#define CONFIG_BOOTCOMMAND	"nand read 0xc0018000 0x60000 0x1c0000;" \
-				"bootm 0xc0018000"
-#else
-#define CONFIG_SYS_MAPPED_RAM_BASE	CONFIG_SYS_SDRAM_BASE
-#define CONFIG_BOOTCOMMAND	"nand read 0x50018000 0x60000 0x1c0000;" \
-				"bootm 0x50018000"
-#endif
-
-/* NAND U-Boot load and start address */
-#define CONFIG_SYS_UBOOT_BASE		(CONFIG_SYS_MAPPED_RAM_BASE + 0x07e00000)
-
-#define CONFIG_ENV_OFFSET		0x0040000
-
-/* NAND configuration */
-#define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_BASE		0x70200010
-#define CONFIG_SYS_S3C_NAND_HWECC
-
-#define CONFIG_SYS_NAND_SKIP_BAD_DOT_I	1  /* ".i" read skips bad blocks	      */
-#define CONFIG_SYS_NAND_WP		1
-#define CONFIG_SYS_NAND_YAFFS_WRITE	1  /* support yaffs write		      */
-#define CONFIG_SYS_NAND_BBT_2NDPAGE	1  /* bad-block markers in 1st and 2nd pages  */
-
-#define CONFIG_SYS_NAND_U_BOOT_DST	CONFIG_SYS_PHY_UBOOT_BASE	/* NUB load-addr      */
-#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_NAND_U_BOOT_DST	/* NUB start-addr     */
-
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	(4 * 1024)	/* Offset to RAM U-Boot image */
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	(252 * 1024)	/* Size of RAM U-Boot image   */
-
-/* NAND chip page size		*/
-#define CONFIG_SYS_NAND_PAGE_SIZE	2048
-/* NAND chip block size		*/
-#define CONFIG_SYS_NAND_BLOCK_SIZE	(128 * 1024)
-/* NAND chip page per block count  */
-#define CONFIG_SYS_NAND_PAGE_COUNT	64
-/* Location of the bad-block label */
-#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
-/* Extra address cycle for > 128MiB */
-#define CONFIG_SYS_NAND_5_ADDR_CYCLE
-
-/* Size of the block protected by one OOB (Spare Area in Samsung terminology) */
-#define CONFIG_SYS_NAND_ECCSIZE	CONFIG_SYS_NAND_PAGE_SIZE
-/* Number of ECC bytes per OOB - S3C6400 calculates 4 bytes ECC in 1-bit mode */
-#define CONFIG_SYS_NAND_ECCBYTES	4
-/* Size of a single OOB region */
-#define CONFIG_SYS_NAND_OOBSIZE	64
-/* ECC byte positions */
-#define CONFIG_SYS_NAND_ECCPOS		{40, 41, 42, 43, 44, 45, 46, 47, \
-				 48, 49, 50, 51, 52, 53, 54, 55, \
-				 56, 57, 58, 59, 60, 61, 62, 63}
-
-/* Boot configuration (define only one of next 3) */
-#define CONFIG_BOOT_NAND
-/* None of these are currently implemented. Left from the original Samsung
- * version for reference
-#define CONFIG_BOOT_NOR
-#define CONFIG_BOOT_MOVINAND
-#define CONFIG_BOOT_ONENAND
-*/
-
-#define CONFIG_NAND
-#define CONFIG_NAND_S3C64XX
-/* Unimplemented or unsupported. See comment above.
-#define CONFIG_ONENAND
-#define CONFIG_MOVINAND
-*/
-
-/* Settings as above boot configuration */
-#define CONFIG_ENV_IS_IN_NAND
-#define CONFIG_BOOTARGS		"console=ttySAC,115200"
-
-#if !defined(CONFIG_ENABLE_MMU)
-#define CONFIG_CMD_USB			1
-#define CONFIG_USB_S3C64XX
-#define CONFIG_USB_OHCI_NEW		1
-#define CONFIG_SYS_USB_OHCI_REGS_BASE		0x74300000
-#define CONFIG_SYS_USB_OHCI_SLOT_NAME		"s3c6400"
-#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	3
-#define CONFIG_SYS_USB_OHCI_CPU_INIT		1
-
-#define CONFIG_USB_STORAGE	1
-#endif
-#define CONFIG_DOS_PARTITION	1
-
-#if defined(CONFIG_USB_OHCI_NEW) && defined(CONFIG_ENABLE_MMU)
-# error "usb_ohci.c is currently broken with MMU enabled."
-#endif
-
-#endif	/* __CONFIG_H */
diff --git a/nand_spl/board/samsung/smdk6400/Makefile b/nand_spl/board/samsung/smdk6400/Makefile
deleted file mode 100644
index c9e75ba..0000000
--- a/nand_spl/board/samsung/smdk6400/Makefile
+++ /dev/null
@@ -1,117 +0,0 @@
-#
-# (C) Copyright 2006-2007
-# Stefan Roese, DENX Software Engineering, sr at denx.de.
-#
-# (C) Copyright 2008
-# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-CONFIG_NAND_SPL	= y
-
-include $(TOPDIR)/config.mk
-include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
-
-nandobj	:= $(OBJTREE)/nand_spl/
-
-LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
-LDFLAGS := -T $(nandobj)u-boot.lds -Ttext $(CONFIG_SYS_TEXT_BASE) $(LDFLAGS) \
-		$(LDFLAGS_FINAL) -gc-sections
-AFLAGS	+= -DCONFIG_NAND_SPL
-CFLAGS	+= -DCONFIG_NAND_SPL -ffunction-sections
-
-SOBJS	= start.o cpu_init.o lowlevel_init.o
-COBJS	= nand_boot.o nand_ecc.o s3c64xx.o smdk6400_nand_spl.o nand_base.o
-
-SRCS	:= $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS))
-__OBJS	:= $(SOBJS) $(COBJS)
-LNDIR	:= $(nandobj)board/$(BOARDDIR)
-
-ALL	= $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
-
-all:	$(obj).depend $(ALL)
-
-$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
-	$(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
-
-$(nandobj)u-boot-spl.bin:	$(nandobj)u-boot-spl
-	$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
-
-$(nandobj)u-boot-spl:	$(OBJS) $(nandobj)u-boot.lds
-	cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) \
-		-Map $(nandobj)u-boot-spl.map \
-		-o $(nandobj)u-boot-spl
-
-$(nandobj)u-boot.lds: $(LDSCRIPT)
-	$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
-
-# create symbolic links for common files
-
-# from cpu directory
-$(obj)start.S:
-	@rm -f $@
-	@ln -s $(TOPDIR)/arch/arm/cpu/arm1176/start.S $@
-
-# from SoC directory
-$(obj)cpu_init.S:
-	@rm -f $@
-	@ln -s $(TOPDIR)/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S $@
-
-# from board directory
-$(obj)lowlevel_init.S:
-	@rm -f $@
-	@ln -s $(TOPDIR)/board/samsung/smdk6400/lowlevel_init.S $@
-
-# from nand_spl directory
-$(obj)nand_boot.c:
-	@rm -f $@
-	@ln -s $(TOPDIR)/nand_spl/nand_boot.c $@
-
-# from drivers/mtd/nand directory
-$(obj)nand_ecc.c:
-	@rm -f $@
-	@ln -s $(TOPDIR)/drivers/mtd/nand/nand_ecc.c $@
-
-$(obj)s3c64xx.c:
-	@rm -f $@
-	@ln -s $(TOPDIR)/drivers/mtd/nand/s3c64xx.c $@
-
-$(obj)smdk6400_nand_spl.c:
-	@rm -f $@
-	@ln -s $(TOPDIR)/board/samsung/smdk6400/smdk6400_nand_spl.c $@
-
-$(obj)nand_base.c:
-	@rm -f $@
-	@ln -s $(TOPDIR)/drivers/mtd/nand/nand_base.c $@
-#########################################################################
-
-$(obj)%.o:	$(obj)%.S
-	$(CC) $(AFLAGS) -c -o $@ $<
-
-$(obj)%.o:	$(obj)%.c
-	$(CC) $(CFLAGS) -c -o $@ $<
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/nand_spl/board/samsung/smdk6400/config.mk b/nand_spl/board/samsung/smdk6400/config.mk
deleted file mode 100644
index 8bea498..0000000
--- a/nand_spl/board/samsung/smdk6400/config.mk
+++ /dev/null
@@ -1,40 +0,0 @@
-#
-# (C) Copyright 2006
-# Stefan Roese, DENX Software Engineering, sr at denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-#
-# Samsung S3C64xx Reference Platform (smdk6400) board
-
-# CONFIG_SYS_TEXT_BASE for SPL:
-#
-# On S3C64xx platforms the SPL is located in SRAM@0.
-#
-# CONFIG_SYS_TEXT_BASE = 0
-
-include $(TOPDIR)/board/$(BOARDDIR)/config.mk
-
-# PAD_TO used to generate a 4kByte binary needed for the combined image
-# -> PAD_TO = CONFIG_SYS_TEXT_BASE + 4096
-PAD_TO	:= $(shell expr $$[$(CONFIG_SYS_TEXT_BASE) + 4096])
-
-ifeq ($(debug),1)
-PLATFORM_CPPFLAGS += -DDEBUG
-endif
diff --git a/nand_spl/board/samsung/smdk6400/u-boot.lds b/nand_spl/board/samsung/smdk6400/u-boot.lds
deleted file mode 100644
index 78907fd..0000000
--- a/nand_spl/board/samsung/smdk6400/u-boot.lds
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-ENTRY(_start)
-SECTIONS
-{
-	. = 0x00000000;
-
-	. = ALIGN(4);
-	.text      :
-	{
-	  start.o	(.text)
-	  cpu_init.o	(.text)
-	  nand_boot.o	(.text)
-
-	  *(.text)
-	}
-
-	. = ALIGN(4);
-	.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
-
-	. = ALIGN(4);
-	.data : { *(.data) }
-
-	. = ALIGN(4);
-	.got : { *(.got) }
-
-
-	. = ALIGN(4);
-	.u_boot_list : {
-	*(SORT(.u_boot_list*));
-	}
-
-	. = ALIGN(4);
-
-	__image_copy_end = .;
-
-	.rel.dyn : {
-	__rel_dyn_start = .;
-	*(.rel*)
-	__rel_dyn_end = .;
-	}
-
-	.dynsym : {
-	__dynsym_start = .;
-	*(.dynsym)
-	}
-
-	_end = .;
-
-	.bss __rel_dyn_start (OVERLAY) : {
-	__bss_start = .;
-	*(.bss)
-	. = ALIGN(4);
-	__bss_end = .;
-	}
-}
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 26/30] Revert "mkconfig: start deprecating Makefile config targets"
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (23 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 25/30] arm: Remove support for smdk6400 Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 27/30] arm: Remove support for unused s3c64xx Benoît Thébaudeau
                   ` (6 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

This reverts commit 1285a2808a254f3d1a809c1a541f0c0f746e03d7 since the migration
of boards from Makefile to boards.cfg is now complete.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 doc/feature-removal-schedule.txt |   16 ----------------
 mkconfig                         |    9 ---------
 2 files changed, 25 deletions(-)

diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt
index 58db440..ce72861 100644
--- a/doc/feature-removal-schedule.txt
+++ b/doc/feature-removal-schedule.txt
@@ -51,22 +51,6 @@ Who:	Andy Fleming <afleming@freescale.com> and driver maintainers
 
 ---------------------------
 
-What:	boards with xxx_config targets in top level Makefile
-When:	Release v2012.03
-
-Why:	We have a boards.cfg file which the vast majority of boards have
-	converted over to.  Boards that still manually run mkconfig in the
-	top level Makefile are either dead, or the maintainer doesn't care,
-	or they are doing something weird/wrong that should be fixed in a
-	different way, or they need to extend boards.cfg syntax (unlikely).
-
-	In any case, if no one cares about these boards to figure out how
-	to make boards.cfg work, then we'll just punt them.
-
-Who:	Mike Frysinger <vapier@gentoo.org>
-
----------------------------
-
 What:	GPL cleanup
 When:	August 2009
 Why:	Over time, a couple of files have sneaked in into the U-Boot
diff --git a/mkconfig b/mkconfig
index 7c9aa74..73f852e 100755
--- a/mkconfig
+++ b/mkconfig
@@ -29,15 +29,6 @@ if [ \( $# -eq 2 \) -a \( "$1" = "-A" \) ] ; then
 	set ${line}
 	# add default board name if needed
 	[ $# = 3 ] && set ${line} ${1}
-elif [ "${MAKEFLAGS+set}${MAKELEVEL+set}" = "setset" ] ; then
-	# only warn when using a config target in the Makefile
-	cat <<-EOF
-
-	warning: Please migrate to boards.cfg.  Failure to do so will
-	         mean removal of your board in the next release.
-
-	EOF
-	sleep 5
 fi
 
 while [ $# -gt 0 ] ; do
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 27/30] arm: Remove support for unused s3c64xx
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (24 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 26/30] Revert "mkconfig: start deprecating Makefile config targets" Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 28/30] arm: Remove deprecated and now unused NAND SPL Benoît Thébaudeau
                   ` (5 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Following the removal of the smdk6400 board, the s3c64xx SoC becomes unused, so
remove associated code. It will still be possible to restore it later from the
Git history if necessary.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9:
 - Do not use "scrapyard" in patch description because this is reserved to refer
   to the board scrapyard file.

Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm1176/s3c64xx/Makefile        |   50 --
 arch/arm/cpu/arm1176/s3c64xx/config.mk       |   34 -
 arch/arm/cpu/arm1176/s3c64xx/cpu_init.S      |  135 ----
 arch/arm/cpu/arm1176/s3c64xx/init.c          |   26 -
 arch/arm/cpu/arm1176/s3c64xx/reset.S         |   34 -
 arch/arm/cpu/arm1176/s3c64xx/speed.c         |  145 -----
 arch/arm/cpu/arm1176/s3c64xx/timer.c         |  160 -----
 arch/arm/include/asm/arch-s3c64xx/hardware.h |   63 --
 arch/arm/include/asm/arch-s3c64xx/s3c6400.h  |  895 --------------------------
 arch/arm/include/asm/arch-s3c64xx/s3c64x0.h  |   90 ---
 doc/driver-model/UDM-serial.txt              |   42 +-
 drivers/mtd/nand/Makefile                    |    1 -
 drivers/mtd/nand/s3c64xx.c                   |  295 ---------
 drivers/mtd/onenand/onenand_base.c           |    4 -
 drivers/mtd/onenand/samsung.c                |   60 +-
 drivers/serial/Makefile                      |    1 -
 drivers/serial/s3c64xx.c                     |  187 ------
 drivers/serial/serial.c                      |    2 -
 drivers/usb/host/Makefile                    |    1 -
 drivers/usb/host/ohci-hcd.c                  |    1 -
 drivers/usb/host/s3c64xx-hcd.c               |   45 --
 include/common.h                             |    1 -
 include/onenand_uboot.h                      |    4 -
 23 files changed, 23 insertions(+), 2253 deletions(-)
 delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/Makefile
 delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/config.mk
 delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
 delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/init.c
 delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/reset.S
 delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/speed.c
 delete mode 100644 arch/arm/cpu/arm1176/s3c64xx/timer.c
 delete mode 100644 arch/arm/include/asm/arch-s3c64xx/hardware.h
 delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c6400.h
 delete mode 100644 arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
 delete mode 100644 drivers/mtd/nand/s3c64xx.c
 delete mode 100644 drivers/serial/s3c64xx.c
 delete mode 100644 drivers/usb/host/s3c64xx-hcd.c

diff --git a/arch/arm/cpu/arm1176/s3c64xx/Makefile b/arch/arm/cpu/arm1176/s3c64xx/Makefile
deleted file mode 100644
index 266a073..0000000
--- a/arch/arm/cpu/arm1176/s3c64xx/Makefile
+++ /dev/null
@@ -1,50 +0,0 @@
-#
-# (C) Copyright 2000-2003
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# (C) Copyright 2008
-# Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB	= $(obj)lib$(SOC).o
-
-SOBJS	= reset.o
-
-COBJS-$(CONFIG_S3C6400)	+= cpu_init.o speed.o
-COBJS-y	+= timer.o init.o
-
-OBJS	:= $(addprefix $(obj),$(SOBJS) $(COBJS-y))
-
-all:	$(obj).depend $(START) $(LIB)
-
-$(LIB):	$(OBJS)
-	$(call cmd_link_o_target, $(OBJS))
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude $(obj).depend
-
-#########################################################################
diff --git a/arch/arm/cpu/arm1176/s3c64xx/config.mk b/arch/arm/cpu/arm1176/s3c64xx/config.mk
deleted file mode 100644
index 222d352..0000000
--- a/arch/arm/cpu/arm1176/s3c64xx/config.mk
+++ /dev/null
@@ -1,34 +0,0 @@
-#
-# (C) Copyright 2002
-# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
-
-# Make ARMv5 to allow more compilers to work, even though its v6.
-PLATFORM_CPPFLAGS += -march=armv5t
-# =========================================================================
-#
-# Supply options according to compiler version
-#
-# =========================================================================
-PF_RELFLAGS_SLB_AT := $(call cc-option,-mshort-load-bytes,\
-			$(call cc-option,-malignment-traps,))
-PLATFORM_RELFLAGS += $(PF_RELFLAGS_SLB_AT)
diff --git a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S b/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
deleted file mode 100644
index df88cba..0000000
--- a/arch/arm/cpu/arm1176/s3c64xx/cpu_init.S
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * Originates from Samsung's u-boot 1.1.6 port to S3C6400 / SMDK6400
- *
- * Copyright (C) 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <asm/arch/s3c6400.h>
-
-	.globl mem_ctrl_asm_init
-mem_ctrl_asm_init:
-	/* DMC1 base address 0x7e001000 */
-	ldr	r0, =ELFIN_DMC1_BASE
-
-	ldr	r1, =0x4
-	str	r1, [r0, #INDEX_DMC_MEMC_CMD]
-
-	ldr	r1, =DMC_DDR_REFRESH_PRD
-	str	r1, [r0, #INDEX_DMC_REFRESH_PRD]
-
-	ldr	r1, =DMC_DDR_CAS_LATENCY
-	str	r1, [r0, #INDEX_DMC_CAS_LATENCY]
-
-	ldr	r1, =DMC_DDR_t_DQSS
-	str	r1, [r0, #INDEX_DMC_T_DQSS]
-
-	ldr	r1, =DMC_DDR_t_MRD
-	str	r1, [r0, #INDEX_DMC_T_MRD]
-
-	ldr	r1, =DMC_DDR_t_RAS
-	str	r1, [r0, #INDEX_DMC_T_RAS]
-
-	ldr	r1, =DMC_DDR_t_RC
-	str	r1, [r0, #INDEX_DMC_T_RC]
-
-	ldr	r1, =DMC_DDR_t_RCD
-	ldr	r2, =DMC_DDR_schedule_RCD
-	orr	r1, r1, r2
-	str	r1, [r0, #INDEX_DMC_T_RCD]
-
-	ldr	r1, =DMC_DDR_t_RFC
-	ldr	r2, =DMC_DDR_schedule_RFC
-	orr	r1, r1, r2
-	str	r1, [r0, #INDEX_DMC_T_RFC]
-
-	ldr	r1, =DMC_DDR_t_RP
-	ldr	r2, =DMC_DDR_schedule_RP
-	orr	r1, r1, r2
-	str	r1, [r0, #INDEX_DMC_T_RP]
-
-	ldr	r1, =DMC_DDR_t_RRD
-	str	r1, [r0, #INDEX_DMC_T_RRD]
-
-	ldr	r1, =DMC_DDR_t_WR
-	str	r1, [r0, #INDEX_DMC_T_WR]
-
-	ldr	r1, =DMC_DDR_t_WTR
-	str	r1, [r0, #INDEX_DMC_T_WTR]
-
-	ldr	r1, =DMC_DDR_t_XP
-	str	r1, [r0, #INDEX_DMC_T_XP]
-
-	ldr	r1, =DMC_DDR_t_XSR
-	str	r1, [r0, #INDEX_DMC_T_XSR]
-
-	ldr	r1, =DMC_DDR_t_ESR
-	str	r1, [r0, #INDEX_DMC_T_ESR]
-
-	ldr	r1, =DMC1_MEM_CFG
-	str	r1, [r0, #INDEX_DMC_MEMORY_CFG]
-
-	ldr	r1, =DMC1_MEM_CFG2
-	str	r1, [r0, #INDEX_DMC_MEMORY_CFG2]
-
-	ldr	r1, =DMC1_CHIP0_CFG
-	str	r1, [r0, #INDEX_DMC_CHIP_0_CFG]
-
-	ldr	r1, =DMC_DDR_32_CFG
-	str	r1, [r0, #INDEX_DMC_USER_CONFIG]
-
-	/* DMC0 DDR Chip 0 configuration direct command reg */
-	ldr	r1, =DMC_NOP0
-	str	r1, [r0, #INDEX_DMC_DIRECT_CMD]
-
-	/* Precharge All */
-	ldr	r1, =DMC_PA0
-	str	r1, [r0, #INDEX_DMC_DIRECT_CMD]
-
-	/* Auto Refresh 2 time */
-	ldr	r1, =DMC_AR0
-	str	r1, [r0, #INDEX_DMC_DIRECT_CMD]
-	str	r1, [r0, #INDEX_DMC_DIRECT_CMD]
-
-	/* MRS */
-	ldr	r1, =DMC_mDDR_EMR0
-	str	r1, [r0, #INDEX_DMC_DIRECT_CMD]
-
-	/* Mode Reg */
-	ldr	r1, =DMC_mDDR_MR0
-	str	r1, [r0, #INDEX_DMC_DIRECT_CMD]
-
-	/* Enable DMC1 */
-	mov	r1, #0x0
-	str	r1, [r0, #INDEX_DMC_MEMC_CMD]
-
-check_dmc1_ready:
-	ldr	r1, [r0, #INDEX_DMC_MEMC_STATUS]
-	mov	r2, #0x3
-	and	r1, r1, r2
-	cmp	r1, #0x1
-	bne	check_dmc1_ready
-	nop
-
-	mov	pc, lr
-
-	.ltorg
diff --git a/arch/arm/cpu/arm1176/s3c64xx/init.c b/arch/arm/cpu/arm1176/s3c64xx/init.c
deleted file mode 100644
index f113d8e..0000000
--- a/arch/arm/cpu/arm1176/s3c64xx/init.c
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * (C) Copyright 2012 Ashok Kumar Reddy Kourla
- * ashokkourla2000 at gmail.com
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include<common.h>
-
-int arch_cpu_init(void)
-{
-	icache_enable();
-
-	return 0;
-}
diff --git a/arch/arm/cpu/arm1176/s3c64xx/reset.S b/arch/arm/cpu/arm1176/s3c64xx/reset.S
deleted file mode 100644
index eae572e..0000000
--- a/arch/arm/cpu/arm1176/s3c64xx/reset.S
+++ /dev/null
@@ -1,34 +0,0 @@
-/*
- * Copyright (c) 2009 Samsung Electronics.
- * Minkyu Kang <mk7.kang@samsung.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <asm/arch/s3c6400.h>
-
-.globl reset_cpu
-reset_cpu:
-	ldr	r1, =ELFIN_CLOCK_POWER_BASE
-	ldr	r2, [r1, #SYS_ID_OFFSET]
-	ldr	r3, =0xffff
-	and	r2, r3, r2, lsr #12
-	str	r2, [r1, #SW_RST_OFFSET]
-_loop_forever:
-	b	_loop_forever
diff --git a/arch/arm/cpu/arm1176/s3c64xx/speed.c b/arch/arm/cpu/arm1176/s3c64xx/speed.c
deleted file mode 100644
index 11962ac..0000000
--- a/arch/arm/cpu/arm1176/s3c64xx/speed.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd at denx.de.
- *
- * (C) Copyright 2002
- * David Mueller, ELSOFT AG, d.mueller at elsoft.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * This code should work for both the S3C2400 and the S3C2410
- * as they seem to have the same PLL and clock machinery inside.
- * The different address mapping is handled by the s3c24xx.h files below.
- */
-
-#include <common.h>
-#include <asm/arch/s3c6400.h>
-
-#define APLL 0
-#define MPLL 1
-#define EPLL 2
-
-/* ------------------------------------------------------------------------- */
-/*
- * NOTE: This describes the proper use of this file.
- *
- * CONFIG_SYS_CLK_FREQ should be defined as the input frequency of the PLL.
- *
- * get_FCLK(), get_HCLK(), get_PCLK() and get_UCLK() return the clock of
- * the specified bus in HZ.
- */
-/* ------------------------------------------------------------------------- */
-
-static ulong get_PLLCLK(int pllreg)
-{
-	ulong r, m, p, s;
-
-	switch (pllreg) {
-	case APLL:
-		r = APLL_CON_REG;
-		break;
-	case MPLL:
-		r = MPLL_CON_REG;
-		break;
-	case EPLL:
-		r = EPLL_CON0_REG;
-		break;
-	default:
-		hang();
-	}
-
-	m = (r >> 16) & 0x3ff;
-	p = (r >> 8) & 0x3f;
-	s = r & 0x7;
-
-	return m * (CONFIG_SYS_CLK_FREQ / (p * (1 << s)));
-}
-
-/* return ARMCORE frequency */
-ulong get_ARMCLK(void)
-{
-	ulong div;
-
-	div = CLK_DIV0_REG;
-
-	return get_PLLCLK(APLL) / ((div & 0x7) + 1);
-}
-
-/* return FCLK frequency */
-ulong get_FCLK(void)
-{
-	return get_PLLCLK(APLL);
-}
-
-/* return HCLK frequency */
-ulong get_HCLK(void)
-{
-	ulong fclk;
-
-	uint hclkx2_div = ((CLK_DIV0_REG >> 9) & 0x7) + 1;
-	uint hclk_div = ((CLK_DIV0_REG >> 8) & 0x1) + 1;
-
-	/*
-	 * Bit 7 exists on s3c6410, and not on s3c6400, it is reserved on
-	 * s3c6400 and is always 0, and it is indeed running in ASYNC mode
-	 */
-	if (OTHERS_REG & 0x80)
-		fclk = get_FCLK();		/* SYNC Mode	*/
-	else
-		fclk = get_PLLCLK(MPLL);	/* ASYNC Mode	*/
-
-	return fclk / (hclk_div * hclkx2_div);
-}
-
-/* return PCLK frequency */
-ulong get_PCLK(void)
-{
-	ulong fclk;
-	uint hclkx2_div = ((CLK_DIV0_REG >> 9) & 0x7) + 1;
-	uint pre_div = ((CLK_DIV0_REG >> 12) & 0xf) + 1;
-
-	if (OTHERS_REG & 0x80)
-		fclk = get_FCLK();		/* SYNC Mode	*/
-	else
-		fclk = get_PLLCLK(MPLL);	/* ASYNC Mode	*/
-
-	return fclk / (hclkx2_div * pre_div);
-}
-
-/* return UCLK frequency */
-ulong get_UCLK(void)
-{
-	return get_PLLCLK(EPLL);
-}
-
-int print_cpuinfo(void)
-{
-	printf("\nCPU:     S3C6400@%luMHz\n", get_ARMCLK() / 1000000);
-	printf("         Fclk = %luMHz, Hclk = %luMHz, Pclk = %luMHz ",
-	       get_FCLK() / 1000000, get_HCLK() / 1000000,
-	       get_PCLK() / 1000000);
-
-	if (OTHERS_REG & 0x80)
-		printf("(SYNC Mode) \n");
-	else
-		printf("(ASYNC Mode) \n");
-	return 0;
-}
diff --git a/arch/arm/cpu/arm1176/s3c64xx/timer.c b/arch/arm/cpu/arm1176/s3c64xx/timer.c
deleted file mode 100644
index f16a37b..0000000
--- a/arch/arm/cpu/arm1176/s3c64xx/timer.c
+++ /dev/null
@@ -1,160 +0,0 @@
-/*
- * (C) Copyright 2003
- * Texas Instruments <www.ti.com>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Alex Zuepke <azu@sysgo.de>
- *
- * (C) Copyright 2002-2004
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * (C) Copyright 2004
- * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/proc-armv/ptrace.h>
-#include <asm/arch/s3c6400.h>
-#include <div64.h>
-
-static ulong timer_load_val;
-
-#define PRESCALER	167
-
-static s3c64xx_timers *s3c64xx_get_base_timers(void)
-{
-	return (s3c64xx_timers *)ELFIN_TIMER_BASE;
-}
-
-/* macro to read the 16 bit timer */
-static inline ulong read_timer(void)
-{
-	s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
-	return timers->TCNTO4;
-}
-
-/* Internal tick units */
-/* Last decremneter snapshot */
-static unsigned long lastdec;
-/* Monotonic incrementing timer */
-static unsigned long long timestamp;
-
-int timer_init(void)
-{
-	s3c64xx_timers *const timers = s3c64xx_get_base_timers();
-
-	/* use PWM Timer 4 because it has no output */
-	/*
-	 * We use the following scheme for the timer:
-	 * Prescaler is hard fixed at 167, divider at 1/4.
-	 * This gives at PCLK frequency 66MHz approx. 10us ticks
-	 * The timer is set to wrap after 100s, at 66MHz this obviously
-	 * happens after 10,000,000 ticks. A long variable can thus
-	 * keep values up to 40,000s, i.e., 11 hours. This should be
-	 * enough for most uses:-) Possible optimizations: select a
-	 * binary-friendly frequency, e.g., 1ms / 128. Also calculate
-	 * the prescaler automatically for other PCLK frequencies.
-	 */
-	timers->TCFG0 = PRESCALER << 8;
-	if (timer_load_val == 0) {
-		timer_load_val = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
-		timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
-	}
-
-	/* load value for 10 ms timeout */
-	lastdec = timers->TCNTB4 = timer_load_val;
-	/* auto load, manual update of Timer 4 */
-	timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO |
-		TCON_4_UPDATE;
-
-	/* auto load, start Timer 4 */
-	timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON;
-	timestamp = 0;
-
-	return 0;
-}
-
-/*
- * timer without interrupts
- */
-
-/*
- * This function is derived from PowerPC code (read timebase as long long).
- * On ARM it just returns the timer value.
- */
-unsigned long long get_ticks(void)
-{
-	ulong now = read_timer();
-
-	if (lastdec >= now) {
-		/* normal mode */
-		timestamp += lastdec - now;
-	} else {
-		/* we have an overflow ... */
-		timestamp += lastdec + timer_load_val - now;
-	}
-	lastdec = now;
-
-	return timestamp;
-}
-
-/*
- * This function is derived from PowerPC code (timebase clock frequency).
- * On ARM it returns the number of timer ticks per second.
- */
-ulong get_tbclk(void)
-{
-	/* We overrun in 100s */
-	return (ulong)(timer_load_val / 100);
-}
-
-ulong get_timer_masked(void)
-{
-	unsigned long long res = get_ticks();
-	do_div (res, (timer_load_val / (100 * CONFIG_SYS_HZ)));
-	return res;
-}
-
-ulong get_timer(ulong base)
-{
-	return get_timer_masked() - base;
-}
-
-void __udelay(unsigned long usec)
-{
-	unsigned long long tmp;
-	ulong tmo;
-
-	tmo = (usec + 9) / 10;
-	tmp = get_ticks() + tmo;	/* get current timestamp */
-
-	while (get_ticks() < tmp)/* loop till event */
-		 /*NOP*/;
-}
diff --git a/arch/arm/include/asm/arch-s3c64xx/hardware.h b/arch/arm/include/asm/arch-s3c64xx/hardware.h
deleted file mode 100644
index 84d24c9..0000000
--- a/arch/arm/include/asm/arch-s3c64xx/hardware.h
+++ /dev/null
@@ -1,63 +0,0 @@
-/*
- * Originates from Samsung's u-boot 1.1.6 port to S3C6400 / SMDK6400
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#ifndef _ARCH_HARDWARE_H_
-#define _ARCH_HARDWARE_H_
-
-#include <asm/sizes.h>
-
-#ifndef __ASSEMBLY__
-#define UData(Data)	((unsigned long) (Data))
-
-#define __REG(x)	(*(vu_long *)(x))
-#define __REGl(x)	(*(vu_long *)(x))
-#define __REGw(x)	(*(vu_short *)(x))
-#define __REGb(x)	(*(vu_char *)(x))
-#define __REG2(x, y)	(*(vu_long *)((x) + (y)))
-#else
-#define UData(Data)	(Data)
-
-#define __REG(x)	(x)
-#define __REGl(x)	(x)
-#define __REGw(x)	(x)
-#define __REGb(x)	(x)
-#define __REG2(x, y)	((x) + (y))
-#endif
-
-#define Fld(Size, Shft)	(((Size) << 16) + (Shft))
-
-#define FSize(Field)	((Field) >> 16)
-#define FShft(Field)	((Field) & 0x0000FFFF)
-#define FMsk(Field)	(((UData (1) << FSize (Field)) - 1) << FShft (Field))
-#define FAlnMsk(Field)	((UData (1) << FSize (Field)) - 1)
-#define F1stBit(Field)	(UData (1) << FShft (Field))
-
-#define FClrBit(Data, Bit)	(Data = (Data & ~(Bit)))
-#define FClrFld(Data, Field)	(Data = (Data & ~FMsk(Field)))
-
-#define FInsrt(Value, Field) \
-			(UData (Value) << FShft (Field))
-
-#define FExtr(Data, Field) \
-			((UData (Data) >> FShft (Field)) & FAlnMsk (Field))
-
-#endif /* _ARCH_HARDWARE_H_ */
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h b/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
deleted file mode 100644
index 10b3324..0000000
--- a/arch/arm/include/asm/arch-s3c64xx/s3c6400.h
+++ /dev/null
@@ -1,895 +0,0 @@
-/*
- * (C) Copyright 2007
- * Byungjae Lee, Samsung Erectronics, bjlee at samsung.com.
- *      - only support for S3C6400
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/************************************************
- * NAME	    : s3c6400.h
- *
- * Based on S3C6400 User's manual Rev 0.0
- ************************************************/
-
-#ifndef __S3C6400_H__
-#define __S3C6400_H__
-
-#define S3C64XX_UART_CHANNELS	3
-#define S3C64XX_SPI_CHANNELS	2
-
-#include <asm/hardware.h>
-
-#define ELFIN_CLOCK_POWER_BASE	0x7e00f000
-
-/* Clock & Power Controller for mDirac3*/
-#define APLL_LOCK_OFFSET	0x00
-#define MPLL_LOCK_OFFSET	0x04
-#define EPLL_LOCK_OFFSET	0x08
-#define APLL_CON_OFFSET		0x0C
-#define MPLL_CON_OFFSET		0x10
-#define EPLL_CON0_OFFSET	0x14
-#define EPLL_CON1_OFFSET	0x18
-#define CLK_SRC_OFFSET		0x1C
-#define CLK_DIV0_OFFSET		0x20
-#define CLK_DIV1_OFFSET		0x24
-#define CLK_DIV2_OFFSET		0x28
-#define CLK_OUT_OFFSET		0x2C
-#define HCLK_GATE_OFFSET	0x30
-#define PCLK_GATE_OFFSET	0x34
-#define SCLK_GATE_OFFSET	0x38
-#define AHB_CON0_OFFSET		0x100
-#define AHB_CON1_OFFSET		0x104
-#define AHB_CON2_OFFSET		0x108
-#define SELECT_DMA_OFFSET	0x110
-#define SW_RST_OFFSET		0x114
-#define SYS_ID_OFFSET		0x118
-#define MEM_SYS_CFG_OFFSET	0x120
-#define QOS_OVERRIDE0_OFFSET	0x124
-#define QOS_OVERRIDE1_OFFSET	0x128
-#define MEM_CFG_STAT_OFFSET	0x12C
-#define PWR_CFG_OFFSET		0x804
-#define EINT_MASK_OFFSET	0x808
-#define NOR_CFG_OFFSET		0x810
-#define STOP_CFG_OFFSET		0x814
-#define SLEEP_CFG_OFFSET	0x818
-#define OSC_FREQ_OFFSET		0x820
-#define OSC_STABLE_OFFSET	0x824
-#define PWR_STABLE_OFFSET	0x828
-#define FPC_STABLE_OFFSET	0x82C
-#define MTC_STABLE_OFFSET	0x830
-#define OTHERS_OFFSET		0x900
-#define RST_STAT_OFFSET		0x904
-#define WAKEUP_STAT_OFFSET	0x908
-#define BLK_PWR_STAT_OFFSET	0x90C
-#define INF_REG0_OFFSET		0xA00
-#define INF_REG1_OFFSET		0xA04
-#define INF_REG2_OFFSET		0xA08
-#define INF_REG3_OFFSET		0xA0C
-#define INF_REG4_OFFSET		0xA10
-#define INF_REG5_OFFSET		0xA14
-#define INF_REG6_OFFSET		0xA18
-#define INF_REG7_OFFSET		0xA1C
-
-#define OSC_CNT_VAL_OFFSET	0x824
-#define PWR_CNT_VAL_OFFSET	0x828
-#define FPC_CNT_VAL_OFFSET	0x82C
-#define MTC_CNT_VAL_OFFSET	0x830
-
-#define APLL_LOCK_REG		__REG(ELFIN_CLOCK_POWER_BASE + APLL_LOCK_OFFSET)
-#define MPLL_LOCK_REG		__REG(ELFIN_CLOCK_POWER_BASE + MPLL_LOCK_OFFSET)
-#define EPLL_LOCK_REG		__REG(ELFIN_CLOCK_POWER_BASE + EPLL_LOCK_OFFSET)
-#define APLL_CON_REG		__REG(ELFIN_CLOCK_POWER_BASE + APLL_CON_OFFSET)
-#define MPLL_CON_REG		__REG(ELFIN_CLOCK_POWER_BASE + MPLL_CON_OFFSET)
-#define EPLL_CON0_REG		__REG(ELFIN_CLOCK_POWER_BASE + EPLL_CON0_OFFSET)
-#define EPLL_CON1_REG		__REG(ELFIN_CLOCK_POWER_BASE + EPLL_CON1_OFFSET)
-#define CLK_SRC_REG		__REG(ELFIN_CLOCK_POWER_BASE + CLK_SRC_OFFSET)
-#define CLK_DIV0_REG		__REG(ELFIN_CLOCK_POWER_BASE + CLK_DIV0_OFFSET)
-#define CLK_DIV1_REG		__REG(ELFIN_CLOCK_POWER_BASE + CLK_DIV1_OFFSET)
-#define CLK_DIV2_REG		__REG(ELFIN_CLOCK_POWER_BASE + CLK_DIV2_OFFSET)
-#define CLK_OUT_REG		__REG(ELFIN_CLOCK_POWER_BASE + CLK_OUT_OFFSET)
-#define HCLK_GATE_REG		__REG(ELFIN_CLOCK_POWER_BASE + HCLK_GATE_OFFSET)
-#define PCLK_GATE_REG		__REG(ELFIN_CLOCK_POWER_BASE + PCLK_GATE_OFFSET)
-#define SCLK_GATE_REG		__REG(ELFIN_CLOCK_POWER_BASE + SCLK_GATE_OFFSET)
-#define AHB_CON0_REG		__REG(ELFIN_CLOCK_POWER_BASE + AHB_CON0_OFFSET)
-#define AHB_CON1_REG		__REG(ELFIN_CLOCK_POWER_BASE + AHB_CON1_OFFSET)
-#define AHB_CON2_REG		__REG(ELFIN_CLOCK_POWER_BASE + AHB_CON2_OFFSET)
-#define SELECT_DMA_REG		__REG(ELFIN_CLOCK_POWER_BASE + \
-				      SELECT_DMA_OFFSET)
-#define SW_RST_REG		__REG(ELFIN_CLOCK_POWER_BASE + SW_RST_OFFSET)
-#define SYS_ID_REG		__REG(ELFIN_CLOCK_POWER_BASE + SYS_ID_OFFSET)
-#define MEM_SYS_CFG_REG		__REG(ELFIN_CLOCK_POWER_BASE + \
-				      MEM_SYS_CFG_OFFSET)
-#define QOS_OVERRIDE0_REG	__REG(ELFIN_CLOCK_POWER_BASE + \
-				      QOS_OVERRIDE0_OFFSET)
-#define QOS_OVERRIDE1_REG	__REG(ELFIN_CLOCK_POWER_BASE + \
-				      QOS_OVERRIDE1_OFFSET)
-#define MEM_CFG_STAT_REG	__REG(ELFIN_CLOCK_POWER_BASE + \
-				      MEM_CFG_STAT_OFFSET)
-#define PWR_CFG_REG		__REG(ELFIN_CLOCK_POWER_BASE + PWR_CFG_OFFSET)
-#define EINT_MASK_REG		__REG(ELFIN_CLOCK_POWER_BASE + EINT_MASK_OFFSET)
-#define NOR_CFG_REG		__REG(ELFIN_CLOCK_POWER_BASE + NOR_CFG_OFFSET)
-#define STOP_CFG_REG		__REG(ELFIN_CLOCK_POWER_BASE + STOP_CFG_OFFSET)
-#define SLEEP_CFG_REG		__REG(ELFIN_CLOCK_POWER_BASE + SLEEP_CFG_OFFSET)
-#define OSC_FREQ_REG		__REG(ELFIN_CLOCK_POWER_BASE + OSC_FREQ_OFFSET)
-#define OSC_CNT_VAL_REG		__REG(ELFIN_CLOCK_POWER_BASE + \
-				      OSC_CNT_VAL_OFFSET)
-#define PWR_CNT_VAL_REG		__REG(ELFIN_CLOCK_POWER_BASE + \
-				      PWR_CNT_VAL_OFFSET)
-#define FPC_CNT_VAL_REG		__REG(ELFIN_CLOCK_POWER_BASE + \
-				      FPC_CNT_VAL_OFFSET)
-#define MTC_CNT_VAL_REG		__REG(ELFIN_CLOCK_POWER_BASE + \
-				      MTC_CNT_VAL_OFFSET)
-#define OTHERS_REG		__REG(ELFIN_CLOCK_POWER_BASE + OTHERS_OFFSET)
-#define RST_STAT_REG		__REG(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET)
-#define WAKEUP_STAT_REG		__REG(ELFIN_CLOCK_POWER_BASE + \
-				      WAKEUP_STAT_OFFSET)
-#define BLK_PWR_STAT_REG	__REG(ELFIN_CLOCK_POWER_BASE + \
-				      BLK_PWR_STAT_OFFSET)
-#define INF_REG0_REG		__REG(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET)
-#define INF_REG1_REG		__REG(ELFIN_CLOCK_POWER_BASE + INF_REG1_OFFSET)
-#define INF_REG2_REG		__REG(ELFIN_CLOCK_POWER_BASE + INF_REG2_OFFSET)
-#define INF_REG3_REG		__REG(ELFIN_CLOCK_POWER_BASE + INF_REG3_OFFSET)
-#define INF_REG4_REG		__REG(ELFIN_CLOCK_POWER_BASE + INF_REG4_OFFSET)
-#define INF_REG5_REG		__REG(ELFIN_CLOCK_POWER_BASE + INF_REG5_OFFSET)
-#define INF_REG6_REG		__REG(ELFIN_CLOCK_POWER_BASE + INF_REG6_OFFSET)
-#define INF_REG7_REG		__REG(ELFIN_CLOCK_POWER_BASE + INF_REG7_OFFSET)
-
-#define APLL_LOCK	(ELFIN_CLOCK_POWER_BASE + APLL_LOCK_OFFSET)
-#define MPLL_LOCK	(ELFIN_CLOCK_POWER_BASE + MPLL_LOCK_OFFSET)
-#define EPLL_LOCK	(ELFIN_CLOCK_POWER_BASE + EPLL_LOCK_OFFSET)
-#define APLL_CON	(ELFIN_CLOCK_POWER_BASE + APLL_CON_OFFSET)
-#define MPLL_CON	(ELFIN_CLOCK_POWER_BASE + MPLL_CON_OFFSET)
-#define EPLL_CON0	(ELFIN_CLOCK_POWER_BASE + EPLL_CON0_OFFSET)
-#define EPLL_CON1	(ELFIN_CLOCK_POWER_BASE + EPLL_CON1_OFFSET)
-#define CLK_SRC		(ELFIN_CLOCK_POWER_BASE + CLK_SRC_OFFSET)
-#define CLK_DIV0	(ELFIN_CLOCK_POWER_BASE + CLK_DIV0_OFFSET)
-#define CLK_DIV1	(ELFIN_CLOCK_POWER_BASE + CLK_DIV1_OFFSET)
-#define CLK_DIV2	(ELFIN_CLOCK_POWER_BASE + CLK_DIV2_OFFSET)
-#define CLK_OUT		(ELFIN_CLOCK_POWER_BASE + CLK_OUT_OFFSET)
-#define HCLK_GATE	(ELFIN_CLOCK_POWER_BASE + HCLK_GATE_OFFSET)
-#define PCLK_GATE	(ELFIN_CLOCK_POWER_BASE + PCLK_GATE_OFFSET)
-#define SCLK_GATE	(ELFIN_CLOCK_POWER_BASE + SCLK_GATE_OFFSET)
-#define AHB_CON0	(ELFIN_CLOCK_POWER_BASE + AHB_CON0_OFFSET)
-#define AHB_CON1	(ELFIN_CLOCK_POWER_BASE + AHB_CON1_OFFSET)
-#define AHB_CON2	(ELFIN_CLOCK_POWER_BASE + AHB_CON2_OFFSET)
-#define SELECT_DMA	(ELFIN_CLOCK_POWER_BASE + SELECT_DMA_OFFSET)
-#define SW_RST		(ELFIN_CLOCK_POWER_BASE + SW_RST_OFFSET)
-#define SYS_ID		(ELFIN_CLOCK_POWER_BASE + SYS_ID_OFFSET)
-#define MEM_SYS_CFG	(ELFIN_CLOCK_POWER_BASE + MEM_SYS_CFG_OFFSET)
-#define QOS_OVERRIDE0	(ELFIN_CLOCK_POWER_BASE + QOS_OVERRIDE0_OFFSET)
-#define QOS_OVERRIDE1	(ELFIN_CLOCK_POWER_BASE + QOS_OVERRIDE1_OFFSET)
-#define MEM_CFG_STAT	(ELFIN_CLOCK_POWER_BASE + MEM_CFG_STAT_OFFSET)
-#define PWR_CFG		(ELFIN_CLOCK_POWER_BASE + PWR_CFG_OFFSET)
-#define EINT_MASK	(ELFIN_CLOCK_POWER_BASE + EINT_MASK_OFFSET)
-#define NOR_CFG		(ELFIN_CLOCK_POWER_BASE + NOR_CFG_OFFSET)
-#define STOP_CFG	(ELFIN_CLOCK_POWER_BASE + STOP_CFG_OFFSET)
-#define SLEEP_CFG	(ELFIN_CLOCK_POWER_BASE + SLEEP_CFG_OFFSET)
-#define OSC_FREQ	(ELFIN_CLOCK_POWER_BASE + OSC_FREQ_OFFSET)
-#define OSC_CNT_VAL	(ELFIN_CLOCK_POWER_BASE + OSC_CNT_VAL_OFFSET)
-#define PWR_CNT_VAL	(ELFIN_CLOCK_POWER_BASE + PWR_CNT_VAL_OFFSET)
-#define FPC_CNT_VAL	(ELFIN_CLOCK_POWER_BASE + FPC_CNT_VAL_OFFSET)
-#define MTC_CNT_VAL	(ELFIN_CLOCK_POWER_BASE + MTC_CNT_VAL_OFFSET)
-#define OTHERS		(ELFIN_CLOCK_POWER_BASE + OTHERS_OFFSET)
-#define RST_STAT	(ELFIN_CLOCK_POWER_BASE + RST_STAT_OFFSET)
-#define WAKEUP_STAT	(ELFIN_CLOCK_POWER_BASE + WAKEUP_STAT_OFFSET)
-#define BLK_PWR_STAT	(ELFIN_CLOCK_POWER_BASE + BLK_PWR_STAT_OFFSET)
-#define INF_REG0	(ELFIN_CLOCK_POWER_BASE + INF_REG0_OFFSET)
-#define INF_REG1	(ELFIN_CLOCK_POWER_BASE + INF_REG1_OFFSET)
-#define INF_REG2	(ELFIN_CLOCK_POWER_BASE + INF_REG2_OFFSET)
-#define INF_REG3	(ELFIN_CLOCK_POWER_BASE + INF_REG3_OFFSET)
-#define INF_REG4	(ELFIN_CLOCK_POWER_BASE + INF_REG4_OFFSET)
-#define INF_REG5	(ELFIN_CLOCK_POWER_BASE + INF_REG5_OFFSET)
-#define INF_REG6	(ELFIN_CLOCK_POWER_BASE + INF_REG6_OFFSET)
-#define INF_REG7	(ELFIN_CLOCK_POWER_BASE + INF_REG7_OFFSET)
-
-
-/*
- * GPIO
- */
-#define ELFIN_GPIO_BASE		0x7f008000
-
-#define GPACON_OFFSET		0x00
-#define GPADAT_OFFSET		0x04
-#define GPAPUD_OFFSET		0x08
-#define GPACONSLP_OFFSET	0x0C
-#define GPAPUDSLP_OFFSET	0x10
-#define GPBCON_OFFSET		0x20
-#define GPBDAT_OFFSET		0x24
-#define GPBPUD_OFFSET		0x28
-#define GPBCONSLP_OFFSET	0x2C
-#define GPBPUDSLP_OFFSET	0x30
-#define GPCCON_OFFSET		0x40
-#define GPCDAT_OFFSET		0x44
-#define GPCPUD_OFFSET		0x48
-#define GPCCONSLP_OFFSET	0x4C
-#define GPCPUDSLP_OFFSET	0x50
-#define GPDCON_OFFSET		0x60
-#define GPDDAT_OFFSET		0x64
-#define GPDPUD_OFFSET		0x68
-#define GPDCONSLP_OFFSET	0x6C
-#define GPDPUDSLP_OFFSET	0x70
-#define GPECON_OFFSET		0x80
-#define GPEDAT_OFFSET		0x84
-#define GPEPUD_OFFSET		0x88
-#define GPECONSLP_OFFSET	0x8C
-#define GPEPUDSLP_OFFSET	0x90
-#define GPFCON_OFFSET		0xA0
-#define GPFDAT_OFFSET		0xA4
-#define GPFPUD_OFFSET		0xA8
-#define GPFCONSLP_OFFSET	0xAC
-#define GPFPUDSLP_OFFSET	0xB0
-#define GPGCON_OFFSET		0xC0
-#define GPGDAT_OFFSET		0xC4
-#define GPGPUD_OFFSET		0xC8
-#define GPGCONSLP_OFFSET	0xCC
-#define GPGPUDSLP_OFFSET	0xD0
-#define GPHCON0_OFFSET		0xE0
-#define GPHCON1_OFFSET		0xE4
-#define GPHDAT_OFFSET		0xE8
-#define GPHPUD_OFFSET		0xEC
-#define GPHCONSLP_OFFSET	0xF0
-#define GPHPUDSLP_OFFSET	0xF4
-#define GPICON_OFFSET		0x100
-#define GPIDAT_OFFSET		0x104
-#define GPIPUD_OFFSET		0x108
-#define GPICONSLP_OFFSET	0x10C
-#define GPIPUDSLP_OFFSET	0x110
-#define GPJCON_OFFSET		0x120
-#define GPJDAT_OFFSET		0x124
-#define GPJPUD_OFFSET		0x128
-#define GPJCONSLP_OFFSET	0x12C
-#define GPJPUDSLP_OFFSET	0x130
-#define MEM0DRVCON_OFFSET	0x1D0
-#define MEM1DRVCON_OFFSET	0x1D4
-#define GPKCON0_OFFSET		0x800
-#define GPKCON1_OFFSET		0x804
-#define GPKDAT_OFFSET		0x808
-#define GPKPUD_OFFSET		0x80C
-#define GPLCON0_OFFSET		0x810
-#define GPLCON1_OFFSET		0x814
-#define GPLDAT_OFFSET		0x818
-#define GPLPUD_OFFSET		0x81C
-#define GPMCON_OFFSET		0x820
-#define GPMDAT_OFFSET		0x824
-#define GPMPUD_OFFSET		0x828
-#define GPNCON_OFFSET		0x830
-#define GPNDAT_OFFSET		0x834
-#define GPNPUD_OFFSET		0x838
-#define GPOCON_OFFSET		0x140
-#define GPODAT_OFFSET		0x144
-#define GPOPUD_OFFSET		0x148
-#define GPOCONSLP_OFFSET	0x14C
-#define GPOPUDSLP_OFFSET	0x150
-#define GPPCON_OFFSET		0x160
-#define GPPDAT_OFFSET		0x164
-#define GPPPUD_OFFSET		0x168
-#define GPPCONSLP_OFFSET	0x16C
-#define GPPPUDSLP_OFFSET	0x170
-#define GPQCON_OFFSET		0x180
-#define GPQDAT_OFFSET		0x184
-#define GPQPUD_OFFSET		0x188
-#define GPQCONSLP_OFFSET	0x18C
-#define GPQPUDSLP_OFFSET	0x190
-
-#define EINTPEND_OFFSET		0x924
-
-#define GPACON_REG		__REG(ELFIN_GPIO_BASE + GPACON_OFFSET)
-#define GPADAT_REG		__REG(ELFIN_GPIO_BASE + GPADAT_OFFSET)
-#define GPAPUD_REG		__REG(ELFIN_GPIO_BASE + GPAPUD_OFFSET)
-#define GPACONSLP_REG		__REG(ELFIN_GPIO_BASE + GPACONSLP_OFFSET)
-#define GPAPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPAPUDSLP_OFFSET)
-#define GPBCON_REG		__REG(ELFIN_GPIO_BASE + GPBCON_OFFSET)
-#define GPBDAT_REG		__REG(ELFIN_GPIO_BASE + GPBDAT_OFFSET)
-#define GPBPUD_REG		__REG(ELFIN_GPIO_BASE + GPBPUD_OFFSET)
-#define GPBCONSLP_REG		__REG(ELFIN_GPIO_BASE + GPBCONSLP_OFFSET)
-#define GPBPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPBPUDSLP_OFFSET)
-#define GPCCON_REG		__REG(ELFIN_GPIO_BASE + GPCCON_OFFSET)
-#define GPCDAT_REG		__REG(ELFIN_GPIO_BASE + GPCDAT_OFFSET)
-#define GPCPUD_REG		__REG(ELFIN_GPIO_BASE + GPCPUD_OFFSET)
-#define GPCCONSLP_REG		__REG(ELFIN_GPIO_BASE + GPCCONSLP_OFFSET)
-#define GPCPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPCPUDSLP_OFFSET)
-#define GPDCON_REG		__REG(ELFIN_GPIO_BASE + GPDCON_OFFSET)
-#define GPDDAT_REG		__REG(ELFIN_GPIO_BASE + GPDDAT_OFFSET)
-#define GPDPUD_REG		__REG(ELFIN_GPIO_BASE + GPDPUD_OFFSET)
-#define GPDCONSLP_REG		__REG(ELFIN_GPIO_BASE + GPDCONSLP_OFFSET)
-#define GPDPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPDPUDSLP_OFFSET)
-#define GPECON_REG		__REG(ELFIN_GPIO_BASE + GPECON_OFFSET)
-#define GPEDAT_REG		__REG(ELFIN_GPIO_BASE + GPEDAT_OFFSET)
-#define GPEPUD_REG		__REG(ELFIN_GPIO_BASE + GPEPUD_OFFSET)
-#define GPECONSLP_REG		__REG(ELFIN_GPIO_BASE + GPECONSLP_OFFSET)
-#define GPEPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPEPUDSLP_OFFSET)
-#define GPFCON_REG		__REG(ELFIN_GPIO_BASE + GPFCON_OFFSET)
-#define GPFDAT_REG		__REG(ELFIN_GPIO_BASE + GPFDAT_OFFSET)
-#define GPFPUD_REG		__REG(ELFIN_GPIO_BASE + GPFPUD_OFFSET)
-#define GPFCONSLP_REG		__REG(ELFIN_GPIO_BASE + GPFCONSLP_OFFSET)
-#define GPFPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPFPUDSLP_OFFSET)
-#define GPGCON_REG		__REG(ELFIN_GPIO_BASE + GPGCON_OFFSET)
-#define GPGDAT_REG		__REG(ELFIN_GPIO_BASE + GPGDAT_OFFSET)
-#define GPGPUD_REG		__REG(ELFIN_GPIO_BASE + GPGPUD_OFFSET)
-#define GPGCONSLP_REG		__REG(ELFIN_GPIO_BASE + GPGCONSLP_OFFSET)
-#define GPGPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPGPUDSLP_OFFSET)
-#define GPHCON0_REG		__REG(ELFIN_GPIO_BASE + GPHCON0_OFFSET)
-#define GPHCON1_REG		__REG(ELFIN_GPIO_BASE + GPHCON1_OFFSET)
-#define GPHDAT_REG		__REG(ELFIN_GPIO_BASE + GPHDAT_OFFSET)
-#define GPHPUD_REG		__REG(ELFIN_GPIO_BASE + GPHPUD_OFFSET)
-#define GPHCONSLP_REG		__REG(ELFIN_GPIO_BASE + GPHCONSLP_OFFSET)
-#define GPHPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPHPUDSLP_OFFSET)
-#define GPICON_REG		__REG(ELFIN_GPIO_BASE + GPICON_OFFSET)
-#define GPIDAT_REG		__REG(ELFIN_GPIO_BASE + GPIDAT_OFFSET)
-#define GPIPUD_REG		__REG(ELFIN_GPIO_BASE + GPIPUD_OFFSET)
-#define GPICONSLP_REG		__REG(ELFIN_GPIO_BASE + GPICONSLP_OFFSET)
-#define GPIPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPIPUDSLP_OFFSET)
-#define GPJCON_REG		__REG(ELFIN_GPIO_BASE + GPJCON_OFFSET)
-#define GPJDAT_REG		__REG(ELFIN_GPIO_BASE + GPJDAT_OFFSET)
-#define GPJPUD_REG		__REG(ELFIN_GPIO_BASE + GPJPUD_OFFSET)
-#define GPJCONSLP_REG		__REG(ELFIN_GPIO_BASE + GPJCONSLP_OFFSET)
-#define GPJPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPJPUDSLP_OFFSET)
-#define GPKCON0_REG		__REG(ELFIN_GPIO_BASE + GPKCON0_OFFSET)
-#define GPKCON1_REG		__REG(ELFIN_GPIO_BASE + GPKCON1_OFFSET)
-#define GPKDAT_REG		__REG(ELFIN_GPIO_BASE + GPKDAT_OFFSET)
-#define GPKPUD_REG		__REG(ELFIN_GPIO_BASE + GPKPUD_OFFSET)
-#define GPLCON0_REG		__REG(ELFIN_GPIO_BASE + GPLCON0_OFFSET)
-#define GPLCON1_REG		__REG(ELFIN_GPIO_BASE + GPLCON1_OFFSET)
-#define GPLDAT_REG		__REG(ELFIN_GPIO_BASE + GPLDAT_OFFSET)
-#define GPLPUD_REG		__REG(ELFIN_GPIO_BASE + GPLPUD_OFFSET)
-#define GPMCON_REG		__REG(ELFIN_GPIO_BASE + GPMCON_OFFSET)
-#define GPMDAT_REG		__REG(ELFIN_GPIO_BASE + GPMDAT_OFFSET)
-#define GPMPUD_REG		__REG(ELFIN_GPIO_BASE + GPMPUD_OFFSET)
-#define GPNCON_REG		__REG(ELFIN_GPIO_BASE + GPNCON_OFFSET)
-#define GPNDAT_REG		__REG(ELFIN_GPIO_BASE + GPNDAT_OFFSET)
-#define GPNPUD_REG		__REG(ELFIN_GPIO_BASE + GPNPUD_OFFSET)
-#define GPOCON_REG		__REG(ELFIN_GPIO_BASE + GPOCON_OFFSET)
-#define GPODAT_REG		__REG(ELFIN_GPIO_BASE + GPODAT_OFFSET)
-#define GPOPUD_REG		__REG(ELFIN_GPIO_BASE + GPOPUD_OFFSET)
-#define GPOCONSLP_REG		__REG(ELFIN_GPIO_BASE + GPOCONSLP_OFFSET)
-#define GPOPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPOPUDSLP_OFFSET)
-#define GPPCON_REG		__REG(ELFIN_GPIO_BASE + GPPCON_OFFSET)
-#define GPPDAT_REG		__REG(ELFIN_GPIO_BASE + GPPDAT_OFFSET)
-#define GPPPUD_REG		__REG(ELFIN_GPIO_BASE + GPPPUD_OFFSET)
-#define GPPCONSLP_REG		__REG(ELFIN_GPIO_BASE + GPPCONSLP_OFFSET)
-#define GPPPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPPPUDSLP_OFFSET)
-#define GPQCON_REG		__REG(ELFIN_GPIO_BASE + GPQCON_OFFSET)
-#define GPQDAT_REG		__REG(ELFIN_GPIO_BASE + GPQDAT_OFFSET)
-#define GPQPUD_REG		__REG(ELFIN_GPIO_BASE + GPQPUD_OFFSET)
-#define GPQCONSLP_REG		__REG(ELFIN_GPIO_BASE + GPQCONSLP_OFFSET)
-#define GPQPUDSLP_REG		__REG(ELFIN_GPIO_BASE + GPQPUDSLP_OFFSET)
-
-/*
- * Bus Matrix
- */
-#define ELFIN_MEM_SYS_CFG	0x7e00f120
-
-#define S3C64XX_MEM_SYS_CFG_16BIT	(1 << 12)
-
-#define S3C64XX_MEM_SYS_CFG_NAND	0x0008
-#define S3C64XX_MEM_SYS_CFG_ONENAND	S3C64XX_MEM_SYS_CFG_16BIT
-
-#define GPACON		(ELFIN_GPIO_BASE + GPACON_OFFSET)
-#define GPADAT		(ELFIN_GPIO_BASE + GPADAT_OFFSET)
-#define GPAPUD		(ELFIN_GPIO_BASE + GPAPUD_OFFSET)
-#define GPACONSLP	(ELFIN_GPIO_BASE + GPACONSLP_OFFSET)
-#define GPAPUDSLP	(ELFIN_GPIO_BASE + GPAPUDSLP_OFFSET)
-#define GPBCON		(ELFIN_GPIO_BASE + GPBCON_OFFSET)
-#define GPBDAT		(ELFIN_GPIO_BASE + GPBDAT_OFFSET)
-#define GPBPUD		(ELFIN_GPIO_BASE + GPBPUD_OFFSET)
-#define GPBCONSLP	(ELFIN_GPIO_BASE + GPBCONSLP_OFFSET)
-#define GPBPUDSLP	(ELFIN_GPIO_BASE + GPBPUDSLP_OFFSET)
-#define GPCCON		(ELFIN_GPIO_BASE + GPCCON_OFFSET)
-#define GPCDAT		(ELFIN_GPIO_BASE + GPCDAT_OFFSET)
-#define GPCPUD		(ELFIN_GPIO_BASE + GPCPUD_OFFSET)
-#define GPCCONSLP	(ELFIN_GPIO_BASE + GPCCONSLP_OFFSET)
-#define GPCPUDSLP	(ELFIN_GPIO_BASE + GPCPUDSLP_OFFSET)
-#define GPDCON		(ELFIN_GPIO_BASE + GPDCON_OFFSET)
-#define GPDDAT		(ELFIN_GPIO_BASE + GPDDAT_OFFSET)
-#define GPDPUD		(ELFIN_GPIO_BASE + GPDPUD_OFFSET)
-#define GPDCONSLP	(ELFIN_GPIO_BASE + GPDCONSLP_OFFSET)
-#define GPDPUDSLP	(ELFIN_GPIO_BASE + GPDPUDSLP_OFFSET)
-#define GPECON		(ELFIN_GPIO_BASE + GPECON_OFFSET)
-#define GPEDAT		(ELFIN_GPIO_BASE + GPEDAT_OFFSET)
-#define GPEPUD		(ELFIN_GPIO_BASE + GPEPUD_OFFSET)
-#define GPECONSLP	(ELFIN_GPIO_BASE + GPECONSLP_OFFSET)
-#define GPEPUDSLP	(ELFIN_GPIO_BASE + GPEPUDSLP_OFFSET)
-#define GPFCON		(ELFIN_GPIO_BASE + GPFCON_OFFSET)
-#define GPFDAT		(ELFIN_GPIO_BASE + GPFDAT_OFFSET)
-#define GPFPUD		(ELFIN_GPIO_BASE + GPFPUD_OFFSET)
-#define GPFCONSLP	(ELFIN_GPIO_BASE + GPFCONSLP_OFFSET)
-#define GPFPUDSLP	(ELFIN_GPIO_BASE + GPFPUDSLP_OFFSET)
-#define GPGCON		(ELFIN_GPIO_BASE + GPGCON_OFFSET)
-#define GPGDAT		(ELFIN_GPIO_BASE + GPGDAT_OFFSET)
-#define GPGPUD		(ELFIN_GPIO_BASE + GPGPUD_OFFSET)
-#define GPGCONSLP	(ELFIN_GPIO_BASE + GPGCONSLP_OFFSET)
-#define GPGPUDSLP	(ELFIN_GPIO_BASE + GPGPUDSLP_OFFSET)
-#define GPHCON0		(ELFIN_GPIO_BASE + GPHCON0_OFFSET)
-#define GPHCON1		(ELFIN_GPIO_BASE + GPHCON1_OFFSET)
-#define GPHDAT		(ELFIN_GPIO_BASE + GPHDAT_OFFSET)
-#define GPHPUD		(ELFIN_GPIO_BASE + GPHPUD_OFFSET)
-#define GPHCONSLP	(ELFIN_GPIO_BASE + GPHCONSLP_OFFSET)
-#define GPHPUDSLP	(ELFIN_GPIO_BASE + GPHPUDSLP_OFFSET)
-#define GPICON		(ELFIN_GPIO_BASE + GPICON_OFFSET)
-#define GPIDAT		(ELFIN_GPIO_BASE + GPIDAT_OFFSET)
-#define GPIPUD		(ELFIN_GPIO_BASE + GPIPUD_OFFSET)
-#define GPICONSLP	(ELFIN_GPIO_BASE + GPICONSLP_OFFSET)
-#define GPIPUDSLP	(ELFIN_GPIO_BASE + GPIPUDSLP_OFFSET)
-#define GPJCON		(ELFIN_GPIO_BASE + GPJCON_OFFSET)
-#define GPJDAT		(ELFIN_GPIO_BASE + GPJDAT_OFFSET)
-#define GPJPUD		(ELFIN_GPIO_BASE + GPJPUD_OFFSET)
-#define GPJCONSLP	(ELFIN_GPIO_BASE + GPJCONSLP_OFFSET)
-#define GPJPUDSLP	(ELFIN_GPIO_BASE + GPJPUDSLP_OFFSET)
-#define GPKCON0		(ELFIN_GPIO_BASE + GPKCON0_OFFSET)
-#define GPKCON1		(ELFIN_GPIO_BASE + GPKCON1_OFFSET)
-#define GPKDAT		(ELFIN_GPIO_BASE + GPKDAT_OFFSET)
-#define GPKPUD		(ELFIN_GPIO_BASE + GPKPUD_OFFSET)
-#define GPLCON0		(ELFIN_GPIO_BASE + GPLCON0_OFFSET)
-#define GPLCON1		(ELFIN_GPIO_BASE + GPLCON1_OFFSET)
-#define GPLDAT		(ELFIN_GPIO_BASE + GPLDAT_OFFSET)
-#define GPLPUD		(ELFIN_GPIO_BASE + GPLPUD_OFFSET)
-#define GPMCON		(ELFIN_GPIO_BASE + GPMCON_OFFSET)
-#define GPMDAT		(ELFIN_GPIO_BASE + GPMDAT_OFFSET)
-#define GPMPUD		(ELFIN_GPIO_BASE + GPMPUD_OFFSET)
-#define GPNCON		(ELFIN_GPIO_BASE + GPNCON_OFFSET)
-#define GPNDAT		(ELFIN_GPIO_BASE + GPNDAT_OFFSET)
-#define GPNPUD		(ELFIN_GPIO_BASE + GPNPUD_OFFSET)
-#define GPOCON		(ELFIN_GPIO_BASE + GPOCON_OFFSET)
-#define GPODAT		(ELFIN_GPIO_BASE + GPODAT_OFFSET)
-#define GPOPUD		(ELFIN_GPIO_BASE + GPOPUD_OFFSET)
-#define GPOCONSLP	(ELFIN_GPIO_BASE + GPOCONSLP_OFFSET)
-#define GPOPUDSLP	(ELFIN_GPIO_BASE + GPOPUDSLP_OFFSET)
-#define GPPCON		(ELFIN_GPIO_BASE + GPPCON_OFFSET)
-#define GPPDAT		(ELFIN_GPIO_BASE + GPPDAT_OFFSET)
-#define GPPPUD		(ELFIN_GPIO_BASE + GPPPUD_OFFSET)
-#define GPPCONSLP	(ELFIN_GPIO_BASE + GPPCONSLP_OFFSET)
-#define GPPPUDSLP	(ELFIN_GPIO_BASE + GPPPUDSLP_OFFSET)
-#define GPQCON		(ELFIN_GPIO_BASE + GPQCON_OFFSET)
-#define GPQDAT		(ELFIN_GPIO_BASE + GPQDAT_OFFSET)
-#define GPQPUD		(ELFIN_GPIO_BASE + GPQPUD_OFFSET)
-#define GPQCONSLP	(ELFIN_GPIO_BASE + GPQCONSLP_OFFSET)
-#define GPQPUDSLP	(ELFIN_GPIO_BASE + GPQPUDSLP_OFFSET)
-
-/*
- * Memory controller
- */
-#define ELFIN_SROM_BASE		0x70000000
-
-#define SROM_BW_REG	__REG(ELFIN_SROM_BASE + 0x0)
-#define SROM_BC0_REG	__REG(ELFIN_SROM_BASE + 0x4)
-#define SROM_BC1_REG	__REG(ELFIN_SROM_BASE + 0x8)
-#define SROM_BC2_REG	__REG(ELFIN_SROM_BASE + 0xC)
-#define SROM_BC3_REG	__REG(ELFIN_SROM_BASE + 0x10)
-#define SROM_BC4_REG	__REG(ELFIN_SROM_BASE + 0x14)
-#define SROM_BC5_REG	__REG(ELFIN_SROM_BASE + 0x18)
-
-/*
- * SDRAM Controller
- */
-#define ELFIN_DMC0_BASE		0x7e000000
-#define ELFIN_DMC1_BASE		0x7e001000
-
-#define INDEX_DMC_MEMC_STATUS	0x00
-#define INDEX_DMC_MEMC_CMD	0x04
-#define INDEX_DMC_DIRECT_CMD	0x08
-#define INDEX_DMC_MEMORY_CFG	0x0C
-#define INDEX_DMC_REFRESH_PRD	0x10
-#define INDEX_DMC_CAS_LATENCY	0x14
-#define INDEX_DMC_T_DQSS	0x18
-#define INDEX_DMC_T_MRD		0x1C
-#define INDEX_DMC_T_RAS		0x20
-#define INDEX_DMC_T_RC		0x24
-#define INDEX_DMC_T_RCD		0x28
-#define INDEX_DMC_T_RFC		0x2C
-#define INDEX_DMC_T_RP		0x30
-#define INDEX_DMC_T_RRD		0x34
-#define INDEX_DMC_T_WR		0x38
-#define INDEX_DMC_T_WTR		0x3C
-#define INDEX_DMC_T_XP		0x40
-#define INDEX_DMC_T_XSR		0x44
-#define INDEX_DMC_T_ESR		0x48
-#define INDEX_DMC_MEMORY_CFG2	0x4C
-#define INDEX_DMC_CHIP_0_CFG	0x200
-#define INDEX_DMC_CHIP_1_CFG	0x204
-#define INDEX_DMC_CHIP_2_CFG	0x208
-#define INDEX_DMC_CHIP_3_CFG	0x20C
-#define INDEX_DMC_USER_STATUS	0x300
-#define INDEX_DMC_USER_CONFIG	0x304
-
-/*
- * Memory Chip direct command
- */
-#define DMC_NOP0	0x0c0000
-#define DMC_NOP1	0x1c0000
-#define DMC_PA0		0x000000	/* Precharge all */
-#define DMC_PA1		0x100000
-#define DMC_AR0		0x040000	/* Autorefresh */
-#define DMC_AR1		0x140000
-#define DMC_SDR_MR0	0x080032	/* MRS, CAS 3,  Burst Length 4 */
-#define DMC_SDR_MR1	0x180032
-#define DMC_DDR_MR0	0x080162
-#define DMC_DDR_MR1	0x180162
-#define DMC_mDDR_MR0	0x080032	/* CAS 3, Burst Length 4 */
-#define DMC_mDDR_MR1	0x180032
-#define DMC_mSDR_EMR0	0x0a0000	/* EMRS, DS:Full, PASR:Full Array */
-#define DMC_mSDR_EMR1	0x1a0000
-#define DMC_DDR_EMR0	0x090000
-#define DMC_DDR_EMR1	0x190000
-#define DMC_mDDR_EMR0	0x0a0000	/*  DS:Full, PASR:Full Array */
-#define DMC_mDDR_EMR1	0x1a0000
-
-/*
- * Definitions for memory configuration
- * Set memory configuration
- *	active_chips	= 1'b0 (1 chip)
- *	qos_master_chip	= 3'b000(ARID[3:0])
- *	memory burst	= 3'b010(burst 4)
- *	stop_mem_clock	= 1'b0(disable dynamical stop)
- *	auto_power_down	= 1'b0(disable auto power-down mode)
- *	power_down_prd	= 6'b00_0000(0 cycle for auto power-down)
- *	ap_bit		= 1'b0 (bit position of auto-precharge is 10)
- *	row_bits	= 3'b010(# row address 13)
- *	column_bits	= 3'b010(# column address 10 )
- *
- * Set user configuration
- *	2'b10=SDRAM/mSDRAM, 2'b11=DDR, 2'b01=mDDR
- *
- * Set chip select for chip [n]
- *	 row bank control, bank address 0x3000_0000 ~ 0x37ff_ffff
- *	 CHIP_[n]_CFG=0x30F8,  30: ADDR[31:24], F8: Mask[31:24]
- */
-
-/*
- * Nand flash controller
- */
-#define ELFIN_NAND_BASE		0x70200000
-
-#define NFCONF_OFFSET		0x00
-#define NFCONT_OFFSET		0x04
-#define NFCMMD_OFFSET		0x08
-#define NFADDR_OFFSET		0x0c
-#define NFDATA_OFFSET		0x10
-#define NFMECCDATA0_OFFSET	0x14
-#define NFMECCDATA1_OFFSET	0x18
-#define NFSECCDATA0_OFFSET	0x1c
-#define NFSBLK_OFFSET		0x20
-#define NFEBLK_OFFSET		0x24
-#define NFSTAT_OFFSET		0x28
-#define NFESTAT0_OFFSET		0x2c
-#define NFESTAT1_OFFSET		0x30
-#define NFMECC0_OFFSET		0x34
-#define NFMECC1_OFFSET		0x38
-#define NFSECC_OFFSET		0x3c
-#define NFMLCBITPT_OFFSET	0x40
-
-#define NFCONF			(ELFIN_NAND_BASE + NFCONF_OFFSET)
-#define NFCONT			(ELFIN_NAND_BASE + NFCONT_OFFSET)
-#define NFCMMD			(ELFIN_NAND_BASE + NFCMMD_OFFSET)
-#define NFADDR			(ELFIN_NAND_BASE + NFADDR_OFFSET)
-#define NFDATA			(ELFIN_NAND_BASE + NFDATA_OFFSET)
-#define NFMECCDATA0		(ELFIN_NAND_BASE + NFMECCDATA0_OFFSET)
-#define NFMECCDATA1		(ELFIN_NAND_BASE + NFMECCDATA1_OFFSET)
-#define NFSECCDATA0		(ELFIN_NAND_BASE + NFSECCDATA0_OFFSET)
-#define NFSBLK			(ELFIN_NAND_BASE + NFSBLK_OFFSET)
-#define NFEBLK			(ELFIN_NAND_BASE + NFEBLK_OFFSET)
-#define NFSTAT			(ELFIN_NAND_BASE + NFSTAT_OFFSET)
-#define NFESTAT0		(ELFIN_NAND_BASE + NFESTAT0_OFFSET)
-#define NFESTAT1		(ELFIN_NAND_BASE + NFESTAT1_OFFSET)
-#define NFMECC0			(ELFIN_NAND_BASE + NFMECC0_OFFSET)
-#define NFMECC1			(ELFIN_NAND_BASE + NFMECC1_OFFSET)
-#define NFSECC			(ELFIN_NAND_BASE + NFSECC_OFFSET)
-#define NFMLCBITPT		(ELFIN_NAND_BASE + NFMLCBITPT_OFFSET)
-
-#define NFCONF_REG		__REG(ELFIN_NAND_BASE + NFCONF_OFFSET)
-#define NFCONT_REG		__REG(ELFIN_NAND_BASE + NFCONT_OFFSET)
-#define NFCMD_REG		__REG(ELFIN_NAND_BASE + NFCMMD_OFFSET)
-#define NFADDR_REG		__REG(ELFIN_NAND_BASE + NFADDR_OFFSET)
-#define NFDATA_REG		__REG(ELFIN_NAND_BASE + NFDATA_OFFSET)
-#define NFDATA8_REG		__REGb(ELFIN_NAND_BASE + NFDATA_OFFSET)
-#define NFMECCDATA0_REG		__REG(ELFIN_NAND_BASE + NFMECCDATA0_OFFSET)
-#define NFMECCDATA1_REG		__REG(ELFIN_NAND_BASE + NFMECCDATA1_OFFSET)
-#define NFSECCDATA0_REG		__REG(ELFIN_NAND_BASE + NFSECCDATA0_OFFSET)
-#define NFSBLK_REG		__REG(ELFIN_NAND_BASE + NFSBLK_OFFSET)
-#define NFEBLK_REG		__REG(ELFIN_NAND_BASE + NFEBLK_OFFSET)
-#define NFSTAT_REG		__REG(ELFIN_NAND_BASE + NFSTAT_OFFSET)
-#define NFESTAT0_REG		__REG(ELFIN_NAND_BASE + NFESTAT0_OFFSET)
-#define NFESTAT1_REG		__REG(ELFIN_NAND_BASE + NFESTAT1_OFFSET)
-#define NFMECC0_REG		__REG(ELFIN_NAND_BASE + NFMECC0_OFFSET)
-#define NFMECC1_REG		__REG(ELFIN_NAND_BASE + NFMECC1_OFFSET)
-#define NFSECC_REG		__REG(ELFIN_NAND_BASE + NFSECC_OFFSET)
-#define NFMLCBITPT_REG		__REG(ELFIN_NAND_BASE + NFMLCBITPT_OFFSET)
-
-#define NFCONF_ECC_4BIT		(1<<24)
-
-#define NFCONT_ECC_ENC		(1<<18)
-#define NFCONT_WP		(1<<16)
-#define NFCONT_MECCLOCK		(1<<7)
-#define NFCONT_SECCLOCK		(1<<6)
-#define NFCONT_INITMECC		(1<<5)
-#define NFCONT_INITSECC		(1<<4)
-#define NFCONT_INITECC		(NFCONT_INITMECC | NFCONT_INITSECC)
-#define NFCONT_CS_ALT		(1<<2)
-#define NFCONT_CS		(1<<1)
-#define NFCONT_ENABLE		(1<<0)
-
-#define NFSTAT_ECCENCDONE	(1<<7)
-#define NFSTAT_ECCDECDONE	(1<<6)
-#define NFSTAT_RnB		(1<<0)
-
-#define NFESTAT0_ECCBUSY	(1<<31)
-
-/*
- * Interrupt
- */
-#define ELFIN_VIC0_BASE_ADDR	0x71200000
-#define ELFIN_VIC1_BASE_ADDR	0x71300000
-#define oINTMOD			0x0C	/* VIC INT SELECT (IRQ or FIQ) */
-#define oINTUNMSK		0x10	/* VIC INT EN (write 1 to unmask) */
-#define oINTMSK			0x14	/* VIC INT EN CLEAR (write 1 to mask) */
-#define oINTSUBMSK		0x1C	/* VIC SOFT INT CLEAR */
-#define oVECTADDR		0xF00 /* VIC ADDRESS */
-
-/*
- * Watchdog timer
- */
-#define ELFIN_WATCHDOG_BASE	0x7E004000
-
-#define WTCON_REG		__REG(0x7E004004)
-#define WTDAT_REG		__REG(0x7E004008)
-#define WTCNT_REG		__REG(0x7E00400C)
-
-
-/*
- * UART
- */
-#define ELFIN_UART_BASE		0x7F005000
-
-#define ELFIN_UART0_OFFSET	0x0000
-#define ELFIN_UART1_OFFSET	0x0400
-#define ELFIN_UART2_OFFSET	0x0800
-
-#define ULCON_OFFSET		0x00
-#define UCON_OFFSET		0x04
-#define UFCON_OFFSET		0x08
-#define UMCON_OFFSET		0x0C
-#define UTRSTAT_OFFSET		0x10
-#define UERSTAT_OFFSET		0x14
-#define UFSTAT_OFFSET		0x18
-#define UMSTAT_OFFSET		0x1C
-#define UTXH_OFFSET		0x20
-#define URXH_OFFSET		0x24
-#define UBRDIV_OFFSET		0x28
-#define UDIVSLOT_OFFSET		0x2C
-#define UINTP_OFFSET		0x30
-#define UINTSP_OFFSET		0x34
-#define UINTM_OFFSET		0x38
-
-#define ULCON0_REG		__REG(0x7F005000)
-#define UCON0_REG		__REG(0x7F005004)
-#define UFCON0_REG		__REG(0x7F005008)
-#define UMCON0_REG		__REG(0x7F00500C)
-#define UTRSTAT0_REG		__REG(0x7F005010)
-#define UERSTAT0_REG		__REG(0x7F005014)
-#define UFSTAT0_REG		__REG(0x7F005018)
-#define UMSTAT0_REG		__REG(0x7F00501c)
-#define UTXH0_REG		__REG(0x7F005020)
-#define URXH0_REG		__REG(0x7F005024)
-#define UBRDIV0_REG		__REG(0x7F005028)
-#define UDIVSLOT0_REG		__REG(0x7F00502c)
-#define UINTP0_REG		__REG(0x7F005030)
-#define UINTSP0_REG		__REG(0x7F005034)
-#define UINTM0_REG		__REG(0x7F005038)
-
-#define ULCON1_REG		__REG(0x7F005400)
-#define UCON1_REG		__REG(0x7F005404)
-#define UFCON1_REG		__REG(0x7F005408)
-#define UMCON1_REG		__REG(0x7F00540C)
-#define UTRSTAT1_REG		__REG(0x7F005410)
-#define UERSTAT1_REG		__REG(0x7F005414)
-#define UFSTAT1_REG		__REG(0x7F005418)
-#define UMSTAT1_REG		__REG(0x7F00541c)
-#define UTXH1_REG		__REG(0x7F005420)
-#define URXH1_REG		__REG(0x7F005424)
-#define UBRDIV1_REG		__REG(0x7F005428)
-#define UDIVSLOT1_REG		__REG(0x7F00542c)
-#define UINTP1_REG		__REG(0x7F005430)
-#define UINTSP1_REG		__REG(0x7F005434)
-#define UINTM1_REG		__REG(0x7F005438)
-
-#define UTRSTAT_TX_EMPTY	(1 << 2)
-#define UTRSTAT_RX_READY	(1 << 0)
-#define UART_ERR_MASK		0xF
-
-/*
- * PWM timer
- */
-#define ELFIN_TIMER_BASE	0x7F006000
-
-#define TCFG0_REG	__REG(0x7F006000)
-#define TCFG1_REG	__REG(0x7F006004)
-#define TCON_REG	__REG(0x7F006008)
-#define TCNTB0_REG	__REG(0x7F00600c)
-#define TCMPB0_REG	__REG(0x7F006010)
-#define TCNTO0_REG	__REG(0x7F006014)
-#define TCNTB1_REG	__REG(0x7F006018)
-#define TCMPB1_REG	__REG(0x7F00601c)
-#define TCNTO1_REG	__REG(0x7F006020)
-#define TCNTB2_REG	__REG(0x7F006024)
-#define TCMPB2_REG	__REG(0x7F006028)
-#define TCNTO2_REG	__REG(0x7F00602c)
-#define TCNTB3_REG	__REG(0x7F006030)
-#define TCMPB3_REG	__REG(0x7F006034)
-#define TCNTO3_REG	__REG(0x7F006038)
-#define TCNTB4_REG	__REG(0x7F00603c)
-#define TCNTO4_REG	__REG(0x7F006040)
-
-/* Fields */
-#define fTCFG0_DZONE		Fld(8, 16) /* the dead zone length (=timer 0) */
-#define fTCFG0_PRE1		Fld(8, 8)  /* prescaler value for time 2,3,4 */
-#define fTCFG0_PRE0		Fld(8, 0)  /* prescaler value for time 0,1 */
-#define fTCFG1_MUX4		Fld(4, 16)
-/* bits */
-#define TCFG0_DZONE(x)		FInsrt((x), fTCFG0_DZONE)
-#define TCFG0_PRE1(x)		FInsrt((x), fTCFG0_PRE1)
-#define TCFG0_PRE0(x)		FInsrt((x), fTCFG0_PRE0)
-#define TCON_4_AUTO		(1 << 22)  /* auto reload on/off for Timer 4 */
-#define TCON_4_UPDATE		(1 << 21)  /* manual Update TCNTB4 */
-#define TCON_4_ONOFF		(1 << 20)  /* 0: Stop, 1: start Timer 4 */
-#define COUNT_4_ON		(TCON_4_ONOFF * 1)
-#define COUNT_4_OFF		(TCON_4_ONOFF * 0)
-#define TCON_3_AUTO		(1 << 19)  /* auto reload on/off for Timer 3 */
-#define TIMER3_ATLOAD_ON	(TCON_3_AUTO * 1)
-#define TIMER3_ATLAOD_OFF	FClrBit(TCON, TCON_3_AUTO)
-#define TCON_3_INVERT		(1 << 18)  /* 1: Inverter on for TOUT3 */
-#define TIMER3_IVT_ON		(TCON_3_INVERT * 1)
-#define TIMER3_IVT_OFF		(FClrBit(TCON, TCON_3_INVERT))
-#define TCON_3_MAN		(1 << 17)  /* manual Update TCNTB3,TCMPB3 */
-#define TIMER3_MANUP		(TCON_3_MAN*1)
-#define TIMER3_NOP		(FClrBit(TCON, TCON_3_MAN))
-#define TCON_3_ONOFF		(1 << 16)  /* 0: Stop, 1: start Timer 3 */
-#define TIMER3_ON		(TCON_3_ONOFF * 1)
-#define TIMER3_OFF		(FClrBit(TCON, TCON_3_ONOFF))
-
-#if defined(CONFIG_CLK_400_100_50)
-#define STARTUP_AMDIV		400
-#define STARTUP_MDIV		400
-#define STARTUP_PDIV		6
-#define STARTUP_SDIV		1
-#elif defined(CONFIG_CLK_400_133_66)
-#define STARTUP_AMDIV		400
-#define STARTUP_MDIV		533
-#define STARTUP_PDIV		6
-#define STARTUP_SDIV		1
-#elif defined(CONFIG_CLK_533_133_66)
-#define STARTUP_AMDIV		533
-#define STARTUP_MDIV		533
-#define STARTUP_PDIV		6
-#define STARTUP_SDIV		1
-#elif defined(CONFIG_CLK_667_133_66)
-#define STARTUP_AMDIV		667
-#define STARTUP_MDIV		533
-#define STARTUP_PDIV		6
-#define STARTUP_SDIV		1
-#endif
-
-#define	STARTUP_PCLKDIV		3
-#define STARTUP_HCLKX2DIV	1
-#define STARTUP_HCLKDIV		1
-#define STARTUP_MPLLDIV		1
-#define STARTUP_APLLDIV		0
-
-#define CLK_DIV_VAL	((STARTUP_PCLKDIV << 12) | (STARTUP_HCLKX2DIV << 9) | \
-	(STARTUP_HCLKDIV << 8) | (STARTUP_MPLLDIV<<4) | STARTUP_APLLDIV)
-#define MPLL_VAL	((1 << 31) | (STARTUP_MDIV << 16) | \
-	(STARTUP_PDIV << 8) | STARTUP_SDIV)
-#define STARTUP_MPLL	(((CONFIG_SYS_CLK_FREQ >> STARTUP_SDIV) / \
-	STARTUP_PDIV) * STARTUP_MDIV)
-
-#if defined(CONFIG_SYNC_MODE)
-#define APLL_VAL	((1 << 31) | (STARTUP_MDIV << 16) | \
-	(STARTUP_PDIV << 8) | STARTUP_SDIV)
-#define STARTUP_APLL	(((CONFIG_SYS_CLK_FREQ >> STARTUP_SDIV) / \
-	STARTUP_PDIV) * STARTUP_MDIV)
-#define STARTUP_HCLK	(STARTUP_MPLL / (STARTUP_HCLKX2DIV + 1) / \
-	(STARTUP_HCLKDIV + 1))
-#else
-#define APLL_VAL	((1 << 31) | (STARTUP_AMDIV << 16) | \
-	(STARTUP_PDIV << 8) | STARTUP_SDIV)
-#define STARTUP_APLL	(((CONFIG_SYS_CLK_FREQ >> STARTUP_SDIV) / \
-	STARTUP_PDIV) * STARTUP_AMDIV)
-#define STARTUP_HCLK	(STARTUP_MPLL / (STARTUP_HCLKX2DIV + 1) / \
-	(STARTUP_HCLKDIV + 1))
-#endif
-
-
-/*-----------------------------------------------------------------------
- * Physical Memory Map
- */
-#define DMC1_MEM_CFG	0x00010012	/* burst 4, 13-bit row, 10-bit col */
-#define DMC1_MEM_CFG2	0xB45
-#define DMC1_CHIP0_CFG	0x150F8		/* 0x5000_0000~0x57ff_ffff (128 MiB) */
-#define DMC_DDR_32_CFG	0x0 		/* 32bit, DDR */
-
-/* Memory Parameters */
-/* DDR Parameters */
-#define DDR_tREFRESH		7800	/* ns */
-#define DDR_tRAS		45	/* ns (min: 45ns)*/
-#define DDR_tRC 		68	/* ns (min: 67.5ns)*/
-#define DDR_tRCD		23	/* ns (min: 22.5ns)*/
-#define DDR_tRFC		80	/* ns (min: 80ns)*/
-#define DDR_tRP 		23	/* ns (min: 22.5ns)*/
-#define DDR_tRRD		15	/* ns (min: 15ns)*/
-#define DDR_tWR 		15	/* ns (min: 15ns)*/
-#define DDR_tXSR		120	/* ns (min: 120ns)*/
-#define DDR_CASL		3	/* CAS Latency 3 */
-
-/*
- * mDDR memory configuration
- */
-
-#define NS_TO_CLK(t)		((STARTUP_HCLK / 1000 * (t) - 1) / 1000000)
-
-#define DMC_DDR_BA_EMRS 	2
-#define DMC_DDR_MEM_CASLAT	3
-/* 6   Set Cas Latency to 3 */
-#define DMC_DDR_CAS_LATENCY	(DDR_CASL << 1)
-/* Min 0.75 ~ 1.25 */
-#define DMC_DDR_t_DQSS		1
-/* Min 2 tck */
-#define DMC_DDR_t_MRD		2
-/* 7, Min 45ns */
-#define DMC_DDR_t_RAS		(NS_TO_CLK(DDR_tRAS) + 1)
-/* 10, Min 67.5ns */
-#define DMC_DDR_t_RC		(NS_TO_CLK(DDR_tRC) + 1)
-/* 4,5(TRM), Min 22.5ns */
-#define DMC_DDR_t_RCD		(NS_TO_CLK(DDR_tRCD) + 1)
-#define DMC_DDR_schedule_RCD	((DMC_DDR_t_RCD - 3) << 3)
-/* 11,18(TRM) Min 80ns */
-#define DMC_DDR_t_RFC		(NS_TO_CLK(DDR_tRFC) + 1)
-#define DMC_DDR_schedule_RFC	((DMC_DDR_t_RFC - 3) << 5)
-/* 4, 5(TRM) Min 22.5ns */
-#define DMC_DDR_t_RP		(NS_TO_CLK(DDR_tRP) + 1)
-#define DMC_DDR_schedule_RP	((DMC_DDR_t_RP - 3) << 3)
-/* 3, Min 15ns */
-#define DMC_DDR_t_RRD		(NS_TO_CLK(DDR_tRRD) + 1)
-/* Min 15ns */
-#define DMC_DDR_t_WR		(NS_TO_CLK(DDR_tWR) + 1)
-#define DMC_DDR_t_WTR		2
-/* 1tck + tIS(1.5ns) */
-#define DMC_DDR_t_XP		2
-/* 17, Min 120ns */
-#define DMC_DDR_t_XSR		(NS_TO_CLK(DDR_tXSR) + 1)
-#define DMC_DDR_t_ESR		DMC_DDR_t_XSR
-/* TRM 2656 */
-#define DMC_DDR_REFRESH_PRD	(NS_TO_CLK(DDR_tREFRESH))
-/* 2b01 : mDDR */
-#define DMC_DDR_USER_CONFIG	1
-
-#ifndef __ASSEMBLY__
-enum s3c64xx_uarts_nr {
-	S3C64XX_UART0,
-	S3C64XX_UART1,
-	S3C64XX_UART2,
-};
-
-#include "s3c64x0.h"
-
-static inline s3c64xx_uart *s3c64xx_get_base_uart(enum s3c64xx_uarts_nr nr)
-{
-	return (s3c64xx_uart *)(ELFIN_UART_BASE + (nr * 0x400));
-}
-#endif
-
-#endif /*__S3C6400_H__*/
diff --git a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h b/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
deleted file mode 100644
index 0bbf1d0..0000000
--- a/arch/arm/include/asm/arch-s3c64xx/s3c64x0.h
+++ /dev/null
@@ -1,90 +0,0 @@
-/*
- * (C) Copyright 2003
- * David M??ller ELSOFT AG Switzerland. d.mueller at elsoft.ch
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/************************************************
- * NAME	    : S3C64XX.h
- * Version  : 31.3.2003
- *
- * common stuff for SAMSUNG S3C64XX SoC
- ************************************************/
-
-#ifndef __S3C64XX_H__
-#define __S3C64XX_H__
-
-#if defined(CONFIG_SYNC_MODE) && defined(CONFIG_S3C6400)
-#error CONFIG_SYNC_MODE unavailable on S3C6400, please, fix your configuration!
-#endif
-
-#include <asm/types.h>
-
-/* UART (see manual chapter 11) */
-typedef struct {
-	volatile u32	ULCON;
-	volatile u32	UCON;
-	volatile u32	UFCON;
-	volatile u32	UMCON;
-	volatile u32	UTRSTAT;
-	volatile u32	UERSTAT;
-	volatile u32	UFSTAT;
-	volatile u32	UMSTAT;
-#ifdef __BIG_ENDIAN
-	volatile u8	res1[3];
-	volatile u8	UTXH;
-	volatile u8	res2[3];
-	volatile u8	URXH;
-#else /* Little Endian */
-	volatile u8	UTXH;
-	volatile u8	res1[3];
-	volatile u8	URXH;
-	volatile u8	res2[3];
-#endif
-	volatile u32	UBRDIV;
-#ifdef __BIG_ENDIAN
-	volatile u8	res3[2];
-	volatile u16	UDIVSLOT;
-#else
-	volatile u16	UDIVSLOT;
-	volatile u8	res3[2];
-#endif
-} s3c64xx_uart;
-
-/* PWM TIMER (see manual chapter 10) */
-typedef struct {
-	volatile u32	TCNTB;
-	volatile u32	TCMPB;
-	volatile u32	TCNTO;
-} s3c64xx_timer;
-
-typedef struct {
-	volatile u32	TCFG0;
-	volatile u32	TCFG1;
-	volatile u32	TCON;
-	s3c64xx_timer	ch[4];
-	volatile u32	TCNTB4;
-	volatile u32	TCNTO4;
-} s3c64xx_timers;
-
-#endif /*__S3C64XX_H__*/
diff --git a/doc/driver-model/UDM-serial.txt b/doc/driver-model/UDM-serial.txt
index ef71fea..1011c32 100644
--- a/doc/driver-model/UDM-serial.txt
+++ b/doc/driver-model/UDM-serial.txt
@@ -96,88 +96,84 @@ III) Analysis of in-tree drivers
   ------------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  10) s3c64xx.c
+  10) sandbox.c
   -------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  11) sandbox.c
-  -------------
-  No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
-
-  12) serial.c
+  11) serial.c
   ------------
   This is a complementary part of NS16550 UART driver, see above.
 
-  13) serial_clps7111.c
+  12) serial_clps7111.c
   ---------------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  14) serial_imx.c
+  13) serial_imx.c
   ----------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible. This driver
   might be removed in favor of serial_mxc.c .
 
-  15) serial_ixp.c
+  14) serial_ixp.c
   ----------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  16) serial_ks8695.c
+  15) serial_ks8695.c
   -------------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  17) serial_max3100.c
+  16) serial_max3100.c
   --------------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  18) serial_mxc.c
+  17) serial_mxc.c
   ----------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  19) serial_netarm.c
+  18) serial_netarm.c
   -------------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  20) serial_pl01x.c
+  19) serial_pl01x.c
   ------------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible, though this
   driver in fact contains two drivers in total.
 
-  21) serial_pxa.c
+  20) serial_pxa.c
   ----------------
   This driver is a bit complicated, but due to clean support for
   CONFIG_SERIAL_MULTI, there are no expected obstructions throughout the
   conversion process.
 
-  22) serial_s3c24x0.c
+  21) serial_s3c24x0.c
   --------------------
   This driver, being quite ad-hoc might need some work to bring back to shape.
 
-  23) serial_s3c44b0.c
+  22) serial_s3c44b0.c
   --------------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  24) serial_s5p.c
+  23) serial_s5p.c
   ----------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  25) serial_sa1100.c
+  24) serial_sa1100.c
   -------------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  26) serial_sh.c
+  25) serial_sh.c
   ---------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  27) serial_xuartlite.c
+  26) serial_xuartlite.c
   ----------------------
   No support for CONFIG_SERIAL_MULTI. Simple conversion possible.
 
-  28) usbtty.c
+  27) usbtty.c
   ------------
   This driver seems very complicated and entangled with USB framework. The
   conversion might be complicated here.
 
-  29) arch/powerpc/cpu/mpc512x/serial.c
+  28) arch/powerpc/cpu/mpc512x/serial.c
   -------------------------------------
   This driver supports CONFIG_SERIAL_MULTI. This driver will need to be moved to
   proper place.
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index bcb7161..35769c5 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -73,7 +73,6 @@ COBJS-$(CONFIG_NAND_MXS) += mxs_nand.o
 COBJS-$(CONFIG_NAND_NDFC) += ndfc.o
 COBJS-$(CONFIG_NAND_NOMADIK) += nomadik.o
 COBJS-$(CONFIG_NAND_S3C2410) += s3c2410_nand.o
-COBJS-$(CONFIG_NAND_S3C64XX) += s3c64xx.o
 COBJS-$(CONFIG_NAND_SPEAR) += spr_nand.o
 COBJS-$(CONFIG_TEGRA_NAND) += tegra_nand.o
 COBJS-$(CONFIG_NAND_OMAP_GPMC) += omap_gpmc.o
diff --git a/drivers/mtd/nand/s3c64xx.c b/drivers/mtd/nand/s3c64xx.c
deleted file mode 100644
index 87f0341..0000000
--- a/drivers/mtd/nand/s3c64xx.c
+++ /dev/null
@@ -1,295 +0,0 @@
-/*
- * (C) Copyright 2006 DENX Software Engineering
- *
- * Implementation for U-Boot 1.1.6 by Samsung
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#include <nand.h>
-#include <linux/mtd/nand.h>
-
-#include <asm/arch/s3c6400.h>
-
-#include <asm/io.h>
-#include <asm/errno.h>
-
-#define MAX_CHIPS	2
-static int nand_cs[MAX_CHIPS] = {0, 1};
-
-#ifdef CONFIG_NAND_SPL
-#define printf(arg...) do {} while (0)
-#endif
-
-/* Nand flash definition values by jsgood */
-#ifdef S3C_NAND_DEBUG
-/*
- * Function to print out oob buffer for debugging
- * Written by jsgood
- */
-static void print_oob(const char *header, struct mtd_info *mtd)
-{
-	int i;
-	struct nand_chip *chip = mtd->priv;
-
-	printf("%s:\t", header);
-
-	for (i = 0; i < 64; i++)
-		printf("%02x ", chip->oob_poi[i]);
-
-	printf("\n");
-}
-#endif /* S3C_NAND_DEBUG */
-
-static void s3c_nand_select_chip(struct mtd_info *mtd, int chip)
-{
-	int ctrl = readl(NFCONT);
-
-	switch (chip) {
-	case -1:
-		ctrl |= 6;
-		break;
-	case 0:
-		ctrl &= ~2;
-		break;
-	case 1:
-		ctrl &= ~4;
-		break;
-	default:
-		return;
-	}
-
-	writel(ctrl, NFCONT);
-}
-
-/*
- * Hardware specific access to control-lines function
- * Written by jsgood
- */
-static void s3c_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
-{
-	struct nand_chip *this = mtd->priv;
-
-	if (ctrl & NAND_CTRL_CHANGE) {
-		if (ctrl & NAND_CLE)
-			this->IO_ADDR_W = (void __iomem *)NFCMMD;
-		else if (ctrl & NAND_ALE)
-			this->IO_ADDR_W = (void __iomem *)NFADDR;
-		else
-			this->IO_ADDR_W = (void __iomem *)NFDATA;
-		if (ctrl & NAND_NCE)
-			s3c_nand_select_chip(mtd, *(int *)this->priv);
-		else
-			s3c_nand_select_chip(mtd, -1);
-	}
-
-	if (cmd != NAND_CMD_NONE)
-		writeb(cmd, this->IO_ADDR_W);
-}
-
-/*
- * Function for checking device ready pin
- * Written by jsgood
- */
-static int s3c_nand_device_ready(struct mtd_info *mtdinfo)
-{
-	return !!(readl(NFSTAT) & NFSTAT_RnB);
-}
-
-#ifdef CONFIG_SYS_S3C_NAND_HWECC
-/*
- * This function is called before encoding ecc codes to ready ecc engine.
- * Written by jsgood
- */
-static void s3c_nand_enable_hwecc(struct mtd_info *mtd, int mode)
-{
-	u_long nfcont, nfconf;
-
-	/*
-	 * The original driver used 4-bit ECC for "new" MLC chips, i.e., for
-	 * those with non-zero ID[3][3:2], which anyway only holds for ST
-	 * (Numonyx) chips
-	 */
-	nfconf = readl(NFCONF) & ~NFCONF_ECC_4BIT;
-
-	writel(nfconf, NFCONF);
-
-	/* Initialize & unlock */
-	nfcont = readl(NFCONT);
-	nfcont |= NFCONT_INITECC;
-	nfcont &= ~NFCONT_MECCLOCK;
-
-	if (mode == NAND_ECC_WRITE)
-		nfcont |= NFCONT_ECC_ENC;
-	else if (mode == NAND_ECC_READ)
-		nfcont &= ~NFCONT_ECC_ENC;
-
-	writel(nfcont, NFCONT);
-}
-
-/*
- * This function is called immediately after encoding ecc codes.
- * This function returns encoded ecc codes.
- * Written by jsgood
- */
-static int s3c_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
-				  u_char *ecc_code)
-{
-	u_long nfcont, nfmecc0;
-
-	/* Lock */
-	nfcont = readl(NFCONT);
-	nfcont |= NFCONT_MECCLOCK;
-	writel(nfcont, NFCONT);
-
-	nfmecc0 = readl(NFMECC0);
-
-	ecc_code[0] = nfmecc0 & 0xff;
-	ecc_code[1] = (nfmecc0 >> 8) & 0xff;
-	ecc_code[2] = (nfmecc0 >> 16) & 0xff;
-	ecc_code[3] = (nfmecc0 >> 24) & 0xff;
-
-	return 0;
-}
-
-/*
- * This function determines whether read data is good or not.
- * If SLC, must write ecc codes to controller before reading status bit.
- * If MLC, status bit is already set, so only reading is needed.
- * If status bit is good, return 0.
- * If correctable errors occured, do that.
- * If uncorrectable errors occured, return -1.
- * Written by jsgood
- */
-static int s3c_nand_correct_data(struct mtd_info *mtd, u_char *dat,
-				 u_char *read_ecc, u_char *calc_ecc)
-{
-	int ret = -1;
-	u_long nfestat0, nfmeccdata0, nfmeccdata1, err_byte_addr;
-	u_char err_type, repaired;
-
-	/* SLC: Write ecc to compare */
-	nfmeccdata0 = (calc_ecc[1] << 16) | calc_ecc[0];
-	nfmeccdata1 = (calc_ecc[3] << 16) | calc_ecc[2];
-	writel(nfmeccdata0, NFMECCDATA0);
-	writel(nfmeccdata1, NFMECCDATA1);
-
-	/* Read ecc status */
-	nfestat0 = readl(NFESTAT0);
-	err_type = nfestat0 & 0x3;
-
-	switch (err_type) {
-	case 0: /* No error */
-		ret = 0;
-		break;
-
-	case 1:
-		/*
-		 * 1 bit error (Correctable)
-		 * (nfestat0 >> 7) & 0x7ff	:error byte number
-		 * (nfestat0 >> 4) & 0x7	:error bit number
-		 */
-		err_byte_addr = (nfestat0 >> 7) & 0x7ff;
-		repaired = dat[err_byte_addr] ^ (1 << ((nfestat0 >> 4) & 0x7));
-
-		printf("S3C NAND: 1 bit error detected at byte %ld. "
-		       "Correcting from 0x%02x to 0x%02x...OK\n",
-		       err_byte_addr, dat[err_byte_addr], repaired);
-
-		dat[err_byte_addr] = repaired;
-
-		ret = 1;
-		break;
-
-	case 2: /* Multiple error */
-	case 3: /* ECC area error */
-		printf("S3C NAND: ECC uncorrectable error detected. "
-		       "Not correctable.\n");
-		ret = -1;
-		break;
-	}
-
-	return ret;
-}
-#endif /* CONFIG_SYS_S3C_NAND_HWECC */
-
-/*
- * Board-specific NAND initialization. The following members of the
- * argument are board-specific (per include/linux/mtd/nand.h):
- * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
- * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
- * - hwcontrol: hardwarespecific function for accesing control-lines
- * - dev_ready: hardwarespecific function for  accesing device ready/busy line
- * - enable_hwecc?: function to enable (reset)  hardware ecc generator. Must
- *   only be provided if a hardware ECC is available
- * - eccmode: mode of ecc, see defines
- * - chip_delay: chip dependent delay for transfering data from array to
- *   read regs (tR)
- * - options: various chip options. They can partly be set to inform
- *   nand_scan about special functionality. See the defines for further
- *   explanation
- * Members with a "?" were not set in the merged testing-NAND branch,
- * so they are not set here either.
- */
-int board_nand_init(struct nand_chip *nand)
-{
-	static int chip_n;
-
-	if (chip_n >= MAX_CHIPS)
-		return -ENODEV;
-
-	NFCONT_REG = (NFCONT_REG & ~NFCONT_WP) | NFCONT_ENABLE | 0x6;
-
-	nand->IO_ADDR_R		= (void __iomem *)NFDATA;
-	nand->IO_ADDR_W		= (void __iomem *)NFDATA;
-	nand->cmd_ctrl		= s3c_nand_hwcontrol;
-	nand->dev_ready		= s3c_nand_device_ready;
-	nand->select_chip	= s3c_nand_select_chip;
-	nand->options		= 0;
-#ifdef CONFIG_NAND_SPL
-	nand->read_byte		= nand_read_byte;
-	nand->write_buf		= nand_write_buf;
-	nand->read_buf		= nand_read_buf;
-#endif
-
-#ifdef CONFIG_SYS_S3C_NAND_HWECC
-	nand->ecc.hwctl		= s3c_nand_enable_hwecc;
-	nand->ecc.calculate	= s3c_nand_calculate_ecc;
-	nand->ecc.correct	= s3c_nand_correct_data;
-
-	/*
-	 * If you get more than 1 NAND-chip with different page-sizes on the
-	 * board one day, it will get more complicated...
-	 */
-	nand->ecc.mode		= NAND_ECC_HW;
-	nand->ecc.size		= CONFIG_SYS_NAND_ECCSIZE;
-	nand->ecc.bytes		= CONFIG_SYS_NAND_ECCBYTES;
-#else
-	nand->ecc.mode		= NAND_ECC_SOFT;
-#endif /* ! CONFIG_SYS_S3C_NAND_HWECC */
-
-	nand->priv		= nand_cs + chip_n++;
-
-	return 0;
-}
diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c
index 1a7b40e..858e322 100644
--- a/drivers/mtd/onenand/onenand_base.c
+++ b/drivers/mtd/onenand/onenand_base.c
@@ -632,10 +632,6 @@ static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 	int blockpage, found = 0;
 	unsigned int i;
 
-#ifdef CONFIG_S3C64XX
-	return 0;
-#endif
-
 	if (ONENAND_IS_2PLANE(this))
 		blockpage = onenand_get_2x_blockpage(mtd, addr);
 	else
diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c
index 0d94ea5..5eb2b3a 100644
--- a/drivers/mtd/onenand/samsung.c
+++ b/drivers/mtd/onenand/samsung.c
@@ -1,5 +1,5 @@
 /*
- * S3C64XX/S5PC100 OneNAND driver at U-Boot
+ * S5PC100 OneNAND driver at U-Boot
  *
  * Copyright (C) 2008-2009 Samsung Electronics
  * Kyungmin Park <kyungmin.park@samsung.com>
@@ -62,12 +62,7 @@ do {									\
 #define ONENAND_MAIN_SPARE_ACCESS	0x16
 #define ONENAND_PIPELINE_READ		0x4000
 
-#if defined(CONFIG_S3C64XX)
-#define MAP_00				(0x0 << 24)
-#define MAP_01				(0x1 << 24)
-#define MAP_10				(0x2 << 24)
-#define MAP_11				(0x3 << 24)
-#elif defined(CONFIG_S5P)
+#if defined(CONFIG_S5P)
 #define MAP_00				(0x0 << 26)
 #define MAP_01				(0x1 << 26)
 #define MAP_10				(0x2 << 26)
@@ -116,12 +111,7 @@ static void s3c_write_cmd(int value, unsigned int cmd)
  * return the buffer address on the memory device
  * It will be combined with CMD_MAP_XX
  */
-#if defined(CONFIG_S3C64XX)
-static unsigned int s3c_mem_addr(int fba, int fpa, int fsa)
-{
-	return (fba << 12) | (fpa << 6) | (fsa << 4);
-}
-#elif defined(CONFIG_S5P)
+#if defined(CONFIG_S5P)
 static unsigned int s3c_mem_addr(int fba, int fpa, int fsa)
 {
 	return (fba << 13) | (fpa << 7) | (fsa << 5);
@@ -550,45 +540,6 @@ static void s3c_onenand_unlock_all(struct mtd_info *mtd)
 	s3c_onenand_check_lock_status(mtd);
 }
 
-#ifdef CONFIG_S3C64XX
-static void s3c_set_width_regs(struct onenand_chip *this)
-{
-	int dev_id, density;
-	int fba, fpa, fsa;
-	int dbs_dfs;
-
-	dev_id = DEVICE_ID0_REG;
-
-	density = (dev_id >> ONENAND_DEVICE_DENSITY_SHIFT) & 0xf;
-	dbs_dfs = !!(dev_id & ONENAND_DEVICE_IS_DDP);
-
-	fba = density + 7;
-	if (dbs_dfs)
-		fba--;		/* Decrease the fba */
-	fpa = 6;
-	if (density >= ONENAND_DEVICE_DENSITY_512Mb)
-		fsa = 2;
-	else
-		fsa = 1;
-
-	DPRINTK("FBA %lu, FPA %lu, FSA %lu, DDP %lu",
-		FBA_WIDTH0_REG, FPA_WIDTH0_REG, FSA_WIDTH0_REG,
-		DDP_DEVICE_REG);
-
-	DPRINTK("mem_cfg0 0x%lx, sync mode %lu, "
-		"dev_page_size %lu, BURST LEN %lu",
-		MEM_CFG0_REG, SYNC_MODE_REG,
-		DEV_PAGE_SIZE_REG, BURST_LEN0_REG);
-
-	DEV_PAGE_SIZE_REG = 0x1;
-
-	FBA_WIDTH0_REG = fba;
-	FPA_WIDTH0_REG = fpa;
-	FSA_WIDTH0_REG = fsa;
-	DBS_DFS_WIDTH0_REG = dbs_dfs;
-}
-#endif
-
 int s5pc110_chip_probe(struct mtd_info *mtd)
 {
 	return 0;
@@ -620,10 +571,7 @@ void s3c_onenand_init(struct mtd_info *mtd)
 
 	onenand->mtd = mtd;
 
-#if defined(CONFIG_S3C64XX)
-	onenand->base = (void *)0x70100000;
-	onenand->ahb_addr = (void *)0x20000000;
-#elif defined(CONFIG_S5P)
+#if defined(CONFIG_S5P)
 	onenand->base = (void *)0xE7100000;
 	onenand->ahb_addr = (void *)0xB0000000;
 #endif
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index de3f471..fbc4e97 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -35,7 +35,6 @@ COBJS-$(CONFIG_LPC32XX_HSUART) += lpc32xx_hsuart.o
 COBJS-$(CONFIG_MCFUART) += mcfuart.o
 COBJS-$(CONFIG_OPENCORES_YANU) += opencores_yanu.o
 COBJS-$(CONFIG_SYS_NS16550) += ns16550.o
-COBJS-$(CONFIG_S3C64XX) += s3c64xx.o
 COBJS-$(CONFIG_S5P) += serial_s5p.o
 COBJS-$(CONFIG_SYS_NS16550_SERIAL) += serial_ns16550.o
 COBJS-$(CONFIG_IMX_SERIAL) += serial_imx.o
diff --git a/drivers/serial/s3c64xx.c b/drivers/serial/s3c64xx.c
deleted file mode 100644
index b590992..0000000
--- a/drivers/serial/s3c64xx.c
+++ /dev/null
@@ -1,187 +0,0 @@
-/*
- * (C) Copyright 2002
- * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
- *
- * (C) Copyright 2008
- * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
- *
- */
-
-#include <common.h>
-#include <linux/compiler.h>
-#include <serial.h>
-#include <asm/arch/s3c6400.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_SERIAL1
-#define UART_NR	S3C64XX_UART0
-
-#elif defined(CONFIG_SERIAL2)
-#define UART_NR	S3C64XX_UART1
-
-#elif defined(CONFIG_SERIAL3)
-#define UART_NR	S3C64XX_UART2
-
-#else
-#error "Bad: you didn't configure serial ..."
-#endif
-
-/*
- * The coefficient, used to calculate the baudrate on S3C6400 UARTs is
- * calculated as
- * C = UBRDIV * 16 + number_of_set_bits_in_UDIVSLOT
- * however, section 31.6.11 of the datasheet doesn't recomment using 1 for 1,
- * 3 for 2, ... (2^n - 1) for n, instead, they suggest using these constants:
- */
-static const int udivslot[] = {
-	0,
-	0x0080,
-	0x0808,
-	0x0888,
-	0x2222,
-	0x4924,
-	0x4a52,
-	0x54aa,
-	0x5555,
-	0xd555,
-	0xd5d5,
-	0xddd5,
-	0xdddd,
-	0xdfdd,
-	0xdfdf,
-	0xffdf,
-};
-
-static void s3c64xx_serial_setbrg(void)
-{
-	s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
-	u32 pclk = get_PCLK();
-	u32 baudrate = gd->baudrate;
-	int i;
-
-	i = (pclk / baudrate) % 16;
-
-	uart->UBRDIV = pclk / baudrate / 16 - 1;
-	uart->UDIVSLOT = udivslot[i];
-
-	for (i = 0; i < 100; i++)
-		barrier();
-}
-
-/*
- * Initialise the serial port with the given baudrate. The settings
- * are always 8 data bits, no parity, 1 stop bit, no start bits.
- */
-static int s3c64xx_serial_init(void)
-{
-	s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
-
-	/* reset and enable FIFOs, set triggers to the maximum */
-	uart->UFCON = 0xff;
-	uart->UMCON = 0;
-	/* 8N1 */
-	uart->ULCON = 3;
-	/* No interrupts, no DMA, pure polling */
-	uart->UCON = 5;
-
-	serial_setbrg();
-
-	return 0;
-}
-
-/*
- * Read a single byte from the serial port. Returns 1 on success, 0
- * otherwise. When the function is succesfull, the character read is
- * written into its argument c.
- */
-static int s3c64xx_serial_getc(void)
-{
-	s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
-
-	/* wait for character to arrive */
-	while (!(uart->UTRSTAT & 0x1));
-
-	return uart->URXH & 0xff;
-}
-
-#ifdef CONFIG_MODEM_SUPPORT
-static int be_quiet;
-void disable_putc(void)
-{
-	be_quiet = 1;
-}
-
-void enable_putc(void)
-{
-	be_quiet = 0;
-}
-#endif
-
-
-/*
- * Output a single byte to the serial port.
- */
-static void s3c64xx_serial_putc(const char c)
-{
-	s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
-
-#ifdef CONFIG_MODEM_SUPPORT
-	if (be_quiet)
-		return;
-#endif
-
-	/* wait for room in the tx FIFO */
-	while (!(uart->UTRSTAT & 0x2));
-
-	uart->UTXH = c;
-
-	/* If \n, also do \r */
-	if (c == '\n')
-		serial_putc('\r');
-}
-
-/*
- * Test whether a character is in the RX buffer
- */
-static int s3c64xx_serial_tstc(void)
-{
-	s3c64xx_uart *const uart = s3c64xx_get_base_uart(UART_NR);
-
-	return uart->UTRSTAT & 0x1;
-}
-
-static struct serial_device s3c64xx_serial_drv = {
-	.name	= "s3c64xx_serial",
-	.start	= s3c64xx_serial_init,
-	.stop	= NULL,
-	.setbrg	= s3c64xx_serial_setbrg,
-	.putc	= s3c64xx_serial_putc,
-	.puts	= default_serial_puts,
-	.getc	= s3c64xx_serial_getc,
-	.tstc	= s3c64xx_serial_tstc,
-};
-
-void s3c64xx_serial_initialize(void)
-{
-	serial_register(&s3c64xx_serial_drv);
-}
-
-__weak struct serial_device *default_serial_console(void)
-{
-	return &s3c64xx_serial_drv;
-}
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index 7922bf0..9f04643 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -165,7 +165,6 @@ serial_initfunc(atmel_serial_initialize);
 serial_initfunc(lpc32xx_serial_initialize);
 serial_initfunc(mcf_serial_initialize);
 serial_initfunc(oc_serial_initialize);
-serial_initfunc(s3c64xx_serial_initialize);
 serial_initfunc(sandbox_serial_initialize);
 serial_initfunc(clps7111_serial_initialize);
 serial_initfunc(imx_serial_initialize);
@@ -259,7 +258,6 @@ void serial_initialize(void)
 	lpc32xx_serial_initialize();
 	mcf_serial_initialize();
 	oc_serial_initialize();
-	s3c64xx_serial_initialize();
 	sandbox_serial_initialize();
 	clps7111_serial_initialize();
 	imx_serial_initialize();
diff --git a/drivers/usb/host/Makefile b/drivers/usb/host/Makefile
index 9a6f982..87a5970 100644
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -31,7 +31,6 @@ COBJS-$(CONFIG_USB_ATMEL) += ohci-at91.o
 COBJS-$(CONFIG_USB_OHCI_DA8XX) += ohci-da8xx.o
 COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
 COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
-COBJS-$(CONFIG_USB_S3C64XX) += s3c64xx-hcd.o
 COBJS-$(CONFIG_USB_SL811HS) += sl811-hcd.o
 COBJS-$(CONFIG_USB_OHCI_S3C24XX) += ohci-s3c24xx.o
 
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index bdbe250..bc17b85 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -66,7 +66,6 @@
 
 #if defined(CONFIG_ARM920T) || \
     defined(CONFIG_S3C24X0) || \
-    defined(CONFIG_S3C6400) || \
     defined(CONFIG_440EP) || \
     defined(CONFIG_PCI_OHCI) || \
     defined(CONFIG_MPC5200) || \
diff --git a/drivers/usb/host/s3c64xx-hcd.c b/drivers/usb/host/s3c64xx-hcd.c
deleted file mode 100644
index cd295da..0000000
--- a/drivers/usb/host/s3c64xx-hcd.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/*
- * URB OHCI HCD (Host Controller Driver) initialization for USB on the S3C64XX.
- *
- * Copyright (C) 2008,
- * Guennadi Liakhovetski, DENX Software Engineering <lg@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <asm/arch/s3c6400.h>
-
-int usb_cpu_init(void)
-{
-	OTHERS_REG |= 0x10000;
-	return 0;
-}
-
-int usb_cpu_stop(void)
-{
-	OTHERS_REG &= ~0x10000;
-	return 0;
-}
-
-void usb_cpu_init_fail(void)
-{
-	OTHERS_REG &= ~0x10000;
-}
diff --git a/include/common.h b/include/common.h
index 604176c..0cfa6a8 100644
--- a/include/common.h
+++ b/include/common.h
@@ -647,7 +647,6 @@ ulong	get_PCI_freq (void);
 #endif
 #if defined(CONFIG_S3C24X0) || \
     defined(CONFIG_LH7A40X) || \
-    defined(CONFIG_S3C6400) || \
     defined(CONFIG_EP93XX)
 ulong	get_FCLK (void);
 ulong	get_HCLK (void);
diff --git a/include/onenand_uboot.h b/include/onenand_uboot.h
index f321d8a..fd01040 100644
--- a/include/onenand_uboot.h
+++ b/include/onenand_uboot.h
@@ -48,10 +48,6 @@ extern int flexonenand_region(struct mtd_info *mtd, loff_t addr);
 extern int flexonenand_set_boundary(struct mtd_info *mtd, int die,
 					int boundary, int lock);
 
-/* S3C64xx */
-extern void s3c64xx_onenand_init(struct mtd_info *);
-extern void s3c64xx_set_width_regs(struct onenand_chip *);
-
 /* SPL */
 void onenand_spl_load_image(uint32_t offs, uint32_t size, void *dst);
 
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 28/30] arm: Remove deprecated and now unused NAND SPL
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (25 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 27/30] arm: Remove support for unused s3c64xx Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 29/30] arm1176: Remove unused MMU setup from start.S Benoît Thébaudeau
                   ` (4 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9: None
Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/config.mk           |    2 --
 arch/arm/cpu/arm1176/start.S |   12 ++++--------
 arch/arm/lib/crt0.S          |   16 ++--------------
 3 files changed, 6 insertions(+), 24 deletions(-)

diff --git a/arch/arm/config.mk b/arch/arm/config.mk
index e7839be..461899e 100644
--- a/arch/arm/config.mk
+++ b/arch/arm/config.mk
@@ -87,9 +87,7 @@ endif
 endif
 
 # needed for relocation
-ifndef CONFIG_NAND_SPL
 LDFLAGS_u-boot += -pie
-endif
 
 #
 # FIXME: binutils versions < 2.22 have a bug in the assembler where
diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index 5654c19..a7cf728 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -51,7 +51,7 @@
 
 .globl _start
 _start: b	reset
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
 	ldr	pc, _undefined_instruction
 	ldr	pc, _software_interrupt
 	ldr	pc, _prefetch_abort
@@ -98,15 +98,11 @@ _end_vect:
 
 .globl _TEXT_BASE
 _TEXT_BASE:
-#ifdef CONFIG_NAND_SPL /* deprecated, use instead CONFIG_SPL_BUILD */
-	.word	CONFIG_SYS_TEXT_BASE
-#else
 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_TEXT_BASE)
 	.word	CONFIG_SPL_TEXT_BASE
 #else
 	.word	CONFIG_SYS_TEXT_BASE
 #endif
-#endif
 
 /*
  * Below variable is very important because we use MMU in U-Boot.
@@ -176,7 +172,7 @@ cpu_init_crit:
 	 * When booting from NAND - it has definitely been a reset, so, no need
 	 * to flush caches and disable the MMU
 	 */
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
 	/*
 	 * flush v4 I/D caches
 	 */
@@ -361,7 +357,7 @@ c_runtime_cpu_setup:
 
 	mov	pc, lr
 
-#ifndef CONFIG_NAND_SPL
+#ifndef CONFIG_SPL_BUILD
 /*
  * we assume that cache operation is done before. (eg. cleanup_before_linux())
  * actually, we don't need to do anything about cache if not use d-cache in
@@ -539,4 +535,4 @@ fiq:
 	get_bad_stack
 	bad_save_user_regs
 	bl	do_fiq
-#endif /* CONFIG_NAND_SPL */
+#endif /* CONFIG_SPL_BUILD */
diff --git a/arch/arm/lib/crt0.S b/arch/arm/lib/crt0.S
index fa25319..a9657d1 100644
--- a/arch/arm/lib/crt0.S
+++ b/arch/arm/lib/crt0.S
@@ -64,7 +64,7 @@
  *    have some work left to do at this point regarding memory, so
  *    call c_runtime_cpu_setup.
  *
- * 6. Branch to either nand_boot() or board_init_r().
+ * 6. Branch to board_init_r().
  */
 
 /*
@@ -77,10 +77,7 @@ ENTRY(_main)
  * Set up initial C runtime environment and call board_init_f(0).
  */
 
-#if defined(CONFIG_NAND_SPL)
-	/* deprecated, use instead CONFIG_SPL_BUILD */
-	ldr	sp, =(CONFIG_SYS_INIT_SP_ADDR)
-#elif defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_STACK)
 	ldr	sp, =(CONFIG_SPL_STACK)
 #else
 	ldr	sp, =(CONFIG_SYS_INIT_SP_ADDR)
@@ -129,21 +126,12 @@ clbss_l:cmp	r0, r1			/* while not@end of BSS */
 	bl coloured_LED_init
 	bl red_led_on
 
-#if defined(CONFIG_NAND_SPL)
-
-	/* call _nand_boot() */
-	ldr     pc, =nand_boot
-
-#else
-
 	/* call board_init_r(gd_t *id, ulong dest_addr) */
 	mov	r0, r8			/* gd_t */
 	ldr	r1, [r8, #GD_RELOCADDR]	/* dest_addr */
 	/* call board_init_r */
 	ldr	pc, =board_init_r	/* this is auto-relocated! */
 
-#endif
-
 	/* we should not return here. */
 
 #endif
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 29/30] arm1176: Remove unused MMU setup from start.S
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (26 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 28/30] arm: Remove deprecated and now unused NAND SPL Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 30/30] arm: Make all linker scripts compatible with per-symbol sections Benoît Thébaudeau
                   ` (3 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Following the removal of the smdk6400 board, the MMU setup code in
arm1176/start.S becomes unused, so remove it. It will still be possible to
restore it later from the Git history if necessary, in which case it should be
moved out of the relocate_code() function.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10: None
Changes in v9:
 - Do not use "scrapyard" in patch description because this is reserved to refer
   to the board scrapyard file.

Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm1176/start.S |   91 +-----------------------------------------
 1 file changed, 1 insertion(+), 90 deletions(-)

diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S
index a7cf728..1fc1da0 100644
--- a/arch/arm/cpu/arm1176/start.S
+++ b/arch/arm/cpu/arm1176/start.S
@@ -33,11 +33,8 @@
 #include <asm-offsets.h>
 #include <config.h>
 #include <version.h>
-#ifdef CONFIG_ENABLE_MMU
-#include <asm/proc/domain.h>
-#endif
 
-#if !defined(CONFIG_ENABLE_MMU) && !defined(CONFIG_SYS_PHY_UBOOT_BASE)
+#ifndef CONFIG_SYS_PHY_UBOOT_BASE
 #define CONFIG_SYS_PHY_UBOOT_BASE	CONFIG_SYS_UBOOT_BASE
 #endif
 
@@ -105,14 +102,6 @@ _TEXT_BASE:
 #endif
 
 /*
- * Below variable is very important because we use MMU in U-Boot.
- * Without it, we cannot run code correctly before MMU is ON.
- * by scsuh.
- */
-_TEXT_PHY_BASE:
-	.word	CONFIG_SYS_PHY_UBOOT_BASE
-
-/*
  * These are defined in the board-specific linker script.
  * Subtracting _start from them lets the linker put their
  * relative position in the executable instead of leaving
@@ -298,44 +287,6 @@ fixnext:
 	blo	fixloop
 #endif
 
-#ifdef CONFIG_ENABLE_MMU
-enable_mmu:
-	/* enable domain access */
-	ldr	r5, =0x0000ffff
-	mcr	p15, 0, r5, c3, c0, 0	/* load domain access register */
-
-	/* Set the TTB register */
-	ldr	r0, _mmu_table_base
-	ldr	r1, =CONFIG_SYS_PHY_UBOOT_BASE
-	ldr	r2, =0xfff00000
-	bic	r0, r0, r2
-	orr	r1, r0, r1
-	mcr	p15, 0, r1, c2, c0, 0
-
-	/* Enable the MMU */
-	mrc	p15, 0, r0, c1, c0, 0
-	orr	r0, r0, #1		/* Set CR_M to enable MMU */
-
-	/* Prepare to enable the MMU */
-	adr	r1, skip_hw_init
-	and	r1, r1, #0x3fc
-	ldr	r2, _TEXT_BASE
-	ldr	r3, =0xfff00000
-	and	r2, r2, r3
-	orr	r2, r2, r1
-	b	mmu_enable
-
-	.align 5
-	/* Run in a single cache-line */
-mmu_enable:
-
-	mcr	p15, 0, r0, c1, c0, 0
-	nop
-	nop
-	mov	pc, r2
-skip_hw_init:
-#endif
-
 relocate_done:
 
 	bx	lr
@@ -347,11 +298,6 @@ _rel_dyn_end_ofs:
 _dynsym_start_ofs:
 	.word __dynsym_start - _start
 
-#ifdef CONFIG_ENABLE_MMU
-_mmu_table_base:
-	.word mmu_table
-#endif
-
 	.globl	c_runtime_cpu_setup
 c_runtime_cpu_setup:
 
@@ -359,41 +305,6 @@ c_runtime_cpu_setup:
 
 #ifndef CONFIG_SPL_BUILD
 /*
- * we assume that cache operation is done before. (eg. cleanup_before_linux())
- * actually, we don't need to do anything about cache if not use d-cache in
- * U-Boot. So, in this function we clean only MMU. by scsuh
- *
- * void	theLastJump(void *kernel, int arch_num, uint boot_params);
- */
-#ifdef CONFIG_ENABLE_MMU
-	.globl theLastJump
-theLastJump:
-	mov	r9, r0
-	ldr	r3, =0xfff00000
-	ldr	r4, _TEXT_PHY_BASE
-	adr	r5, phy_last_jump
-	bic	r5, r5, r3
-	orr	r5, r5, r4
-	mov	pc, r5
-phy_last_jump:
-	/*
-	 * disable MMU stuff
-	 */
-	mrc	p15, 0, r0, c1, c0, 0
-	bic	r0, r0, #0x00002300	/* clear bits 13, 9:8 (--V- --RS) */
-	bic	r0, r0, #0x00000087	/* clear bits 7, 2:0 (B--- -CAM) */
-	orr	r0, r0, #0x00000002	/* set bit 2 (A) Align */
-	orr	r0, r0, #0x00001000	/* set bit 12 (I) I-Cache */
-	mcr	p15, 0, r0, c1, c0, 0
-
-	mcr	p15, 0, r0, c8, c7, 0	/* flush v4 TLB */
-
-	mov	r0, #0
-	mov	pc, r9
-#endif
-
-
-/*
  *************************************************************************
  *
  * Interrupt handling
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 30/30] arm: Make all linker scripts compatible with per-symbol sections
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (27 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 29/30] arm1176: Remove unused MMU setup from start.S Benoît Thébaudeau
@ 2013-04-09 19:48 ` Benoît Thébaudeau
  2013-04-09 20:00 ` [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (2 subsequent siblings)
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 19:48 UTC (permalink / raw)
  To: u-boot

Let all ARM linker scripts handle properly -ffunction-sections
and -fdata-sections. This will be useful for future changes in order to create
symbol-specific sections in common .S files.

Signed-off-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
---
Changes in v11: None
Changes in v10:
 - Rebase on current u-boot-arm/master.

Changes in v9:
 - Reword following the removal of "arm: Remove duplicated start.S code".

Changes in v8:
 - New patch.

Changes in v7: None
Changes in v6: None
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None

 arch/arm/cpu/arm1136/u-boot-spl.lds            |    2 +-
 arch/arm/cpu/arm920t/ep93xx/u-boot.lds         |   10 +++++-----
 arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds      |    6 +++---
 arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds    |    6 +++---
 arch/arm/cpu/armv7/omap-common/u-boot-spl.lds  |    2 +-
 arch/arm/cpu/armv7/socfpga/u-boot-spl.lds      |    2 +-
 board/ait/cam_enc_4xx/u-boot-spl.lds           |    2 +-
 board/davinci/da8xxevm/u-boot-spl-da850evm.lds |    2 +-
 board/davinci/da8xxevm/u-boot-spl-hawk.lds     |    8 ++++----
 board/freescale/mx31ads/u-boot.lds             |   18 +++++++++---------
 board/samsung/smdk5250/smdk5250-uboot-spl.lds  |    2 +-
 board/vpac270/u-boot-spl.lds                   |    4 ++--
 12 files changed, 32 insertions(+), 32 deletions(-)

diff --git a/arch/arm/cpu/arm1136/u-boot-spl.lds b/arch/arm/cpu/arm1136/u-boot-spl.lds
index b09b4eb..8296e5d 100644
--- a/arch/arm/cpu/arm1136/u-boot-spl.lds
+++ b/arch/arm/cpu/arm1136/u-boot-spl.lds
@@ -38,7 +38,7 @@ SECTIONS
 	.text      :
 	{
 	__start = .;
-	  arch/arm/cpu/arm1136/start.o	(.text)
+	  arch/arm/cpu/arm1136/start.o	(.text*)
 	  *(.text*)
 	} >.sram
 
diff --git a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
index d0b1ada..cf55bf7 100644
--- a/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
+++ b/arch/arm/cpu/arm920t/ep93xx/u-boot.lds
@@ -31,18 +31,18 @@ SECTIONS
 	. = ALIGN(4);
 	.text      :
 	{
-	  arch/arm/cpu/arm920t/start.o	(.text)
+	  arch/arm/cpu/arm920t/start.o	(.text*)
 		/* the EP93xx expects to find the pattern 'CRUS' at 0x1000 */
 	  . = 0x1000;
 	  LONG(0x53555243)
-	  *(.text)
+	  *(.text*)
 	}
 
 	. = ALIGN(4);
-	.rodata : { *(.rodata) }
+	.rodata : { *(.rodata*) }
 
 	. = ALIGN(4);
-	.data : { *(.data) }
+	.data : { *(.data*) }
 
 	. = ALIGN(4);
 	.got : { *(.got) }
@@ -59,7 +59,7 @@ SECTIONS
 	__image_copy_end = .;
 
 	__bss_start = .;
-	.bss : { *(.bss) }
+	.bss : { *(.bss*) }
 	__bss_end = .;
 
 	_end = .;
diff --git a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
index 67b204e..673c725 100644
--- a/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds
@@ -37,8 +37,8 @@ SECTIONS
 	. = ALIGN(4);
 	.text	:
 	{
-		arch/arm/cpu/arm926ejs/mxs/start.o	(.text)
-		*(.text)
+		arch/arm/cpu/arm926ejs/mxs/start.o	(.text*)
+		*(.text*)
 	}
 
 	. = ALIGN(4);
@@ -46,7 +46,7 @@ SECTIONS
 
 	. = ALIGN(4);
 	.data : {
-		*(.data)
+		*(.data*)
 	}
 
 	. = ALIGN(4);
diff --git a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
index 7405917..967a135 100644
--- a/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
+++ b/arch/arm/cpu/arm926ejs/spear/u-boot-spl.lds
@@ -37,8 +37,8 @@ SECTIONS
 	. = ALIGN(4);
 	.text	:
 	{
-		arch/arm/cpu/arm926ejs/spear/start.o	(.text)
-		*(.text)
+		arch/arm/cpu/arm926ejs/spear/start.o	(.text*)
+		*(.text*)
 	}
 
 	. = ALIGN(4);
@@ -46,7 +46,7 @@ SECTIONS
 
 	. = ALIGN(4);
 	.data : {
-		*(.data)
+		*(.data*)
 	}
 
 	. = ALIGN(4);
diff --git a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
index efae381..bd218c0 100644
--- a/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/omap-common/u-boot-spl.lds
@@ -38,7 +38,7 @@ SECTIONS
 	.text      :
 	{
 		__start = .;
-		arch/arm/cpu/armv7/start.o	(.text)
+		arch/arm/cpu/armv7/start.o	(.text*)
 		*(.text*)
 	} >.sram
 
diff --git a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
index 79cc93c..15f8c01 100644
--- a/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
+++ b/arch/arm/cpu/armv7/socfpga/u-boot-spl.lds
@@ -27,7 +27,7 @@ SECTIONS
 	. = ALIGN(4);
 	.text	:
 	{
-		arch/arm/cpu/armv7/start.o	(.text)
+		arch/arm/cpu/armv7/start.o	(.text*)
 		*(.text*)
 	} >.sdram
 
diff --git a/board/ait/cam_enc_4xx/u-boot-spl.lds b/board/ait/cam_enc_4xx/u-boot-spl.lds
index dd9d52d..be1027d 100644
--- a/board/ait/cam_enc_4xx/u-boot-spl.lds
+++ b/board/ait/cam_enc_4xx/u-boot-spl.lds
@@ -38,7 +38,7 @@ SECTIONS
 	.text      :
 	{
 	__start = .;
-	  arch/arm/cpu/arm926ejs/start.o	(.text)
+	  arch/arm/cpu/arm926ejs/start.o	(.text*)
 	  *(.text*)
 	} >.sram
 
diff --git a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds
index bc34fb5..2ae5a2c 100644
--- a/board/davinci/da8xxevm/u-boot-spl-da850evm.lds
+++ b/board/davinci/da8xxevm/u-boot-spl-da850evm.lds
@@ -38,7 +38,7 @@ SECTIONS
 	.text      :
 	{
 	__start = .;
-	  arch/arm/cpu/arm926ejs/start.o	(.text)
+	  arch/arm/cpu/arm926ejs/start.o	(.text*)
 	  *(.text*)
 	} >.sram
 
diff --git a/board/davinci/da8xxevm/u-boot-spl-hawk.lds b/board/davinci/da8xxevm/u-boot-spl-hawk.lds
index 4839364..596a9e0 100644
--- a/board/davinci/da8xxevm/u-boot-spl-hawk.lds
+++ b/board/davinci/da8xxevm/u-boot-spl-hawk.lds
@@ -34,15 +34,15 @@ SECTIONS
 	. = ALIGN(4);
 	.text      :
 	{
-	  arch/arm/cpu/arm926ejs/start.o		(.text)
-	  arch/arm/cpu/arm926ejs/davinci/libdavinci.o	(.text)
-	  drivers/mtd/nand/libnand.o			(.text)
+	  arch/arm/cpu/arm926ejs/start.o		(.text*)
+	  arch/arm/cpu/arm926ejs/davinci/libdavinci.o	(.text*)
+	  drivers/mtd/nand/libnand.o			(.text*)
 
 	  *(.text*)
 	}
 
 	. = ALIGN(4);
-	.rodata : { *(.rodata) }
+	.rodata : { *(.rodata*) }
 
 	. = ALIGN(4);
 	.data : {
diff --git a/board/freescale/mx31ads/u-boot.lds b/board/freescale/mx31ads/u-boot.lds
index 264c4e8..f48fda1 100644
--- a/board/freescale/mx31ads/u-boot.lds
+++ b/board/freescale/mx31ads/u-boot.lds
@@ -37,23 +37,23 @@ SECTIONS
 	  /* WARNING - the following is hand-optimized to fit within	*/
 	  /* the sector layout of our flash chips!	XXX FIXME XXX	*/
 
-	  arch/arm/cpu/arm1136/start.o			(.text)
-	  board/freescale/mx31ads/libmx31ads.o	(.text)
-	  arch/arm/lib/libarm.o			(.text)
-	  net/libnet.o				(.text)
-	  drivers/mtd/libmtd.o			(.text)
+	  arch/arm/cpu/arm1136/start.o			(.text*)
+	  board/freescale/mx31ads/libmx31ads.o	(.text*)
+	  arch/arm/lib/libarm.o			(.text*)
+	  net/libnet.o				(.text*)
+	  drivers/mtd/libmtd.o			(.text*)
 
 	  . = DEFINED(env_offset) ? env_offset : .;
-	  common/env_embedded.o(.text)
+	  common/env_embedded.o(.text*)
 
-	  *(.text)
+	  *(.text*)
 	}
 	. = ALIGN(4);
-	.rodata : { *(.rodata) }
+	.rodata : { *(.rodata*) }
 
 	. = ALIGN(4);
 	.data : {
-		*(.data)
+		*(.data*)
 	}
 
 	. = ALIGN(4);
diff --git a/board/samsung/smdk5250/smdk5250-uboot-spl.lds b/board/samsung/smdk5250/smdk5250-uboot-spl.lds
index 4c8baaa..7df0a1d 100644
--- a/board/samsung/smdk5250/smdk5250-uboot-spl.lds
+++ b/board/samsung/smdk5250/smdk5250-uboot-spl.lds
@@ -37,7 +37,7 @@ SECTIONS
 	.text :
 	{
 		__start = .;
-		arch/arm/cpu/armv7/start.o (.text)
+		arch/arm/cpu/armv7/start.o (.text*)
 		*(.text*)
 	} >.sram
 	. = ALIGN(4);
diff --git a/board/vpac270/u-boot-spl.lds b/board/vpac270/u-boot-spl.lds
index ab65407..61d1154 100644
--- a/board/vpac270/u-boot-spl.lds
+++ b/board/vpac270/u-boot-spl.lds
@@ -54,7 +54,7 @@ SECTIONS
 
 	. = ALIGN(4);
 	.data : {
-		*(.data)
+		*(.data*)
 	}
 
 	. = ALIGN(4);
@@ -78,7 +78,7 @@ SECTIONS
 
 	.bss __rel_dyn_start (OVERLAY) : {
 		__bss_start = .;
-		*(.bss)
+		*(.bss*)
 		 . = ALIGN(4);
 		__bss_end = .;
 	}
-- 
1.7.10.4

^ permalink raw reply related	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (28 preceding siblings ...)
  2013-04-09 19:48 ` [U-Boot] [PATCH v11 30/30] arm: Make all linker scripts compatible with per-symbol sections Benoît Thébaudeau
@ 2013-04-09 20:00 ` Benoît Thébaudeau
  2013-04-10  8:24 ` Albert ARIBAUD
  2013-04-10 20:43 ` Albert ARIBAUD
  31 siblings, 0 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-09 20:00 UTC (permalink / raw)
  To: u-boot

On Tuesday, April 9, 2013 9:48:30 PM, Beno?t Th?baudeau wrote:
> From: Fabio Estevam <fabio.estevam@freescale.com>
> 
> Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller
> drivers could use it when a 16-bit NAND is deployed.
> 
> drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
> other NAND drivers could reuse the same symbol.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> Acked-by: Scott Wood <scottwood@freescale.com>
> Reviewed-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> ---
> Changes in v11: None
> Changes in v10: None
> Changes in v9: None
> Changes in v8:
>  - New patch.
> 
> Changes in v7: None
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
> Changes in v2: None
> 
>  README                  |    9 ++++++---
>  drivers/mtd/nand/ndfc.c |    4 ++--
>  2 files changed, 8 insertions(+), 5 deletions(-)
> 
> diff --git a/README b/README
> index 5c5cd18..e9c3145 100644
> --- a/README
> +++ b/README
> @@ -3755,9 +3755,12 @@ Low Level (hardware related) configuration options:
>  - CONFIG_SYS_SRIOn_MEM_SIZE:
>  		Size of SRIO port 'n' memory region
>  
> -- CONFIG_SYS_NDFC_16
> -		Defined to tell the NDFC that the NAND chip is using a
> -		16 bit bus.
> +- CONFIG_SYS_NAND_BUSWIDTH_16BIT
> +		Defined to tell the NAND controller that the NAND chip is using
> +		a 16 bit bus.
> +		Not all NAND drivers use this symbol.
> +		Example of driver that uses it:
> +		- drivers/mtd/nand/ndfc.c
>  
>  - CONFIG_SYS_NDFC_EBC0_CFG
>  		Sets the EBC0_CFG register for the NDFC. If not defined
> diff --git a/drivers/mtd/nand/ndfc.c b/drivers/mtd/nand/ndfc.c
> index 6ebbb5e..213d2c9 100644
> --- a/drivers/mtd/nand/ndfc.c
> +++ b/drivers/mtd/nand/ndfc.c
> @@ -156,7 +156,7 @@ static uint8_t ndfc_read_byte(struct mtd_info *mtd)
>  
>  	struct nand_chip *chip = mtd->priv;
>  
> -#ifdef CONFIG_SYS_NDFC_16BIT
> +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
>  	return (uint8_t) readw(chip->IO_ADDR_R);
>  #else
>  	return readb(chip->IO_ADDR_R);
> @@ -218,7 +218,7 @@ int board_nand_init(struct nand_chip *nand)
>  	nand->ecc.bytes = 3;
>  	nand->select_chip = ndfc_select_chip;
>  
> -#ifdef CONFIG_SYS_NDFC_16BIT
> +#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
>  	nand->options |= NAND_BUSWIDTH_16;
>  #endif
>  
> --
> 1.7.10.4
> 
> 

Git bundle for v11 here:
http://dl.free.fr/lWM6s9zmk

The changes in v11 are limited to 18/30 (mx31pdk.h).

Best regards,
Beno?t

^ permalink raw reply	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (29 preceding siblings ...)
  2013-04-09 20:00 ` [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
@ 2013-04-10  8:24 ` Albert ARIBAUD
  2013-04-10 20:43 ` Albert ARIBAUD
  31 siblings, 0 replies; 40+ messages in thread
From: Albert ARIBAUD @ 2013-04-10  8:24 UTC (permalink / raw)
  To: u-boot

Hi Beno?t,

On Tue,  9 Apr 2013 21:48:30 +0200, Beno?t Th?baudeau
<benoit.thebaudeau@advansee.com> wrote:

> From: Fabio Estevam <fabio.estevam@freescale.com>
> 
> Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller
> drivers could use it when a 16-bit NAND is deployed.
> 
> drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
> other NAND drivers could reuse the same symbol.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> Acked-by: Scott Wood <scottwood@freescale.com>
> Reviewed-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> ---

Diff'ed with v10 *and* build-checked across ARM, all clear.

Unless there is screaming opposition, I intend to merge v11 (along with
Fabio's mx31pdk watchdog patch) by end of afternoon TLS (GMT+2) time.

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
  2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
                   ` (30 preceding siblings ...)
  2013-04-10  8:24 ` Albert ARIBAUD
@ 2013-04-10 20:43 ` Albert ARIBAUD
  2013-04-10 21:26   ` Benoît Thébaudeau
  31 siblings, 1 reply; 40+ messages in thread
From: Albert ARIBAUD @ 2013-04-10 20:43 UTC (permalink / raw)
  To: u-boot

Hi Beno?t,

On Tue,  9 Apr 2013 21:48:30 +0200, Beno?t Th?baudeau
<benoit.thebaudeau@advansee.com> wrote:

> From: Fabio Estevam <fabio.estevam@freescale.com>
> 
> Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND controller
> drivers could use it when a 16-bit NAND is deployed.
> 
> drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
> other NAND drivers could reuse the same symbol.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> Acked-by: Scott Wood <scottwood@freescale.com>
> Reviewed-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> ---

Whole series applied to u-boot-arm/master, thanks!

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
  2013-04-10 20:43 ` Albert ARIBAUD
@ 2013-04-10 21:26   ` Benoît Thébaudeau
  2013-04-10 21:34     ` Fabio Estevam
  2013-04-10 21:55     ` Albert ARIBAUD
  0 siblings, 2 replies; 40+ messages in thread
From: Benoît Thébaudeau @ 2013-04-10 21:26 UTC (permalink / raw)
  To: u-boot

Hi Albert,

On Wednesday, April 10, 2013 10:43:31 PM, Albert ARIBAUD wrote:
> Hi Beno?t,
> 
> On Tue,  9 Apr 2013 21:48:30 +0200, Beno?t Th?baudeau
> <benoit.thebaudeau@advansee.com> wrote:
> 
> > From: Fabio Estevam <fabio.estevam@freescale.com>
> > 
> > Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND
> > controller
> > drivers could use it when a 16-bit NAND is deployed.
> > 
> > drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
> > other NAND drivers could reuse the same symbol.
> > 
> > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> > Acked-by: Scott Wood <scottwood@freescale.com>
> > Reviewed-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> > ---
> 
> Whole series applied to u-boot-arm/master, thanks!

Thanks, but you have applied the bundle from my branch instead of the series
from the mailing list, so all commit messages are crippled with patman stuff,
my SoB is missing, and 01 and 02/30 do not have Fabio set as the author. Is it
possible to fix this?

Best regards,
Beno?t

^ permalink raw reply	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
  2013-04-10 21:26   ` Benoît Thébaudeau
@ 2013-04-10 21:34     ` Fabio Estevam
  2013-04-10 22:14       ` Albert ARIBAUD
  2013-04-10 21:55     ` Albert ARIBAUD
  1 sibling, 1 reply; 40+ messages in thread
From: Fabio Estevam @ 2013-04-10 21:34 UTC (permalink / raw)
  To: u-boot

On Wed, Apr 10, 2013 at 6:26 PM, Beno?t Th?baudeau
<benoit.thebaudeau@advansee.com> wrote:

> Thanks, but you have applied the bundle from my branch instead of the series
> from the mailing list, so all commit messages are crippled with patman stuff,
> my SoB is missing, and 01 and 02/30 do not have Fabio set as the author. Is it
> possible to fix this?

Yes, in u-boot-arm the authorship is not correct:

commit 2dc82d58a37a5e05bb7b54ec658e89275f71b1ba
Author: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
Date:   Thu Feb 28 21:38:00 2013 +0100

    mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT

    From: Fabio Estevam <fabio.estevam@freescale.com>

    Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND
controller
    drivers could use it when a 16-bit NAND is deployed.

    drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
    other NAND drivers could reuse the same symbol.

    Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
    Reviewed-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
    Acked-by: Scott Wood <scottwood@freescale.com>
    Cc: Fabio Estevam <fabio.estevam@freescale.com>
    Cc: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
    Series-to: nand, imx, arm
    Series-cc: marex
    Series-version: 11
    Series-name: mxc-nand
    Series-changes: 8
     - New patch.

Regards,

Fabio Estevam

^ permalink raw reply	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
  2013-04-10 21:34     ` Fabio Estevam
@ 2013-04-10 22:14       ` Albert ARIBAUD
  0 siblings, 0 replies; 40+ messages in thread
From: Albert ARIBAUD @ 2013-04-10 22:14 UTC (permalink / raw)
  To: u-boot

Hi Fabio,

On Wed, 10 Apr 2013 18:34:13 -0300, Fabio Estevam <festevam@gmail.com>
wrote:

> On Wed, Apr 10, 2013 at 6:26 PM, Beno?t Th?baudeau
> <benoit.thebaudeau@advansee.com> wrote:
> 
> > Thanks, but you have applied the bundle from my branch instead of the series
> > from the mailing list, so all commit messages are crippled with patman stuff,
> > my SoB is missing, and 01 and 02/30 do not have Fabio set as the author. Is it
> > possible to fix this?
> 
> Yes, in u-boot-arm the authorship is not correct:
> 
> commit 2dc82d58a37a5e05bb7b54ec658e89275f71b1ba
> Author: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> Date:   Thu Feb 28 21:38:00 2013 +0100
> 
>     mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
> 
>     From: Fabio Estevam <fabio.estevam@freescale.com>
> 
>     Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND
> controller
>     drivers could use it when a 16-bit NAND is deployed.
> 
>     drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
>     other NAND drivers could reuse the same symbol.
> 
>     Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
>     Reviewed-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
>     Acked-by: Scott Wood <scottwood@freescale.com>
>     Cc: Fabio Estevam <fabio.estevam@freescale.com>
>     Cc: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
>     Series-to: nand, imx, arm
>     Series-cc: marex
>     Series-version: 11
>     Series-name: mxc-nand
>     Series-changes: 8
>      - New patch.

Ok, series re-applied from patchwork, diffed with bundle (identical,
phew!) and authorship and commit messages are now fine.

/me thinks a git hook to detect lingering patman lines in commit
messages before doing a git push would be a Good Thing.

> Regards,
> 
> Fabio Estevam

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 40+ messages in thread

* [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT
  2013-04-10 21:26   ` Benoît Thébaudeau
  2013-04-10 21:34     ` Fabio Estevam
@ 2013-04-10 21:55     ` Albert ARIBAUD
  1 sibling, 0 replies; 40+ messages in thread
From: Albert ARIBAUD @ 2013-04-10 21:55 UTC (permalink / raw)
  To: u-boot

Hi Beno?t,

On Wed, 10 Apr 2013 23:26:10 +0200 (CEST), Beno?t Th?baudeau
<benoit.thebaudeau@advansee.com> wrote:

> Hi Albert,
> 
> On Wednesday, April 10, 2013 10:43:31 PM, Albert ARIBAUD wrote:
> > Hi Beno?t,
> > 
> > On Tue,  9 Apr 2013 21:48:30 +0200, Beno?t Th?baudeau
> > <benoit.thebaudeau@advansee.com> wrote:
> > 
> > > From: Fabio Estevam <fabio.estevam@freescale.com>
> > > 
> > > Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT option so that other NAND
> > > controller
> > > drivers could use it when a 16-bit NAND is deployed.
> > > 
> > > drivers/mtd/nand/ndfc has CONFIG_SYS_NDFC_16BIT, so just rename it, so that
> > > other NAND drivers could reuse the same symbol.
> > > 
> > > Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> > > Acked-by: Scott Wood <scottwood@freescale.com>
> > > Reviewed-by: Beno?t Th?baudeau <benoit.thebaudeau@advansee.com>
> > > ---
> > 
> > Whole series applied to u-boot-arm/master, thanks!
> 
> Thanks, but you have applied the bundle from my branch instead of the series
> from the mailing list, so all commit messages are crippled with patman stuff,
> my SoB is missing, and 01 and 02/30 do not have Fabio set as the author. Is it
> possible to fix this?

Argh! Fixing this ASAP.

> Best regards,
> Beno?t

Amicalement,
-- 
Albert.

^ permalink raw reply	[flat|nested] 40+ messages in thread

end of thread, other threads:[~2013-04-10 22:14 UTC | newest]

Thread overview: 40+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-04-09 19:48 [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 02/30] mtd: nand: mxc_nand: Fix is_16bit_nand() Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 03/30] nand: mxc: Prepare to add support for i.MX5 Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 04/30] nand: mxc: Add " Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 05/30] imx: mx5: lowlevel_init: Simplify code Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 06/30] imx: mx53ard: Add support for NAND Flash Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 07/30] nand: mxc: Fix debug trace in mxc_nand_read_oob_syndrome() Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 08/30] nand: mxc: Use appropriate page number in syndrome functions Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 09/30] arm: start.S: Fix _TEXT_BASE for SPL Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 10/30] arm: relocate_code() is no longer noreturn Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 11/30] arm1136: Remove redundant relocate_code() return Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 12/30] arm: relocate_code(): Remove useless relocation offset computation Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 13/30] arm: relocate_code(): Use __image_copy_end for end of relocation Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 14/30] arm: crt0.S: Remove bogus .globl Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 15/30] autoconfig.mk: Make it possible to define configs from other configs Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 16/30] Makefile: Change CONFIG_SPL_PAD_TO to image offset Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 17/30] imx: Fix automatic make targets for imx images Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 18/30] nand: mxc: Switch NAND SPL to generic SPL Benoît Thébaudeau
2013-04-09 20:17   ` Albert ARIBAUD
2013-04-09 20:57     ` Benoît Thébaudeau
2013-04-09 21:02       ` Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 19/30] arm926ejs: Remove deprecated and now unused NAND SPL Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 20/30] arm: Remove unused relocate_code() parameters Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 21/30] Makefile: Move SHELL setup to config.mk Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 22/30] .gitignore: Add /SPL Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 23/30] imx: Add u-boot-with-spl.imx make target Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 24/30] imx: Add u-boot-with-nand-spl.imx " Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 25/30] arm: Remove support for smdk6400 Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 26/30] Revert "mkconfig: start deprecating Makefile config targets" Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 27/30] arm: Remove support for unused s3c64xx Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 28/30] arm: Remove deprecated and now unused NAND SPL Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 29/30] arm1176: Remove unused MMU setup from start.S Benoît Thébaudeau
2013-04-09 19:48 ` [U-Boot] [PATCH v11 30/30] arm: Make all linker scripts compatible with per-symbol sections Benoît Thébaudeau
2013-04-09 20:00 ` [U-Boot] [PATCH v11 01/30] mtd: nand: Introduce CONFIG_SYS_NAND_BUSWIDTH_16BIT Benoît Thébaudeau
2013-04-10  8:24 ` Albert ARIBAUD
2013-04-10 20:43 ` Albert ARIBAUD
2013-04-10 21:26   ` Benoît Thébaudeau
2013-04-10 21:34     ` Fabio Estevam
2013-04-10 22:14       ` Albert ARIBAUD
2013-04-10 21:55     ` Albert ARIBAUD

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox