From: Sean Anderson <seanga2@gmail.com>
To: u-boot@lists.denx.de
Subject: [PATCH 5/6] riscv: Update Kendryte device tree for new CLINT driver
Date: Thu, 23 Jul 2020 07:56:25 -0400 [thread overview]
Message-ID: <35322194-e704-e3ae-2028-c70517153ea8@gmail.com> (raw)
In-Reply-To: <BN8PR13MB26116A4709C916FCFBAF230499760@BN8PR13MB2611.namprd13.prod.outlook.com>
On 7/23/20 7:49 AM, Sagar Kadam wrote:
> Hello Sean,
>
>> -----Original Message-----
>> From: U-Boot <u-boot-bounces@lists.denx.de> On Behalf Of Sean Anderson
>> Sent: Wednesday, July 22, 2020 9:21 PM
>> To: u-boot at lists.denx.de
>> Cc: Bin Meng <bmeng.cn@gmail.com>; Rick Chen <rickchen36@gmail.com>;
>> Sean Anderson <seanga2@gmail.com>
>> Subject: [PATCH 5/6] riscv: Update Kendryte device tree for new CLINT driver
>>
>> [External Email] Do not click links or attachments unless you recognize the
>> sender and know the content is safe
>>
>> AFAIK because the K210 clock driver does not come up until after
>> relocation, the clint will always use the clock-frequency parameter.
>> Ideally, it should update itself after relocation to take into account the
>> actual CPU frequency.
>>
>> Signed-off-by: Sean Anderson <seanga2@gmail.com>
>> ---
>>
>> arch/riscv/dts/k210.dtsi | 10 ++++++----
>> drivers/clk/kendryte/clk.c | 4 ++++
>> include/dt-bindings/clock/k210-sysctl.h | 1 +
>
> Can you please consider splitting the dt-bindings include into separate patch
> so as to avoid checkpatch warning.
If you'd like. AFAIK this is mostly a kernel thing since dt-bindings
often have separate maintainers than the rest of the series. Can anyone
comment on whether this applies to U-Boot as well?
--Sean
next prev parent reply other threads:[~2020-07-23 11:56 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-22 15:51 [PATCH 0/6] riscv: Clean up timer drivers Sean Anderson
2020-07-22 15:51 ` [PATCH 1/6] riscv: Rework riscv timer driver to only support S-mode Sean Anderson
2020-07-28 9:11 ` Rick Chen
2020-07-28 9:27 ` Sean Anderson
2020-07-22 15:51 ` [PATCH 2/6] riscv: Rework Andes PLMT as a UCLASS_TIMER driver Sean Anderson
2020-07-23 13:51 ` Bin Meng
2020-07-23 13:54 ` Sean Anderson
2020-07-22 15:51 ` [PATCH 3/6] riscv: Clean up initialization in Andes PLIC Sean Anderson
2020-07-22 15:51 ` [PATCH 4/6] riscv: Rework Sifive CLINT as UCLASS_TIMER driver Sean Anderson
2020-07-22 15:51 ` [PATCH 5/6] riscv: Update Kendryte device tree for new CLINT driver Sean Anderson
2020-07-23 11:49 ` Sagar Kadam
2020-07-23 11:56 ` Sean Anderson [this message]
2020-07-23 13:49 ` Bin Meng
2020-07-23 13:59 ` Sean Anderson
2020-07-24 4:22 ` Sagar Kadam
2020-07-22 15:51 ` [PATCH 6/6] riscv: Update SiFive " Sean Anderson
2020-07-23 13:50 ` Bin Meng
2020-07-23 13:57 ` Sean Anderson
2020-07-23 14:22 ` Pragnesh Patel
2020-07-23 14:47 ` Bin Meng
2020-07-23 14:52 ` Sean Anderson
2020-07-23 16:51 ` Sagar Kadam
2020-07-23 20:27 ` Sean Anderson
2020-07-24 8:03 ` Sagar Kadam
2020-07-24 1:46 ` Bin Meng
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