[U-Boot] [PATCH 3/5] arm1176/cpu: Align cache flushing addresses to cacheline size

Stephen Warren
2015-07-11T05:21:59Z

On 07/04/2015 03:48 AM, Alexander Stein wrote:
> cache flushing addresses must be cacheline size aligned, so mask the
> start and stop address appropriately.

As mentioned elsewhere, NAK.