From mboxrd@z Thu Jan 1 00:00:00 1970 From: Steven Scholz Date: Wed, 02 Jul 2003 13:36:07 +0200 Subject: [U-Boot-Users] U-Boot and MPC857T? References: <20030701164936.4E12CC592A@atlas.denx.de> <3F027D68.70606@imc-berlin.de> <20030702112527.GE2988@softing.com> Message-ID: <3F02C3A7.9000405@imc-berlin.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Gunnar, > ... > I also thought to that, but it is not so easy, because of at least the > following Macros showed below. > > We have our board with a MPC855T 50 MHz and two prototypes with a MPC857T 100 > MHz. The CPU-Clock cannot be detected automatically. We need at > least the following differences: > > #elif defined(CONFIG_100MHz) /* for 100 MHz = "50 MHz" |= SCCR_EBDF01 */ > #define CFG_SCCR (SCCR_TBS | SCCR_EBDF01 | \ > SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \ > SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \ > SCCR_RTSEL | SCCR_DFALCD00) > #define CFG_PLPRCR ( (4-1)< #define CONFIG_8xx_GCLK_FREQ 100000000 > #else /* up to 50 MHz we use a 1:1 clock (CLKOUT=GCLK2) */ > #define CFG_SCCR (SCCR_TBS | \ > SCCR_COM00 | SCCR_DFSYNC00 | SCCR_DFBRG00 | \ > SCCR_DFNL000 | SCCR_DFNH000 | SCCR_DFLCD000 | \ > SCCR_RTSEL | SCCR_DFALCD00) > #define CFG_PLPRCR ( (2-1)< #define CONFIG_8xx_GCLK_FREQ 50000000 > #endif /* CONFIG_...MHz */ Ehm... I don't understand. The code above only depends on CONFIG_100MHz and not some CONFIG_MPC855T! Of course you have to compile for a specific clock frequency. But it shouldn't matter if it's a 855T or a 857T! That's why I thought the FW (compiled for one specific clock) should be able to detect the processor typ... Steven