[U-Boot-Users] SDRAM and DRAM mapping on FADS

[li_aaaa at tom.com <li_aaaa@tom.com>]

Hello, I am porting u-boot 1.0 to MPC862ADS board with MPC862P processor. The user manual says the board is compatible with MPC8xxFADS for SW point of view. The board has 8M SDRAM and additional 32M EDO DRAM (or 16M) will be inserted.
According to the fads.c file, SDRAM is physically mapped at address 0 and DRAM immediately follows SDRAM, i.e. DRAM is mapped at 0x800000. So the BR2/OR2, BR3/OR3 are initialized as follows:

16 Mbyte DRAM uses only CS2:
	memctl->memc_or2 = 0xff000800;	
	memctl->memc_br2 = 0x00800081;	

32 Mbyte DRAM uses both CS3 and CS2:
	memctl->memc_or3 = 0xff000800;	
	memctl->memc_br3 = 0x01800081;
	memctl->memc_or2 = 0xff000800;	
	memctl->memc_br2 = 0x00800081;	

With these settings, bank 2 is mapped to 0x00000000~0x00ffffff, bank 3 is mapped to 0x01800000~0x01ffffff. This is not the desired mapping. The desired mapping is:  0x00800000~(0x01800000-1) => bank2, 0x01800000~(0x02800000-1) => bank3. But I don't think we can get this mapping by setting BR/OR2 and BR3/OR3 with appropriate values. So I think DRAM should be mapped at address 0 and SDRAM follows if the DRAM size is 16MB or 32MB. 

Is my understanding correct?

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