Re: [PATCH 1/2] board: phytec: am62a7: Add PHYTEC phyCORE-AM62A7 SoM

Garrett Giordano
2024-11-19T00:23:04Z

Hey Bryan,

On 11/18/24 11:32, Bryan Brattlof wrote:

> On November 15, 2024 thus sayeth Garrett Giordano:
>> Add support for PHYTEC phyCORE-AM62A7 SoM.
>>
>> Supported features:
>> - 2GB LPDDR4 RAM
>> - eMMC
>> - External SD
>> - Ethernet
>> - debug UART
>>
>> Signed-off-by: Garrett Giordano<ggiordano@phytec.com>
> Looks Good!
>
> Reviewed-by: Bryan Brattlof<bb@ti.com>
>
> ...
>
>> diff --git a/arch/arm/dts/k3-am62a-phycore-som-ddr4-2gb.dtsi
>> b/arch/arm/dts/k3-am62a-phycore-som-ddr4-2gb.dtsi
>> new file mode 100644
>> index 00000000000..00330b43fed
>> --- /dev/null
>> +++ b/arch/arm/dts/k3-am62a-phycore-som-ddr4-2gb.dtsi
>> @@ -0,0 +1,2798 @@
>> +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
>> +/*
>> + * This file was generated with the
>> + * AM62Ax SysConfig DDR Subsystem Register Configuration Tool v0.09.08
>> + * Fri Mar 24 2024 11:56:13 GMT-0700 (Pacific Daylight Time)
>> + * DDR Type: LPDDR4
>> + * F0 = 50MHz F1 = NA F2 = 1866MHz
>> + * Density (per channel): 8Gb
>> + * Number of Ranks: 1
>> + */
> You may want to regenerate this config if you guys see any stability
> issues. We've had some improvements in our chip select timings which are
> included in the v0.10.2 EMIF tool's output.
>
> ~Bryan

Thanks for the info!

We can start testing the new timings in our climate chamber. For now we
will stick with these timings, as they have been tested and verified to be
working.

I will pick up your Reviewed-by in my v2.

Regards,
Garrett