Re: [PATCH v2 3/4] spi: Add Microchip PolarFire SoC QSPI driver

[<Padmarao.Begari@microchip.com>]

On Sat, 2022-10-22 at 12:46 +0100, Conor Dooley wrote:
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> 
> On Fri, Oct 21, 2022 at 12:29:21PM +0530, Padmarao Begari wrote:
> > Add QSPI driver code for the Microchip PolarFire SoC.
> > This driver supports the QSPI standard, dual and quad
> > mode interfaces.
> > 
> > Co-developed-by: Naga Sureshkumar Relli <
> > nagasuresh.relli@microchip.com>
> > Signed-off-by: Naga Sureshkumar Relli <
> > nagasuresh.relli@microchip.com>
> > Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com>
> > ---
> >  drivers/spi/Kconfig              |   6 +
> >  drivers/spi/Makefile             |   1 +
> >  drivers/spi/microchip_coreqspi.c | 505
> > +++++++++++++++++++++++++++++++
> >  3 files changed, 512 insertions(+)
> >  create mode 100644 drivers/spi/microchip_coreqspi.c
> > 
> > +/* QSPI ready time out value */
> > +#define TIMEOUT_MS             (1000 * 60)
> 
> Hey Padmarao, just zipping through and cross referencing against the
> linux driver.. Why's this a 60 * 1000 when linux times out after 500
> ms?
Ok, will update as per Linux time out(500ms)

Regards
Padmarao
> Other than that, things look identical modulo the required interrupt
> and
> clocking changes for U-Boot.
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> 
> Thanks,
> Conor.
>