* [PATCH 1/4] arm: bcmbca: add bcm63146 SoC support
2022-08-06 1:33 [PATCH 0/4] arm: bcmbca: add basic support for more Broadcom BCA SoCs William Zhang
@ 2022-08-06 1:34 ` William Zhang
2022-08-09 3:24 ` Florian Fainelli
2022-10-31 14:45 ` Tom Rini
2022-08-06 1:34 ` [PATCH 2/4] arm: bcmbca: add bcm4912 " William Zhang
` (3 subsequent siblings)
4 siblings, 2 replies; 12+ messages in thread
From: William Zhang @ 2022-08-06 1:34 UTC (permalink / raw)
To: U-Boot Mailing List
Cc: kursad.oney, dan.beygelman, f.fainelli, joel.peshkin,
philippe.reynes, rafal, anand.gore, William Zhang, Andre Przywara,
Christian Hewitt, Fabio Estevam, Samuel Holland, Simon Glass,
Tom Rini, Tomer Yacoby, Ying-Chun Liu (PaulLiu)
[-- Attachment #1: Type: text/plain, Size: 10271 bytes --]
BCM63146 is a Broadcom B53 based DSL Broadband SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
MAINTAINERS | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/bcm63146.dtsi | 110 ++++++++++++++++++++++
arch/arm/dts/bcm963146.dts | 30 ++++++
arch/arm/mach-bcmbca/Kconfig | 8 ++
arch/arm/mach-bcmbca/Makefile | 1 +
arch/arm/mach-bcmbca/bcm63146/Kconfig | 17 ++++
arch/arm/mach-bcmbca/bcm63146/Makefile | 5 +
arch/arm/mach-bcmbca/bcm63146/mmu_table.c | 32 +++++++
board/broadcom/bcmbca/Kconfig | 7 ++
configs/bcm963146_defconfig | 23 +++++
include/configs/bcm963146.h | 11 +++
12 files changed, 247 insertions(+)
create mode 100644 arch/arm/dts/bcm63146.dtsi
create mode 100644 arch/arm/dts/bcm963146.dts
create mode 100644 arch/arm/mach-bcmbca/bcm63146/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm63146/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm63146/mmu_table.c
create mode 100644 configs/bcm963146_defconfig
create mode 100644 include/configs/bcm963146.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 2a27d15705cb..9a4751153524 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -220,6 +220,7 @@ F: drivers/timer/bcmbca-timer.c
N: bcmbca
N: bcm[9]?47622
N: bcm[9]?63138
+N: bcm[9]?63146
N: bcm[9]?63148
N: bcm[9]?63178
N: bcm[9]?6756
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f4fa6f517744..f0615aba4960 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1167,6 +1167,8 @@ dtb-$(CONFIG_BCM47622) += \
bcm947622.dtb
dtb-$(CONFIG_BCM63138) += \
bcm963138.dtb
+dtb-$(CONFIG_BCM63146) += \
+ bcm963146.dtb
dtb-$(CONFIG_BCM63148) += \
bcm963148.dtb
dtb-$(CONFIG_BCM63178) += \
diff --git a/arch/arm/dts/bcm63146.dtsi b/arch/arm/dts/bcm63146.dtsi
new file mode 100644
index 000000000000..04de96bd0a03
--- /dev/null
+++ b/arch/arm/dts/bcm63146.dtsi
@@ -0,0 +1,110 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm63146", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/dts/bcm963146.dts b/arch/arm/dts/bcm963146.dts
new file mode 100644
index 000000000000..e39f1e6d4774
--- /dev/null
+++ b/arch/arm/dts/bcm963146.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm63146.dtsi"
+
+/ {
+ model = "Broadcom BCM963146 Reference Board";
+ compatible = "brcm,bcm963146", "brcm,bcm63146", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index 785b3df5dcc2..932fa19df810 100644
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -20,6 +20,13 @@ config BCM63138
select DM_SERIAL
select BCM6345_SERIAL
+config BCM63146
+ bool "Support for Broadcom 63146 Family"
+ select ARM64
+ select SYS_ARCH_TIMER
+ select DM_SERIAL
+ select PL01X_SERIAL
+
config BCM63148
bool "Support for Broadcom 63148 Family"
select SYS_ARCH_TIMER
@@ -57,6 +64,7 @@ config BCM6878
source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
source "arch/arm/mach-bcmbca/bcm63138/Kconfig"
+source "arch/arm/mach-bcmbca/bcm63146/Kconfig"
source "arch/arm/mach-bcmbca/bcm63148/Kconfig"
source "arch/arm/mach-bcmbca/bcm63178/Kconfig"
source "arch/arm/mach-bcmbca/bcm6756/Kconfig"
diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index d917615c1669..e177b6298b24 100644
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -5,6 +5,7 @@
obj-$(CONFIG_BCM47622) += bcm47622/
obj-$(CONFIG_BCM63138) += bcm63138/
+obj-$(CONFIG_BCM63146) += bcm63146/
obj-$(CONFIG_BCM63148) += bcm63148/
obj-$(CONFIG_BCM63178) += bcm63178/
obj-$(CONFIG_BCM6756) += bcm6756/
diff --git a/arch/arm/mach-bcmbca/bcm63146/Kconfig b/arch/arm/mach-bcmbca/bcm63146/Kconfig
new file mode 100644
index 000000000000..690cbf1eb20a
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm63146/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM63146
+
+config TARGET_BCM963146
+ bool "Broadcom 63146 Reference Board"
+ depends on ARCH_BCMBCA
+
+config SYS_SOC
+ default "bcm63146"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif
diff --git a/arch/arm/mach-bcmbca/bcm63146/Makefile b/arch/arm/mach-bcmbca/bcm63146/Makefile
new file mode 100644
index 000000000000..62624977034b
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm63146/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj-y += mmu_table.o
diff --git a/arch/arm/mach-bcmbca/bcm63146/mmu_table.c b/arch/arm/mach-bcmbca/bcm63146/mmu_table.c
new file mode 100644
index 000000000000..c6b7a54fbdfa
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm63146/mmu_table.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <linux/sizes.h>
+
+static struct mm_region bcm963146_mem_map[] = {
+ {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 1UL * SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ },
+ {
+ /* SoC peripheral */
+ .virt = 0xff800000UL,
+ .phys = 0xff800000UL,
+ .size = 0x100000,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ },
+ {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = bcm963146_mem_map;
diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index aefd7372d883..6beb1417348d 100644
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -23,6 +23,13 @@ config SYS_CONFIG_NAME
endif
+if TARGET_BCM963146
+
+config SYS_CONFIG_NAME
+ default "bcm963146"
+
+endif
+
if TARGET_BCM963148
config SYS_CONFIG_NAME
diff --git a/configs/bcm963146_defconfig b/configs/bcm963146_defconfig
new file mode 100644
index 000000000000..4dcc0fd7b1ee
--- /dev/null
+++ b/configs/bcm963146_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=50000000
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM63146=y
+CONFIG_TARGET_BCM963146=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="bcm963146"
+CONFIG_IDENT_STRING=" Broadcom BCM63146"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y
diff --git a/include/configs/bcm963146.h b/include/configs/bcm963146.h
new file mode 100644
index 000000000000..edbdfc3c51ad
--- /dev/null
+++ b/include/configs/bcm963146.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM963146_H
+#define __BCM963146_H
+
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+
+#endif
--
2.37.1
[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 4212 bytes --]
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 1/4] arm: bcmbca: add bcm63146 SoC support
2022-08-06 1:34 ` [PATCH 1/4] arm: bcmbca: add bcm63146 SoC support William Zhang
@ 2022-08-09 3:24 ` Florian Fainelli
2022-10-31 14:45 ` Tom Rini
1 sibling, 0 replies; 12+ messages in thread
From: Florian Fainelli @ 2022-08-09 3:24 UTC (permalink / raw)
To: William Zhang, U-Boot Mailing List
Cc: kursad.oney, dan.beygelman, joel.peshkin, philippe.reynes, rafal,
anand.gore, Andre Przywara, Christian Hewitt, Fabio Estevam,
Samuel Holland, Simon Glass, Tom Rini, Tomer Yacoby,
Ying-Chun Liu (PaulLiu)
On 8/5/2022 6:34 PM, William Zhang wrote:
> BCM63146 is a Broadcom B53 based DSL Broadband SoC. It is part of the
> BCA (Broadband Carrier Access origin) chipset family so it's added under
> ARCH_BCMBCA platform. This initial support includes a bare-bone
> implementation and dts with CPU subsystem, memory and ARM PL011 uart.
>
> This SoC is supported in the linux-next git repository so the dts and
> dtsi files are copied from linux.
>
> The u-boot image can be loaded from flash or network to the entry point
> address in the memory and boot from there to the console.
>
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
> ---
[snip]
> +#include <common.h>
> +#include <asm/armv8/mmu.h>
> +#include <linux/sizes.h>
> +
> +static struct mm_region bcm963146_mem_map[] = {
> + {
> + .virt = 0x00000000UL,
> + .phys = 0x00000000UL,
> + .size = 1UL * SZ_1G,
> + .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
> + PTE_BLOCK_INNER_SHARE
> + },
> + {
Should you create a mapping for the AXI bus portion at PA 0x81000000
just so it is already in place for when you might need it?
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 1/4] arm: bcmbca: add bcm63146 SoC support
2022-08-06 1:34 ` [PATCH 1/4] arm: bcmbca: add bcm63146 SoC support William Zhang
2022-08-09 3:24 ` Florian Fainelli
@ 2022-10-31 14:45 ` Tom Rini
1 sibling, 0 replies; 12+ messages in thread
From: Tom Rini @ 2022-10-31 14:45 UTC (permalink / raw)
To: William Zhang
Cc: U-Boot Mailing List, kursad.oney, dan.beygelman, f.fainelli,
joel.peshkin, philippe.reynes, rafal, anand.gore, Andre Przywara,
Christian Hewitt, Fabio Estevam, Samuel Holland, Simon Glass,
Tomer Yacoby, Ying-Chun Liu (PaulLiu)
[-- Attachment #1: Type: text/plain, Size: 795 bytes --]
On Fri, Aug 05, 2022 at 06:34:00PM -0700, William Zhang wrote:
> BCM63146 is a Broadcom B53 based DSL Broadband SoC. It is part of the
> BCA (Broadband Carrier Access origin) chipset family so it's added under
> ARCH_BCMBCA platform. This initial support includes a bare-bone
> implementation and dts with CPU subsystem, memory and ARM PL011 uart.
>
> This SoC is supported in the linux-next git repository so the dts and
> dtsi files are copied from linux.
>
> The u-boot image can be loaded from flash or network to the entry point
> address in the memory and boot from there to the console.
>
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
For the series, applied to u-boot/master, thanks!
--
Tom
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 659 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 2/4] arm: bcmbca: add bcm4912 SoC support
2022-08-06 1:33 [PATCH 0/4] arm: bcmbca: add basic support for more Broadcom BCA SoCs William Zhang
2022-08-06 1:34 ` [PATCH 1/4] arm: bcmbca: add bcm63146 SoC support William Zhang
@ 2022-08-06 1:34 ` William Zhang
2022-08-09 3:25 ` Florian Fainelli
2022-08-06 1:34 ` [PATCH 3/4] arm: bcmbca: add bcm6813 " William Zhang
` (2 subsequent siblings)
4 siblings, 1 reply; 12+ messages in thread
From: William Zhang @ 2022-08-06 1:34 UTC (permalink / raw)
To: U-Boot Mailing List
Cc: kursad.oney, dan.beygelman, f.fainelli, joel.peshkin,
philippe.reynes, rafal, anand.gore, William Zhang, Andre Przywara,
Christian Hewitt, Fabio Estevam, Samuel Holland, Simon Glass,
Tom Rini, Tomer Yacoby, Ying-Chun Liu (PaulLiu)
[-- Attachment #1: Type: text/plain, Size: 10572 bytes --]
BCM4912 is a Broadcom B53 based WLAN AP router SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added under
ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and ARM PL011 uart.
This SoC is supported in the linux-next git repository so the dts
and dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry
point address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
MAINTAINERS | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/bcm4912.dtsi | 128 +++++++++++++++++++++++
arch/arm/dts/bcm94912.dts | 30 ++++++
arch/arm/mach-bcmbca/Kconfig | 8 ++
arch/arm/mach-bcmbca/Makefile | 1 +
arch/arm/mach-bcmbca/bcm4912/Kconfig | 17 +++
arch/arm/mach-bcmbca/bcm4912/Makefile | 5 +
arch/arm/mach-bcmbca/bcm4912/mmu_table.c | 32 ++++++
board/broadcom/bcmbca/Kconfig | 7 ++
configs/bcm94912_defconfig | 23 ++++
include/configs/bcm94912.h | 11 ++
12 files changed, 265 insertions(+)
create mode 100644 arch/arm/dts/bcm4912.dtsi
create mode 100644 arch/arm/dts/bcm94912.dts
create mode 100644 arch/arm/mach-bcmbca/bcm4912/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm4912/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm4912/mmu_table.c
create mode 100644 configs/bcm94912_defconfig
create mode 100644 include/configs/bcm94912.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 9a4751153524..65a6b1b21e77 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -219,6 +219,7 @@ F: board/broadcom/bcmbca/
F: drivers/timer/bcmbca-timer.c
N: bcmbca
N: bcm[9]?47622
+N: bcm[9]?4912
N: bcm[9]?63138
N: bcm[9]?63146
N: bcm[9]?63148
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index f0615aba4960..74442b30f4d7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1165,6 +1165,8 @@ dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
dtb-$(CONFIG_BCM47622) += \
bcm947622.dtb
+dtb-$(CONFIG_BCM4912) += \
+ bcm94912.dtb
dtb-$(CONFIG_BCM63138) += \
bcm963138.dtb
dtb-$(CONFIG_BCM63146) += \
diff --git a/arch/arm/dts/bcm4912.dtsi b/arch/arm/dts/bcm4912.dtsi
new file mode 100644
index 000000000000..3d016c2ce675
--- /dev/null
+++ b/arch/arm/dts/bcm4912.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm4912", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/dts/bcm94912.dts b/arch/arm/dts/bcm94912.dts
new file mode 100644
index 000000000000..a3623e6f6919
--- /dev/null
+++ b/arch/arm/dts/bcm94912.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm4912.dtsi"
+
+/ {
+ model = "Broadcom BCM94912 Reference Board";
+ compatible = "brcm,bcm94912", "brcm,bcm4912", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index 932fa19df810..acdb6defd8bf 100644
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -12,6 +12,13 @@ config BCM47622
select DM_SERIAL
select PL01X_SERIAL
+config BCM4912
+ bool "Support for Broadcom 4912 Family"
+ select ARM64
+ select SYS_ARCH_TIMER
+ select DM_SERIAL
+ select PL01X_SERIAL
+
config BCM63138
bool "Support for Broadcom 63138 Family"
select TIMER
@@ -63,6 +70,7 @@ config BCM6878
select PL01X_SERIAL
source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
+source "arch/arm/mach-bcmbca/bcm4912/Kconfig"
source "arch/arm/mach-bcmbca/bcm63138/Kconfig"
source "arch/arm/mach-bcmbca/bcm63146/Kconfig"
source "arch/arm/mach-bcmbca/bcm63148/Kconfig"
diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index e177b6298b24..e9c96605b506 100644
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_BCM47622) += bcm47622/
+obj-$(CONFIG_BCM4912) += bcm4912/
obj-$(CONFIG_BCM63138) += bcm63138/
obj-$(CONFIG_BCM63146) += bcm63146/
obj-$(CONFIG_BCM63148) += bcm63148/
diff --git a/arch/arm/mach-bcmbca/bcm4912/Kconfig b/arch/arm/mach-bcmbca/bcm4912/Kconfig
new file mode 100644
index 000000000000..b8c14d1dc1a1
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4912/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM4912
+
+config TARGET_BCM94912
+ bool "Broadcom 4912 Reference Board"
+ depends on ARCH_BCMBCA
+
+config SYS_SOC
+ default "bcm4912"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif
diff --git a/arch/arm/mach-bcmbca/bcm4912/Makefile b/arch/arm/mach-bcmbca/bcm4912/Makefile
new file mode 100644
index 000000000000..62624977034b
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4912/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj-y += mmu_table.o
diff --git a/arch/arm/mach-bcmbca/bcm4912/mmu_table.c b/arch/arm/mach-bcmbca/bcm4912/mmu_table.c
new file mode 100644
index 000000000000..52a53a2c76d0
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4912/mmu_table.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <linux/sizes.h>
+
+static struct mm_region bcm94912_mem_map[] = {
+ {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 1UL * SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ },
+ {
+ /* SoC peripheral */
+ .virt = 0xff800000UL,
+ .phys = 0xff800000UL,
+ .size = 0x100000,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ },
+ {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = bcm94912_mem_map;
diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index 6beb1417348d..7bdd96b68f84 100644
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -16,6 +16,13 @@ config SYS_CONFIG_NAME
endif
+if TARGET_BCM94912
+
+config SYS_CONFIG_NAME
+ default "bcm94912"
+
+endif
+
if TARGET_BCM963138
config SYS_CONFIG_NAME
diff --git a/configs/bcm94912_defconfig b/configs/bcm94912_defconfig
new file mode 100644
index 000000000000..355f10a3aaba
--- /dev/null
+++ b/configs/bcm94912_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=50000000
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM4912=y
+CONFIG_TARGET_BCM94912=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="bcm94912"
+CONFIG_IDENT_STRING=" Broadcom BCM4912"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y
diff --git a/include/configs/bcm94912.h b/include/configs/bcm94912.h
new file mode 100644
index 000000000000..f3d17ddaacfb
--- /dev/null
+++ b/include/configs/bcm94912.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM94912_H
+#define __BCM94912_H
+
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+
+#endif
--
2.37.1
[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 4212 bytes --]
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 2/4] arm: bcmbca: add bcm4912 SoC support
2022-08-06 1:34 ` [PATCH 2/4] arm: bcmbca: add bcm4912 " William Zhang
@ 2022-08-09 3:25 ` Florian Fainelli
0 siblings, 0 replies; 12+ messages in thread
From: Florian Fainelli @ 2022-08-09 3:25 UTC (permalink / raw)
To: William Zhang, U-Boot Mailing List
Cc: kursad.oney, dan.beygelman, joel.peshkin, philippe.reynes, rafal,
anand.gore, Andre Przywara, Christian Hewitt, Fabio Estevam,
Samuel Holland, Simon Glass, Tom Rini, Tomer Yacoby,
Ying-Chun Liu (PaulLiu)
On 8/5/2022 6:34 PM, William Zhang wrote:
> BCM4912 is a Broadcom B53 based WLAN AP router SoC. It is part of the
> BCA (Broadband Carrier Access origin) chipset family so it's added under
> ARCH_BCMBCA platform. This initial support includes a bare-bone
> implementation and dts with CPU subsystem, memory and ARM PL011 uart.
>
> This SoC is supported in the linux-next git repository so the dts
> and dtsi files are copied from linux.
>
> The u-boot image can be loaded from flash or network to the entry
> point address in the memory and boot from there to the console.
>
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
Same question as in patch #1, but otherwise:
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 3/4] arm: bcmbca: add bcm6813 SoC support
2022-08-06 1:33 [PATCH 0/4] arm: bcmbca: add basic support for more Broadcom BCA SoCs William Zhang
2022-08-06 1:34 ` [PATCH 1/4] arm: bcmbca: add bcm63146 SoC support William Zhang
2022-08-06 1:34 ` [PATCH 2/4] arm: bcmbca: add bcm4912 " William Zhang
@ 2022-08-06 1:34 ` William Zhang
2022-08-09 3:27 ` Florian Fainelli
2022-08-06 1:34 ` [PATCH 4/4] arm: bcmbca: add bcm4908 " William Zhang
2022-08-09 3:29 ` [PATCH 0/4] arm: bcmbca: add basic support for more Broadcom BCA SoCs Florian Fainelli
4 siblings, 1 reply; 12+ messages in thread
From: William Zhang @ 2022-08-06 1:34 UTC (permalink / raw)
To: U-Boot Mailing List
Cc: kursad.oney, dan.beygelman, f.fainelli, joel.peshkin,
philippe.reynes, rafal, anand.gore, William Zhang, Andre Przywara,
Christian Hewitt, Fabio Estevam, Marek Vasut, Samuel Holland,
Simon Glass, Tom Rini, Tomer Yacoby, Ying-Chun Liu (PaulLiu)
[-- Attachment #1: Type: text/plain, Size: 10662 bytes --]
BCM6813 is a Broadcom B53 based PON and WLAN AP router SoC. It is part
of the BCA (Broadband Carrier Access origin) chipset family so it's
added under ARCH_BCMBCA platform. This initial support includes a
bare-bone implementation and dts with CPU subsystem, memory and ARM
PL011 uart.
This SoC is supported in the linux-next git repository so the dts and
dtsi files are copied from linux.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
MAINTAINERS | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/bcm6813.dtsi | 128 +++++++++++++++++++++++
arch/arm/dts/bcm96813.dts | 30 ++++++
arch/arm/mach-bcmbca/Kconfig | 8 ++
arch/arm/mach-bcmbca/Makefile | 1 +
arch/arm/mach-bcmbca/bcm6813/Kconfig | 17 +++
arch/arm/mach-bcmbca/bcm6813/Makefile | 5 +
arch/arm/mach-bcmbca/bcm6813/mmu_table.c | 32 ++++++
board/broadcom/bcmbca/Kconfig | 7 ++
configs/bcm96813_defconfig | 23 ++++
include/configs/bcm96813.h | 11 ++
12 files changed, 265 insertions(+)
create mode 100644 arch/arm/dts/bcm6813.dtsi
create mode 100644 arch/arm/dts/bcm96813.dts
create mode 100644 arch/arm/mach-bcmbca/bcm6813/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm6813/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm6813/mmu_table.c
create mode 100644 configs/bcm96813_defconfig
create mode 100644 include/configs/bcm96813.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 65a6b1b21e77..70e5cf3f5584 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -225,6 +225,7 @@ N: bcm[9]?63146
N: bcm[9]?63148
N: bcm[9]?63178
N: bcm[9]?6756
+N: bcm[9]?6813
N: bcm[9]?6846
N: bcm[9]?6878
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 74442b30f4d7..266bbc1f4386 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1177,6 +1177,8 @@ dtb-$(CONFIG_BCM63178) += \
bcm963178.dtb
dtb-$(CONFIG_BCM6756) += \
bcm96756.dtb
+dtb-$(CONFIG_BCM6813) += \
+ bcm96813.dtb
dtb-$(CONFIG_BCM6846) += \
bcm96846.dtb
dtb-$(CONFIG_BCM6878) += \
diff --git a/arch/arm/dts/bcm6813.dtsi b/arch/arm/dts/bcm6813.dtsi
new file mode 100644
index 000000000000..c3e6197be808
--- /dev/null
+++ b/arch/arm/dts/bcm6813.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm6813", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/dts/bcm96813.dts b/arch/arm/dts/bcm96813.dts
new file mode 100644
index 000000000000..af17091ae764
--- /dev/null
+++ b/arch/arm/dts/bcm96813.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6813.dtsi"
+
+/ {
+ model = "Broadcom BCM96813 Reference Board";
+ compatible = "brcm,bcm96813", "brcm,bcm6813", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index acdb6defd8bf..a7a3b4b57ceb 100644
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -55,6 +55,13 @@ config BCM6756
select DM_SERIAL
select PL01X_SERIAL
+config BCM6813
+ bool "Support for Broadcom 6813 Family"
+ select ARM64
+ select SYS_ARCH_TIMER
+ select DM_SERIAL
+ select PL01X_SERIAL
+
config BCM6846
bool "Support for Broadcom 6846 Family"
select SYS_ARCH_TIMER
@@ -76,6 +83,7 @@ source "arch/arm/mach-bcmbca/bcm63146/Kconfig"
source "arch/arm/mach-bcmbca/bcm63148/Kconfig"
source "arch/arm/mach-bcmbca/bcm63178/Kconfig"
source "arch/arm/mach-bcmbca/bcm6756/Kconfig"
+source "arch/arm/mach-bcmbca/bcm6813/Kconfig"
source "arch/arm/mach-bcmbca/bcm6846/Kconfig"
source "arch/arm/mach-bcmbca/bcm6878/Kconfig"
diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index e9c96605b506..a7bf5a616a2a 100644
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -10,5 +10,6 @@ obj-$(CONFIG_BCM63146) += bcm63146/
obj-$(CONFIG_BCM63148) += bcm63148/
obj-$(CONFIG_BCM63178) += bcm63178/
obj-$(CONFIG_BCM6756) += bcm6756/
+obj-$(CONFIG_BCM6813) += bcm6813/
obj-$(CONFIG_BCM6846) += bcm6846/
obj-$(CONFIG_BCM6878) += bcm6878/
diff --git a/arch/arm/mach-bcmbca/bcm6813/Kconfig b/arch/arm/mach-bcmbca/bcm6813/Kconfig
new file mode 100644
index 000000000000..25a4221bef9c
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6813/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM6813
+
+config TARGET_BCM96813
+ bool "Broadcom 6813 Reference Board"
+ depends on ARCH_BCMBCA
+
+config SYS_SOC
+ default "bcm6813"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif
diff --git a/arch/arm/mach-bcmbca/bcm6813/Makefile b/arch/arm/mach-bcmbca/bcm6813/Makefile
new file mode 100644
index 000000000000..62624977034b
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6813/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj-y += mmu_table.o
diff --git a/arch/arm/mach-bcmbca/bcm6813/mmu_table.c b/arch/arm/mach-bcmbca/bcm6813/mmu_table.c
new file mode 100644
index 000000000000..eb736bf7d508
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm6813/mmu_table.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <linux/sizes.h>
+
+static struct mm_region bcm96813_mem_map[] = {
+ {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 1UL * SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ },
+ {
+ /* SoC peripheral */
+ .virt = 0xff800000UL,
+ .phys = 0xff800000UL,
+ .size = 0x100000,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ },
+ {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = bcm96813_mem_map;
diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index 7bdd96b68f84..109e7a46c627 100644
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -58,6 +58,13 @@ config SYS_CONFIG_NAME
endif
+if TARGET_BCM96813
+
+config SYS_CONFIG_NAME
+ default "bcm96813"
+
+endif
+
if TARGET_BCM96846
config SYS_CONFIG_NAME
diff --git a/configs/bcm96813_defconfig b/configs/bcm96813_defconfig
new file mode 100644
index 000000000000..5d03624a29a3
--- /dev/null
+++ b/configs/bcm96813_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=50000000
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM6813=y
+CONFIG_TARGET_BCM96813=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="bcm96813"
+CONFIG_IDENT_STRING=" Broadcom BCM6813"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y
diff --git a/include/configs/bcm96813.h b/include/configs/bcm96813.h
new file mode 100644
index 000000000000..5d9e87b693a0
--- /dev/null
+++ b/include/configs/bcm96813.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM96813_H
+#define __BCM96813_H
+
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+
+#endif
--
2.37.1
[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 4212 bytes --]
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 3/4] arm: bcmbca: add bcm6813 SoC support
2022-08-06 1:34 ` [PATCH 3/4] arm: bcmbca: add bcm6813 " William Zhang
@ 2022-08-09 3:27 ` Florian Fainelli
0 siblings, 0 replies; 12+ messages in thread
From: Florian Fainelli @ 2022-08-09 3:27 UTC (permalink / raw)
To: William Zhang, U-Boot Mailing List
Cc: kursad.oney, dan.beygelman, joel.peshkin, philippe.reynes, rafal,
anand.gore, Andre Przywara, Christian Hewitt, Fabio Estevam,
Marek Vasut, Samuel Holland, Simon Glass, Tom Rini, Tomer Yacoby,
Ying-Chun Liu (PaulLiu)
On 8/5/2022 6:34 PM, William Zhang wrote:
> BCM6813 is a Broadcom B53 based PON and WLAN AP router SoC. It is part
> of the BCA (Broadband Carrier Access origin) chipset family so it's
> added under ARCH_BCMBCA platform. This initial support includes a
> bare-bone implementation and dts with CPU subsystem, memory and ARM
> PL011 uart.
>
> This SoC is supported in the linux-next git repository so the dts and
> dtsi files are copied from linux.
>
> The u-boot image can be loaded from flash or network to the entry point
> address in the memory and boot from there to the console.
>
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
> ---
>
> MAINTAINERS | 1 +
> arch/arm/dts/Makefile | 2 +
> arch/arm/dts/bcm6813.dtsi | 128 +++++++++++++++++++++++
> arch/arm/dts/bcm96813.dts | 30 ++++++
> arch/arm/mach-bcmbca/Kconfig | 8 ++
> arch/arm/mach-bcmbca/Makefile | 1 +
> arch/arm/mach-bcmbca/bcm6813/Kconfig | 17 +++
> arch/arm/mach-bcmbca/bcm6813/Makefile | 5 +
> arch/arm/mach-bcmbca/bcm6813/mmu_table.c | 32 ++++++
OK, so after seeing the same mmu_table.c 4 times, maybe we could share a
common implementation that is configurable enough, even if there may not
be any need for configuration other than the DRAM size.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH 4/4] arm: bcmbca: add bcm4908 SoC support
2022-08-06 1:33 [PATCH 0/4] arm: bcmbca: add basic support for more Broadcom BCA SoCs William Zhang
` (2 preceding siblings ...)
2022-08-06 1:34 ` [PATCH 3/4] arm: bcmbca: add bcm6813 " William Zhang
@ 2022-08-06 1:34 ` William Zhang
2022-08-09 3:27 ` Florian Fainelli
2022-08-09 3:29 ` [PATCH 0/4] arm: bcmbca: add basic support for more Broadcom BCA SoCs Florian Fainelli
4 siblings, 1 reply; 12+ messages in thread
From: William Zhang @ 2022-08-06 1:34 UTC (permalink / raw)
To: U-Boot Mailing List
Cc: kursad.oney, dan.beygelman, f.fainelli, joel.peshkin,
philippe.reynes, rafal, anand.gore, William Zhang, Andre Przywara,
Christian Hewitt, Fabio Estevam, Samuel Holland, Simon Glass,
Tom Rini, Tomer Yacoby, Ying-Chun Liu (PaulLiu)
[-- Attachment #1: Type: text/plain, Size: 10522 bytes --]
BCM4908 is a Broadcom B53 based WLAN AP router SoC. It is part of the
BCA (Broadband Carrier Access origin) chipset family so it's added
under ARCH_BCMBCA platform. This initial support includes a bare-bone
implementation and dts with CPU subsystem, memory and Broadcom uart.
This SoC is supported in the linux git repository so the dts and dtsi
files are stripped down version of linux copies with mininum blocks
needed by u-boot.
The u-boot image can be loaded from flash or network to the entry point
address in the memory and boot from there to the console.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
MAINTAINERS | 1 +
arch/arm/dts/Makefile | 2 +
arch/arm/dts/bcm4908.dtsi | 127 +++++++++++++++++++++++
arch/arm/dts/bcm94908.dts | 30 ++++++
arch/arm/mach-bcmbca/Kconfig | 8 ++
arch/arm/mach-bcmbca/Makefile | 1 +
arch/arm/mach-bcmbca/bcm4908/Kconfig | 17 +++
arch/arm/mach-bcmbca/bcm4908/Makefile | 5 +
arch/arm/mach-bcmbca/bcm4908/mmu_table.c | 32 ++++++
board/broadcom/bcmbca/Kconfig | 7 ++
configs/bcm94908_defconfig | 23 ++++
include/configs/bcm94908.h | 11 ++
12 files changed, 264 insertions(+)
create mode 100644 arch/arm/dts/bcm4908.dtsi
create mode 100644 arch/arm/dts/bcm94908.dts
create mode 100644 arch/arm/mach-bcmbca/bcm4908/Kconfig
create mode 100644 arch/arm/mach-bcmbca/bcm4908/Makefile
create mode 100644 arch/arm/mach-bcmbca/bcm4908/mmu_table.c
create mode 100644 configs/bcm94908_defconfig
create mode 100644 include/configs/bcm94908.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 70e5cf3f5584..3f250942ced1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -219,6 +219,7 @@ F: board/broadcom/bcmbca/
F: drivers/timer/bcmbca-timer.c
N: bcmbca
N: bcm[9]?47622
+N: bcm[9]?4908
N: bcm[9]?4912
N: bcm[9]?63138
N: bcm[9]?63146
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 266bbc1f4386..9a6582d9c1c8 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1165,6 +1165,8 @@ dtb-$(CONFIG_ARCH_BCMSTB) += bcm7xxx.dtb
dtb-$(CONFIG_BCM47622) += \
bcm947622.dtb
+dtb-$(CONFIG_BCM4908) += \
+ bcm94908.dtb
dtb-$(CONFIG_BCM4912) += \
bcm94912.dtb
dtb-$(CONFIG_BCM63138) += \
diff --git a/arch/arm/dts/bcm4908.dtsi b/arch/arm/dts/bcm4908.dtsi
new file mode 100644
index 000000000000..0be5cfeeffa9
--- /dev/null
+++ b/arch/arm/dts/bcm4908.dtsi
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/dts-v1/;
+
+/ {
+ compatible = "brcm,bcm4908", "brcm,bcmbca";
+
+ interrupt-parent = <&gic>;
+
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x0>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x1>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu2: cpu@2 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x2>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu3: cpu@3 {
+ device_type = "cpu";
+ compatible = "brcm,brahma-b53";
+ reg = <0x3>;
+ enable-method = "spin-table";
+ cpu-release-addr = <0x0 0xfff8>;
+ next-level-cache = <&l2>;
+ };
+
+ l2: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00 0x00 0x81000000 0x4000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ #address-cells = <0>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>;
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ };
+
+ clocks {
+ periph_clk: periph_clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <50000000>;
+ clock-output-names = "periph";
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x00 0x00 0xff800000 0x3000>;
+
+ uart0: serial@640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x18>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "refclk";
+ status = "disabled";
+ };
+
+ };
+};
diff --git a/arch/arm/dts/bcm94908.dts b/arch/arm/dts/bcm94908.dts
new file mode 100644
index 000000000000..fcbd3c430ace
--- /dev/null
+++ b/arch/arm/dts/bcm94908.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm4908.dtsi"
+
+/ {
+ model = "Broadcom BCM94908 Reference Board";
+ compatible = "brcm,bcm94908", "brcm,bcm4908", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
diff --git a/arch/arm/mach-bcmbca/Kconfig b/arch/arm/mach-bcmbca/Kconfig
index a7a3b4b57ceb..eb03ef42b8d2 100644
--- a/arch/arm/mach-bcmbca/Kconfig
+++ b/arch/arm/mach-bcmbca/Kconfig
@@ -12,6 +12,13 @@ config BCM47622
select DM_SERIAL
select PL01X_SERIAL
+config BCM4908
+ bool "Support for Broadcom 4908 Family"
+ select ARM64
+ select SYS_ARCH_TIMER
+ select DM_SERIAL
+ select BCM6345_SERIAL
+
config BCM4912
bool "Support for Broadcom 4912 Family"
select ARM64
@@ -77,6 +84,7 @@ config BCM6878
select PL01X_SERIAL
source "arch/arm/mach-bcmbca/bcm47622/Kconfig"
+source "arch/arm/mach-bcmbca/bcm4908/Kconfig"
source "arch/arm/mach-bcmbca/bcm4912/Kconfig"
source "arch/arm/mach-bcmbca/bcm63138/Kconfig"
source "arch/arm/mach-bcmbca/bcm63146/Kconfig"
diff --git a/arch/arm/mach-bcmbca/Makefile b/arch/arm/mach-bcmbca/Makefile
index a7bf5a616a2a..c8c344ba7271 100644
--- a/arch/arm/mach-bcmbca/Makefile
+++ b/arch/arm/mach-bcmbca/Makefile
@@ -4,6 +4,7 @@
#
obj-$(CONFIG_BCM47622) += bcm47622/
+obj-$(CONFIG_BCM4908) += bcm4908/
obj-$(CONFIG_BCM4912) += bcm4912/
obj-$(CONFIG_BCM63138) += bcm63138/
obj-$(CONFIG_BCM63146) += bcm63146/
diff --git a/arch/arm/mach-bcmbca/bcm4908/Kconfig b/arch/arm/mach-bcmbca/bcm4908/Kconfig
new file mode 100644
index 000000000000..564bc8d2d664
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4908/Kconfig
@@ -0,0 +1,17 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+
+if BCM4908
+
+config TARGET_BCM94908
+ bool "Broadcom 4908 Reference Board"
+ depends on ARCH_BCMBCA
+
+config SYS_SOC
+ default "bcm4908"
+
+source "board/broadcom/bcmbca/Kconfig"
+
+endif
diff --git a/arch/arm/mach-bcmbca/bcm4908/Makefile b/arch/arm/mach-bcmbca/bcm4908/Makefile
new file mode 100644
index 000000000000..62624977034b
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4908/Makefile
@@ -0,0 +1,5 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2022 Broadcom Ltd
+#
+obj-y += mmu_table.o
diff --git a/arch/arm/mach-bcmbca/bcm4908/mmu_table.c b/arch/arm/mach-bcmbca/bcm4908/mmu_table.c
new file mode 100644
index 000000000000..5ab04083cc6c
--- /dev/null
+++ b/arch/arm/mach-bcmbca/bcm4908/mmu_table.c
@@ -0,0 +1,32 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+#include <common.h>
+#include <asm/armv8/mmu.h>
+#include <linux/sizes.h>
+
+static struct mm_region bcm94908_mem_map[] = {
+ {
+ .virt = 0x00000000UL,
+ .phys = 0x00000000UL,
+ .size = 1UL * SZ_1G,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
+ PTE_BLOCK_INNER_SHARE
+ },
+ {
+ /* SoC peripheral */
+ .virt = 0xff800000UL,
+ .phys = 0xff800000UL,
+ .size = 0x100000,
+ .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
+ PTE_BLOCK_NON_SHARE |
+ PTE_BLOCK_PXN | PTE_BLOCK_UXN
+ },
+ {
+ /* List terminator */
+ 0,
+ }
+};
+
+struct mm_region *mem_map = bcm94908_mem_map;
diff --git a/board/broadcom/bcmbca/Kconfig b/board/broadcom/bcmbca/Kconfig
index 109e7a46c627..c9155fb48e0a 100644
--- a/board/broadcom/bcmbca/Kconfig
+++ b/board/broadcom/bcmbca/Kconfig
@@ -16,6 +16,13 @@ config SYS_CONFIG_NAME
endif
+if TARGET_BCM94908
+
+config SYS_CONFIG_NAME
+ default "bcm94908"
+
+endif
+
if TARGET_BCM94912
config SYS_CONFIG_NAME
diff --git a/configs/bcm94908_defconfig b/configs/bcm94908_defconfig
new file mode 100644
index 000000000000..6dfb8825ca3c
--- /dev/null
+++ b/configs/bcm94908_defconfig
@@ -0,0 +1,23 @@
+CONFIG_ARM=y
+CONFIG_COUNTER_FREQUENCY=50000000
+CONFIG_ARCH_BCMBCA=y
+CONFIG_SYS_TEXT_BASE=0x01000000
+CONFIG_SYS_MALLOC_LEN=0x2000000
+CONFIG_SYS_MALLOC_F_LEN=0x8000
+CONFIG_BCM4908=y
+CONFIG_TARGET_BCM94908=y
+CONFIG_NR_DRAM_BANKS=2
+CONFIG_DEFAULT_DEVICE_TREE="bcm94908"
+CONFIG_IDENT_STRING=" Broadcom BCM4908"
+CONFIG_SYS_LOAD_ADDR=0x01000000
+CONFIG_ENV_VARS_UBOOT_CONFIG=y
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000
+CONFIG_OF_STDOUT_VIA_ALIAS=y
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_MAXARGS=64
+CONFIG_SYS_BOOTM_LEN=0x4000000
+CONFIG_CMD_CACHE=y
+CONFIG_OF_EMBED=y
+CONFIG_CLK=y
diff --git a/include/configs/bcm94908.h b/include/configs/bcm94908.h
new file mode 100644
index 000000000000..1346ace4bf6c
--- /dev/null
+++ b/include/configs/bcm94908.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2022 Broadcom Ltd.
+ */
+
+#ifndef __BCM94908_H
+#define __BCM94908_H
+
+#define CONFIG_SYS_SDRAM_BASE 0x00000000
+
+#endif
--
2.37.1
[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 4212 bytes --]
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH 4/4] arm: bcmbca: add bcm4908 SoC support
2022-08-06 1:34 ` [PATCH 4/4] arm: bcmbca: add bcm4908 " William Zhang
@ 2022-08-09 3:27 ` Florian Fainelli
0 siblings, 0 replies; 12+ messages in thread
From: Florian Fainelli @ 2022-08-09 3:27 UTC (permalink / raw)
To: William Zhang, U-Boot Mailing List
Cc: kursad.oney, dan.beygelman, joel.peshkin, philippe.reynes, rafal,
anand.gore, Andre Przywara, Christian Hewitt, Fabio Estevam,
Samuel Holland, Simon Glass, Tom Rini, Tomer Yacoby,
Ying-Chun Liu (PaulLiu)
On 8/5/2022 6:34 PM, William Zhang wrote:
> BCM4908 is a Broadcom B53 based WLAN AP router SoC. It is part of the
> BCA (Broadband Carrier Access origin) chipset family so it's added
> under ARCH_BCMBCA platform. This initial support includes a bare-bone
> implementation and dts with CPU subsystem, memory and Broadcom uart.
>
> This SoC is supported in the linux git repository so the dts and dtsi
> files are stripped down version of linux copies with mininum blocks
> needed by u-boot.
>
> The u-boot image can be loaded from flash or network to the entry point
> address in the memory and boot from there to the console.
>
> Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
--
Florian
^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH 0/4] arm: bcmbca: add basic support for more Broadcom BCA SoCs
2022-08-06 1:33 [PATCH 0/4] arm: bcmbca: add basic support for more Broadcom BCA SoCs William Zhang
` (3 preceding siblings ...)
2022-08-06 1:34 ` [PATCH 4/4] arm: bcmbca: add bcm4908 " William Zhang
@ 2022-08-09 3:29 ` Florian Fainelli
2022-08-09 5:51 ` William Zhang
4 siblings, 1 reply; 12+ messages in thread
From: Florian Fainelli @ 2022-08-09 3:29 UTC (permalink / raw)
To: William Zhang, U-Boot Mailing List
Cc: kursad.oney, dan.beygelman, joel.peshkin, philippe.reynes, rafal,
anand.gore, Andre Przywara, Christian Hewitt, Fabio Estevam,
Marek Vasut, Samuel Holland, Simon Glass, Tom Rini, Tomer Yacoby,
Ying-Chun Liu (PaulLiu)
On 8/5/2022 6:33 PM, William Zhang wrote:
> Broadcom BCA (Broadband Carrier Access origin) chipset family includes
> DSL, PON and WLAN access point and gateway SoC. Now that the ARCH_BCMBCA
> architecture and its first SoC BCM47622 are supported in u-boot 2022.07,
> this patch series add the basic support for following BCA chips under
> ARCH_BCMBCA: BCM4908, BCM4912, BCM63146 and BCM6813.
>
> This patch series applies on top of the my previous patch [1].
>
> [1] https://lists.denx.de/pipermail/u-boot/2022-August/491060.html
Looks good to me, thanks William! On the mmu_table.c implementation
maybe just a few nits:
- should not we do an early parsing of the memory node for the given
board(s) to ensure that we map no more than the amount of available DRAM?
- the exact same file is currently being re-used, so it would make sense
to make it a common object
- you could create a memory mapping for the AXI bus region right away to
avoid forgetting about it later if you start bringing up drivers that
make use of that peripheral region
Thanks!
--
Florian
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH 0/4] arm: bcmbca: add basic support for more Broadcom BCA SoCs
2022-08-09 3:29 ` [PATCH 0/4] arm: bcmbca: add basic support for more Broadcom BCA SoCs Florian Fainelli
@ 2022-08-09 5:51 ` William Zhang
0 siblings, 0 replies; 12+ messages in thread
From: William Zhang @ 2022-08-09 5:51 UTC (permalink / raw)
To: Florian Fainelli, U-Boot Mailing List
Cc: kursad.oney, dan.beygelman, joel.peshkin, philippe.reynes, rafal,
anand.gore, Andre Przywara, Christian Hewitt, Fabio Estevam,
Marek Vasut, Samuel Holland, Simon Glass, Tom Rini, Tomer Yacoby,
Ying-Chun Liu (PaulLiu)
[-- Attachment #1: Type: text/plain, Size: 1925 bytes --]
Hi Florian,
Thanks for the review! Please see my comments inline blow,
On 08/08/2022 08:29 PM, Florian Fainelli wrote:
>
>
> On 8/5/2022 6:33 PM, William Zhang wrote:
>> Broadcom BCA (Broadband Carrier Access origin) chipset family includes
>> DSL, PON and WLAN access point and gateway SoC. Now that the ARCH_BCMBCA
>> architecture and its first SoC BCM47622 are supported in u-boot 2022.07,
>> this patch series add the basic support for following BCA chips under
>> ARCH_BCMBCA: BCM4908, BCM4912, BCM63146 and BCM6813.
>>
>> This patch series applies on top of the my previous patch [1].
>>
>> [1] https://lists.denx.de/pipermail/u-boot/2022-August/491060.html
>
> Looks good to me, thanks William! On the mmu_table.c implementation
> maybe just a few nits:
>
> - should not we do an early parsing of the memory node for the given
> board(s) to ensure that we map no more than the amount of available DRAM?
>
Yes there will be a patch after all these SoC patches to set the ddr
size during the dram_init based on the actually memory size.
> - the exact same file is currently being re-used, so it would make sense
> to make it a common object
For these initial soc support patches, I just include the ddr and
periph block and they happen to be the same range. But different SoC has
different ip block address as we add more more blocks/drivers late. To
avoid many ifdef, I would prefer to have one file per chip.
>
> - you could create a memory mapping for the AXI bus region right away to
> avoid forgetting about it later if you start bringing up drivers that
> make use of that peripheral region
>
Yeah I could but we won't forget either because system will crash if we
miss that entry in the mmu table. IMHO it is better to limit the access
than opening a wide range that we don't use. We can catch
invalid/unintended access by only allowing the regions that we need to
access.
> Thanks!
[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 4212 bytes --]
^ permalink raw reply [flat|nested] 12+ messages in thread