From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2448BC636CC for ; Tue, 7 Feb 2023 14:51:49 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A743185DB6; Tue, 7 Feb 2023 15:51:46 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="AsuB5XMc"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id A31D585DB1; Tue, 7 Feb 2023 15:51:44 +0100 (CET) Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 1E45585DCD for ; Tue, 7 Feb 2023 15:51:40 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=jbx6244@gmail.com Received: by mail-ej1-x633.google.com with SMTP id ml19so43908050ejb.0 for ; Tue, 07 Feb 2023 06:51:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=gndaDfnyxn9fJ+0sROblt8iuBpPjRbav0anjmr840vU=; b=AsuB5XMcpS2qQLWB8ZZuJuCtr9R8JRQw9QITCiu3p5BOZN1fNrffaDIehABoQZMIX5 RDlZgVZUUEStnxW8uQkvInYdHlxLcEiSbg4zMyIIbbJp/5l52yHPiANO3x01TUjhdUbA mzF71twBHiX5O+lL7aMSU3J7B7Noi35yd4aM5UZD4R8t1TZgGXiECL17MNLfAb9bqjOW fTudFSNoHhSF0vu+cV3VjcWRK5D9MTcGcWv+A+J8Ti/U297EZotQOeg/iel9LP0hL9Lf W3Z4bkqljaKjsac3CIzl1wg3BbL52C5zlfMqFnWAvo9OULlIMbF/6TRcTxqDBazXRmMM aTRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:subject:from:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=gndaDfnyxn9fJ+0sROblt8iuBpPjRbav0anjmr840vU=; b=qlWiEChGp77IPbwl6fkd1FfL/HmVcxG/MfHIHr7BAV57SILeAh/orBjoUvX1eaSzec kJ/Dqq6cJ35dp0FICOIUvpXLPXuO2GVb4ibgsgppNg/sS2iDAAo3mtS80VF025VasnTv KgFZ2Iv/p+p4d146QZHNpZbloaWBrCL1pqjq5+ZZMpky2vd+m/zeyeF9rKEfSX6Qa0sj yglOd13m+TPkQ+Rc0qB92X6iVB0UNvu2BuWf0Xotti43z5raheRc1NvItGSdo3PwQcI5 bUZ7uoEKyhyFkOSAH8Tg06jxR8NjcEF839eLbLjwRlb4Co6TBuBKzQtJTKYTf66HabqM +tcQ== X-Gm-Message-State: AO0yUKXTZNNHdhpOpKIZfGHSrb62fK6rytfOPmvKYwgSfuLe1Ji70kkB 2EppvAJhaxv2bSdqMy+36UM= X-Google-Smtp-Source: AK7set/TNQj0MjEVvX23sBMxaaaMML6YuME2KwbT8pMpZKLkcuRylGp6NYJj9X1c8bVYEt51FDAgBw== X-Received: by 2002:a17:906:b2cc:b0:878:5917:601 with SMTP id cf12-20020a170906b2cc00b0087859170601mr3724899ejb.58.1675781499792; Tue, 07 Feb 2023 06:51:39 -0800 (PST) Received: from [192.168.2.1] (81-204-249-205.fixed.kpn.net. [81.204.249.205]) by smtp.gmail.com with ESMTPSA id z20-20020a1709060ad400b0085d6bfc6201sm6964159ejf.86.2023.02.07.06.51.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 07 Feb 2023 06:51:39 -0800 (PST) Message-ID: <3f13e54f-1d0e-e71c-3433-23de01e85c7d@gmail.com> Date: Tue, 7 Feb 2023 15:51:38 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.3.0 From: Johan Jonker Subject: [PATCH v2 01/10] include: fdtdec: decouple fdt_addr_t and phys_addr_t size To: dario.binacchi@amarulasolutions.com, michael@amarulasolutions.com, sjg@chromium.org Cc: philipp.tomsich@vrull.eu, kever.yang@rock-chips.com, u-boot@lists.denx.de, yifeng.zhao@rock-chips.com References: <241e9e7b-58d6-dfa5-fcb5-5660e6402021@gmail.com> Content-Language: en-US In-Reply-To: <241e9e7b-58d6-dfa5-fcb5-5660e6402021@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean The DT specification supports CPUs with both 32-bit and 64-bit addressing capabilities. In U-boot the fdt_addr_t and phys_addr_t size are coupled by a typedef. The MTD NAND drivers for 32-bit CPU's can describe partitions with a 64-bit reg property. These partitions synced from Linux end up with the wrong offset and sizes when only the lower 32-bit is passed. Decouple the fdt_addr_t and phys_addr_t size as they don't necessary match. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass --- Changed V2: reword --- Note: Most drivers still assume that FDT and CPU capabilities are identical. In order to use these variables a cast is needed. --- Kconfig | 8 ++++++++ include/fdtdec.h | 13 +++++++++---- 2 files changed, 17 insertions(+), 4 deletions(-) diff --git a/Kconfig b/Kconfig index a75cce7e..7697dade 100644 --- a/Kconfig +++ b/Kconfig @@ -422,11 +422,19 @@ endif # EXPERT config PHYS_64BIT bool "64bit physical address support" + select FDT_64BIT help Say Y here to support 64bit physical memory address. This can be used not only for 64bit SoCs, but also for large physical address extension on 32bit SoCs. +config FDT_64BIT + bool "64bit fdt address support" + help + Say Y here to support 64bit fdt addresses. + This can be used not only for 64bit SoCs, but also + for large address extensions on 32bit SoCs. + config HAS_ROM bool select BINMAN diff --git a/include/fdtdec.h b/include/fdtdec.h index 12355afd..af29ac0c 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -18,15 +18,18 @@ #include /* - * A typedef for a physical address. Note that fdt data is always big + * Support for 64bit fdt addresses. + * This can be used not only for 64bit SoCs, but also + * for large address extensions on 32bit SoCs. + * Note that fdt data is always big * endian even on a litle endian machine. */ -typedef phys_addr_t fdt_addr_t; -typedef phys_size_t fdt_size_t; #define FDT_SIZE_T_NONE (-1U) -#ifdef CONFIG_PHYS_64BIT +#ifdef CONFIG_FDT_64BIT +typedef u64 fdt_addr_t; +typedef u64 fdt_size_t; #define FDT_ADDR_T_NONE ((ulong)(-1)) #define fdt_addr_to_cpu(reg) be64_to_cpu(reg) @@ -35,6 +38,8 @@ typedef phys_size_t fdt_size_t; #define cpu_to_fdt_size(reg) cpu_to_be64(reg) typedef fdt64_t fdt_val_t; #else +typedef u32 fdt_addr_t; +typedef u32 fdt_size_t; #define FDT_ADDR_T_NONE (-1U) #define fdt_addr_to_cpu(reg) be32_to_cpu(reg) -- 2.20.1