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* [U-Boot-Users] AMD Mirror Bit Write Buffer Programing algorythm troubles
@ 2004-01-30 18:17 Conn Clark
  2004-01-30 18:34 ` Wolfgang Denk
  0 siblings, 1 reply; 3+ messages in thread
From: Conn Clark @ 2004-01-30 18:17 UTC (permalink / raw)
  To: u-boot

Hello all,

	I'm having troubles with an AMD Mirror Bit Write Buffer Programing 
algorythm I have written for U-Boot. I'm hoping that someone can provide 
some insight to the problem. We are using an Am29LV320MB part and 
according to the data sheet I am doing everything correctly (at least I 
think I am ). So if someone could confirm my code is valid or wrong I 
would appreciate it.

	I am having troubles with the flash part decraring it has timed out. It 
does complete the first buffer programing sequence and all programed 
data is valid. If I force it to continue only the first buffer write to 
each sector is programed.

	My problems may be due to a bad chip. This is a prototype and we had 
some issues with the power supply that may have dammaged the chip. I 
doubt this because our Jtag debugger programs this part in write buffer 
mode just fine.

Below is the two functions of intrest and I have attached the full 
flash.c file.

/************* Begin code *****************/

#ifdef  WRITE_BUFFER_PROG
int write_buffer_program(flash_info_t *info, ulong dest, char *src);
#endif

/*-----------------------------------------------------------------------
  * Copy memory to flash, returns:
  * 0 - OK
  * 1 - write timeout
  * 2 - Flash not erased
  */

int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
	ulong cp, wp, data;
	int i, l, rc;

	wp = (addr & ~3);	/* get lower word aligned address */

	/*
	 * handle unaligned start bytes
	 */
	if ((l = addr - wp) != 0) {
		data = 0;
		for (i=0, cp=wp; i<l; ++i, ++cp) {
			data = (data << 8) | (*(uchar *)cp);
		}
		for (; i<4 && cnt>0; ++i) {
			data = (data << 8) | *src++;
			--cnt;
			++cp;
		}
		for (; cnt==0 && i<4; ++i, ++cp) {
			data = (data << 8) | (*(uchar *)cp);
		}

		if ((rc = write_word(info, wp, data)) != 0) {
			return (rc);
		}
		wp += 4;
	}

	/*
	 * handle word aligned part
	 */
	while (cnt >= 4) {
#ifdef  WRITE_BUFFER_PROG
	  if((cnt>=32)& !(wp & 0x1F)) {    /* if destination is aligned on 32 
byte boundry use write burst */
		if ((rc = write_buffer_program(info,wp,src)) != 0) {
			return (rc);
		}
		wp  += 32;
		src += 32;
		cnt -= 32;
           } else
#endif
           {
		data = 0;
		for (i=0; i<4; ++i) {
			data = (data << 8) | *src++;
		}
		if ((rc = write_word(info, wp, data)) != 0) {
			return (rc);
		}
		wp  += 4;
		cnt -= 4;
	  }
	}

	if (cnt == 0) {
		return (0);
	}

	/*
	 * handle unaligned tail bytes
	 */
	data = 0;
	for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) {
		data = (data << 8) | *src++;
		--cnt;
	}
	for (; i<4; ++i, ++cp) {
		data = (data << 8) | (*(uchar *)cp);
	}

	return (write_word(info, wp, data));
}


#ifdef  WRITE_BUFFER_PROG
/*-----------------------------------------------------------------------
  * Write a bunch of word to Flash, returns:
  * 0 - OK
  * 1 - write timeout
  * 2 - Flash not erased
  * 3 - write buffer abort
  */
int write_buffer_program(flash_info_t *info, ulong dest, char *src)
{
	volatile CFG_FLASH_WORD_SIZE *target_sector;
	volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE 
*)(info->start[0]);
	volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *)dest;
	volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *)src;
CFG_FLASH_WORD_SIZE progstat;
         ulong start;
	int flag;
	int i,j;
	j=info->sector_count -1;
	/*find sector start address to program*/
	while(info->start[j] > dest) j--;

	target_sector = (CFG_FLASH_WORD_SIZE *)(info->start[j]);
	/* Check if Flash is (sufficiently) erased */
/*	if ((*dest2 & *data2) != *data2) {
		return (2);
	} */

         /* Disable interrupts which might cause a timeout here */
	flag = disable_interrupts();
	addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
	addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
	target_sector[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00250025; /* 
write to buffer command */
	/*write count of words to buffer minus 1 */
	target_sector[CFG_FLASH_ADDR0] = (32/sizeof(CFG_FLASH_WORD_SIZE)) - 1 ;
	/*write first word */
/*	dest2[0] = data2[0]; */
         /* write the rest */
         i=0;
	do
	  {
	    dest2[i] = data2[i];
             i++;
	  }while(i<(32/sizeof(CFG_FLASH_WORD_SIZE)));
	/*write buffer command */
	target_sector[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00290029;
	    /* re-enable interrupts if necessary */
             if (flag)
	      enable_interrupts();
	    /* data polling for D7 */
            i--;  /* decrement index to point to last word written */
	    start = get_timer (0);

	    while( ((progstat=dest2[i]) & (CFG_FLASH_WORD_SIZE)0x00800080) !=
		/*check for chip time out or abort*/
		   (data2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) ){
               if(progstat & (CFG_FLASH_WORD_SIZE)0x00220022) {
		if(progstat & (CFG_FLASH_WORD_SIZE)0x00200020){   /*check for chip 
time out*/
		/* return success if it really did work */
		    if( (dest2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) ==
			   (data2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) ) return 0;
                     data2[i] = (CFG_FLASH_WORD_SIZE)0x00F000F0;   /* 
reset flash chip */
printf("TimeOut\n"); /* for debugging only, remove */
                     return 1;
                    }
		/* return success if it really did work */
		if( (dest2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) ==
		   (data2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) ) return 0;
		/* if your here it is an abort condition */
		addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA;
		addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055;
		addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00F000F0;  /* Write 
buffer abort reset */
printf("abort\n");  /* for debugging only, remove */
		return 3;
                 }
	      if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
		return (1);    /* U-Boot timer time out */
	      }
	    }
  return (0);

}

#endif /*  WRITE_BUFFER_PROG   */


/*********** End code *********/


Thanks

	Conn Clark
-- 

*****************************************************************
   If you live at home long enough, your parents will move out.
  (Warning they may try to sell their house out from under you.)
*****************************************************************

Conn Clark
Engineering Stooge				clark at esteem.com
Electronic Systems Technology Inc.		www.esteem.com

Stock Ticker Symbol				ELST

"clark at esteem.com" Copyright 2000 By Electronic Systems Technology
  This email address may be used to communicate to Conn Clark
  provided it is not being used for advertisement purposes, unless
  prior written consent is given. This email address may not be
  sold under any circumstances. All other rights reserved.
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^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot-Users] AMD Mirror Bit Write Buffer Programing algorythm troubles
  2004-01-30 18:17 [U-Boot-Users] AMD Mirror Bit Write Buffer Programing algorythm troubles Conn Clark
@ 2004-01-30 18:34 ` Wolfgang Denk
  2004-01-30 21:00   ` Conn Clark
  0 siblings, 1 reply; 3+ messages in thread
From: Wolfgang Denk @ 2004-01-30 18:34 UTC (permalink / raw)
  To: u-boot

In message <401A9FA4.7020803@esteem.com> you wrote:
> 
> 	I'm having troubles with an AMD Mirror Bit Write Buffer Programing 
> algorythm I have written for U-Boot. I'm hoping that someone can provide 
> some insight to the problem. We are using an Am29LV320MB part and 
> according to the data sheet I am doing everything correctly (at least I 
> think I am ). So if someone could confirm my code is valid or wrong I 
> would appreciate it.

See our recent changes to the LWMON flash driver for reference.

Best regards,

Wolfgang Denk

-- 
See us @ Embedded World, Nuremberg, Feb 17 - 19,  Hall 12.0 Booth 440
Phone: (+49)-8142-4596-87  Fax: (+49)-8142-4596-88  Email: wd at denx.de
Only two things are infinite,  the universe and human stupidity,  and
I'm not sure about the former.                     -- Albert Einstein

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot-Users] AMD Mirror Bit Write Buffer Programing algorythm troubles
  2004-01-30 18:34 ` Wolfgang Denk
@ 2004-01-30 21:00   ` Conn Clark
  0 siblings, 0 replies; 3+ messages in thread
From: Conn Clark @ 2004-01-30 21:00 UTC (permalink / raw)
  To: u-boot

Wolfgang Denk wrote:
> In message <401A9FA4.7020803@esteem.com> you wrote:
> 
>>	I'm having troubles with an AMD Mirror Bit Write Buffer Programing 
>>algorythm I have written for U-Boot. I'm hoping that someone can provide 
>>some insight to the problem. We are using an Am29LV320MB part and 
>>according to the data sheet I am doing everything correctly (at least I 
>>think I am ). So if someone could confirm my code is valid or wrong I 
>>would appreciate it.
> 
> 
> See our recent changes to the LWMON flash driver for reference.
> 
> Best regards,
> 
> Wolfgang Denk
> 

     Unfortunately this code is for an intel chip which is signifigantly 
simpler to program . This code does show me how I can optimize things a 
little more but unfortunatly offers no insight as to why my code is failing.

     I realize that asking someone to dig through a datasheet to verify 
my code is asking alot and do not expect them to do so. I was hoping 
someone has tackled this task with an AMD chip before and had a solution 
they are willing to share, or could point out the flaw in my code.


Thanks for the effort,

-- Conn Clark


*****************************************************************
   If you live at home long enough, your parents will move out.
  (Warning they may try to sell their house out from under you.)
*****************************************************************

Conn Clark
Engineering Stooge				clark at esteem.com
Electronic Systems Technology Inc.		www.esteem.com

Stock Ticker Symbol				ELST

"clark at esteem.com" Copyright 2000 By Electronic Systems Technology
  This email address may be used to communicate to Conn Clark
  provided it is not being used for advertisement purposes, unless
  prior written consent is given. This email address may not be
  sold under any circumstances. All other rights reserved.

^ permalink raw reply	[flat|nested] 3+ messages in thread

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2004-01-30 18:34 ` Wolfgang Denk
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