From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mark Jonas Date: Tue, 13 Apr 2004 12:30:42 +0200 Subject: [U-Boot-Users] [PATCH] MPC5200: Remove CSBOOT / CS0 configuration from start.S Message-ID: <407BC152.1060308@motorola.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hello, the attached patch fixes the problem that the current start.S for MPC5200 contains code to initialize CSBOOT / CS0 timing, bus width and other configuration. lis r3, 0x00047800 at h ori r3, r3, 0x00047800 at l stw r3, 0x300(r4) /* set timing, CS0/boot conf reg */ Right now that only works because all U-Boot supported MPC5200 boards are very Lite5200 (aka IceCube 5200) like. Once there is a board which's Flash is is connected in 24 bits address, 8 bits data, non-multiplexed mode this will break. Additionally, the patch removes enabling of the IPBI wait states. This is not needed because IP bus is not configured to run with > 66 MHz in U-Boot and if needed this should be done always and not only when performing a low boot. Interesting enough U-Boot already has a solution for setting tuned CS0 timings. This is done using the CFG_BOOTCS_CFG define which is applied in cpu/mpc5xxx/cpu_init.c. Regards Mark Jonas -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: icecube_no_cs0_config.log Url: http://lists.denx.de/pipermail/u-boot/attachments/20040413/6e67a7f4/attachment.txt -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: icecube_no_cs0_config.stat Url: http://lists.denx.de/pipermail/u-boot/attachments/20040413/6e67a7f4/attachment-0001.txt -------------- next part -------------- A non-text attachment was scrubbed... Name: icecube_no_cs0_config.patch.gz Type: application/gzip Size: 728 bytes Desc: not available Url : http://lists.denx.de/pipermail/u-boot/attachments/20040413/6e67a7f4/attachment.bin