From mboxrd@z Thu Jan 1 00:00:00 1970 From: Steven Scholz Date: Sun, 13 Mar 2005 17:00:29 +0100 Subject: [U-Boot-Users] Bug in AT91RM9200: icache not enabled! In-Reply-To: <20050313151724.99D12C1510@atlas.denx.de> References: <20050313151724.99D12C1510@atlas.denx.de> Message-ID: <4234639D.9090607@imc-berlin.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi, >>while finding out why the loading of my FPGA takes so long with the latest CVS >>version of U-Boot I noticed that the icache for the AT91RM9200 is not enabled >>although icache_enable() is called in cpu/at91rm9200/start.S: >>Please comment on this. I am willing to sent appropriate patches. > > Please send a patch so I can test how it works. * Patch by Steven Scholz, 13 March 2005: fix cache enabling for AT91RM9200 Please remove the line orr r0, r0, #0x00000004 @ set bit 3 (C) D-Cache if we don't need the data cache for the AT91RM9200. I am not sure if they will help for CRCs or unzipping... -- Steven -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: at91rm9200_cache.patch Url: http://lists.denx.de/pipermail/u-boot/attachments/20050313/31a53518/attachment.txt