From: Steven Scholz <steven.scholz@imc-berlin.de>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] Bug in AT91RM9200: icache not enabled!
Date: Mon, 14 Mar 2005 09:23:45 +0100 [thread overview]
Message-ID: <42354A11.3030005@imc-berlin.de> (raw)
In-Reply-To: <20050313183912.510DBC1C5A@atlas.denx.de>
Morning,
>>* Patch by Steven Scholz, 13 March 2005:
>> fix cache enabling for AT91RM9200
>
> Seems to work fine for me.
:o)
>>Please remove the line
>>
>> orr r0, r0, #0x00000004 @ set bit 3 (C) D-Cache
>>
>>if we don't need the data cache for the AT91RM9200. I am not sure if they will
>>help for CRCs or unzipping...
>
> I don't see any obvious effect with or without this line regarding
> time needed for CRC or unzip. Why should we remove it?
Cause this bit is not set by arm920t/start.S either. Maybe for some reason?
Anyway, why has DCACHE no effect on CRC? It should though.
--
Steven
next prev parent reply other threads:[~2005-03-14 8:23 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20050313151724.99D12C1510@atlas.denx.de>
2005-03-13 16:00 ` [U-Boot-Users] Bug in AT91RM9200: icache not enabled! Steven Scholz
2005-03-13 18:39 ` Wolfgang Denk
2005-03-14 8:23 ` Steven Scholz [this message]
2005-03-30 7:19 Paugam Luc
2005-03-30 8:56 ` Wolfgang Denk
-- strict thread matches above, loose matches on Subject: below --
2005-03-13 14:03 Steven Scholz
2005-03-13 15:40 ` Steven Scholz
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