From mboxrd@z Thu Jan  1 00:00:00 1970
From: Steven Scholz <steven.scholz@imc-berlin.de>
Date: Mon, 14 Mar 2005 09:23:45 +0100
Subject: [U-Boot-Users] Bug in AT91RM9200: icache not enabled!
In-Reply-To: <20050313183912.510DBC1C5A@atlas.denx.de>
References: <20050313183912.510DBC1C5A@atlas.denx.de>
Message-ID: <42354A11.3030005@imc-berlin.de>
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To: u-boot@lists.denx.de

Morning,

>>* Patch by Steven Scholz, 13 March 2005:
>>   fix cache enabling for AT91RM9200
> 
> Seems to work fine for me.

:o)

>>Please remove the line
>>
>>	orr     r0, r0, #0x00000004     @ set bit 3 (C) D-Cache
>>
>>if we don't need the data cache for the AT91RM9200. I am not sure if they will 
>>help for CRCs or unzipping...
> 
> I don't see any obvious effect with or without  this  line  regarding
> time needed for CRC or unzip. Why should we remove it?

Cause this bit is not set by arm920t/start.S either. Maybe for some reason?

Anyway, why has DCACHE no effect on CRC? It should though.

--
Steven