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From: Pantelis Antoniou <panto@intracom.gr>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] struct NS16550 {...} __attribute__ ((packed)) at ns16550.h
Date: Mon, 25 Apr 2005 18:18:36 +0300	[thread overview]
Message-ID: <426D0A4C.5000105@intracom.gr> (raw)
In-Reply-To: <20050425145653.E9CCDC1510@atlas.denx.de>

Wolfgang Denk wrote:
> In message <001501c5499f$f5364750$1780a8c0@art> you wrote:
> 
>>>If this is really true, then there is either bug in GCC or in the code.
>>>If I code a 32 bit access the compiler must not use any other accesses.
>>
>>If you use __attribute__ ((packed)), you are telling the compiler you have
>>an unaligned data structure (e.g. longs not by-4 aligned).  Therefore, GCC
>>will always reassemble the 32-bit value from byte accesses.
> 
> 
> You are wrong, with both of your statements.
> 
> -> cat foo.c
> struct foo {
>         unsigned long foo1;
>         unsigned long foo2;
>         unsigned long foo3;
> } __attribute__ ((packed));
> 
> unsigned long dummy (struct foo *p)
> {
>         return (p->foo1 + p->foo2 + p->foo3);
> }
> 
> 
> Test 1: PowerPC:
> 
> -> ppc_8xx-gcc -O -S foo.c
> -> cat foo.s
> ...
> dummy:
>         mr 9,3
>         lwz 3,0(3)
>         lwz 0,4(9)
>         add 3,3,0
>         lwz 0,8(9)
>         add 3,3,0
>         blr
> 
> 
> Test 2: MIPS:
> 
> -> mips_4KC-gcc -O -S foo.c
> -> cat foo.s
> ...
> dummy:
>         .frame  $sp,0,$31               # vars= 0, regs= 0/0, args= 0, extra= 0
>         .mask   0x00000000,0
>         .fmask  0x00000000,0
>         .set    noreorder
>         .cpload $25
>         .set    reorder
>         ulw     $2,0($4)
>         ulw     $3,4($4)
>         #nop
>         addu    $2,$2,$3
>         ulw     $3,8($4)
>         .set    noreorder
>         .set    nomacro
>         j       $31
>         addu    $2,$2,$3
>         .set    macro
>         .set    reorder
> 
> 
> As you can see, GCC alway uses plain word accesses (32 bit).
> 
> 
> 

Not on ARM it does not.

> 
> Best regards,
> 
> Wolfgang Denk
> 

Both PPC & MIPS can do proper unalligned load/stores (or fault to
an exception).

ARM (silently) does the wrong thing i.e. masks out the lower 2 bits.

So gcc on ARM generates byte load/stores.

Regards

Pantelis

  reply	other threads:[~2005-04-25 15:18 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-04-22 14:57 [U-Boot-Users] struct NS16550 {...} __attribute__ ((packed)) at ns16550.h Woojung.Huh at smsc.com
2005-04-22 18:39 ` Wolfgang Denk
2005-04-25  7:44   ` Jean-Paul Saman
2005-04-25  8:20     ` Wolfgang Denk
2005-04-25 14:06       ` Arthur Shipkowski
2005-04-25 14:56         ` Wolfgang Denk
2005-04-25 15:18           ` Pantelis Antoniou [this message]
2005-04-25 19:43             ` Wolfgang Denk
2005-04-25 20:15               ` Arthur Shipkowski
2005-04-25 20:59                 ` Wolfgang Denk
2005-04-26  6:23               ` Pantelis Antoniou
2005-04-26  7:21                 ` Wolfgang Denk
2005-04-26 14:32                   ` Cory Tusar
  -- strict thread matches above, loose matches on Subject: below --
2005-04-22 18:55 Woojung.Huh at smsc.com

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