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From: Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] My board doesn't boot - ram controller problem?
Date: Thu, 2 Jun 2005 13:16:28 -0400	[thread overview]
Message-ID: <429F3EEC.1030604@smiths-aerospace.com> (raw)
In-Reply-To: <20050602154610.A49C2C1512@atlas.denx.de>

Wolfgang Denk wrote:
> In message <429F1E26.1010508@web.de> you wrote:
> 
>>I had the following assumptions:
>>
>>1. The MPC875 will try to boot from 0xfff00100 due to my HRCW settings, 
>>which cause MSR[IP] to be "1".
>>2. The whole memory is tiled with the first 64K of the flash due to the 
>>fact that OR0 is 0x00000ff4 when the board boots, which should mask out 
> 
> 
> Did you read the MPC8xx User's Manual about how the  processor  comes
> up from reset? Read it again, please.
> 
> Best regards,
> 
> Wolfgang Denk

And, just to add my 2 cents, you should look at your debugger 
configuration.  Your debugger most likely is writing to registers to set 
your processor up so it can load and run programs.  This includes 
writing to the BR and OR registers.  Look at what it is doing for 
initialization, compare that to what you are doing, read the processor 
manual, and understand it all.  That is the path to enlightenment (or at 
least blinkin' LEDs).

gvb

  reply	other threads:[~2005-06-02 17:16 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2005-06-02 14:56 [U-Boot-Users] My board doesn't boot - ram controller problem? Peter Asemann
2005-06-02 15:46 ` Wolfgang Denk
2005-06-02 17:16   ` Jerry Van Baren [this message]
2005-06-03 13:53   ` [U-Boot-Users] Board boots - minor memory controller operation understanding problem Peter Asemann
2005-06-03 15:26     ` Wolfgang Denk
2005-06-04 16:15       ` Peter Asemann
2005-06-04 18:45         ` [U-Boot-Users] PingSend richard at uclinux.net
2005-06-04 19:29           ` richard at uclinux.net
2005-06-04 19:59             ` Wolfgang Denk
2005-06-04 20:39               ` richard at uclinux.net

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