[U-Boot-Users] [Patch]

[U-Boot-Users] [Patch]

[Peter Pearse]

Hi
       Attached remade multicore patch to allow users to specify the
core module fitted
 to their ARM supplied Integrator development board.
 
 Please inform me of any defects found. 
 
 CHANGELOG:
 * Patch by Peter Pearse, 11 Apr 2005
   - add core module targets for integratorap, integratorcp
   - add ARM946E cpu support
   - remap SSRAM memory to 0x00000000
 
 Notes
 -----
 a) Provides targets for all supported Core Modules
 - targets are of the form integrator<type>_CM<id>_config Examples 
 	make integratorap_CM946E_S
 	make integratorcp_CM920T_config
 
 b) Previous targets integegratorcp, integratorap retained.
 
 c) Tested to build with 
 	MAKEALL arm
 
 d) Tested to boot linux with 
    - Integrator/CP CM920T
    - Integrator/CP CM926EJ-S
    - Versatile     PB926EJ-S
    - both Integrator combinations boot in all three settings
      - Manually run U-Boot in ARM Boot Monitor
      - Auto boot U-Boot through ARM Boot Monitor
      - Auto boot direct into U-Boot

 e) Patched against head at 11 Apr 2005
 
 f) Replaces the patch submitted on 02 Feb 2005

 
------------------------ Peter.Pearse at arm.com
-------------------------

-------------- next part --------------
A non-text attachment was scrubbed...
Name: multicore.patch.bz2
Type: application/octet-stream
Size: 20315 bytes
Desc: multicore.patch.bz2
Url : http://lists.denx.de/pipermail/u-boot/attachments/20050411/9f5d2f4e/attachment.obj 

[U-Boot-Users] [Patch]

[George G. Davis]

On Mon, Apr 11, 2005 at 10:28:33AM +0100, Peter Pearse wrote:
> Hi
>        Attached remade multicore patch to allow users to specify the
> core module fitted
>  to their ARM supplied Integrator development board.

It looks like this one is superseded by the second post of the same patch.

--
Regards,
George

[U-Boot-Users] patch:

[Scott McNutt]

Add EPCS Controller bootrom work-around for Nios-II
    -When booting from an epcs controller, the epcs bootrom may leave the
    slave select in an asserted state causing soft reset hang. This
    patch ensures slave select is negated at reset.

Regards,
--Scott
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: nios2-epcsboot.diff
Url: http://lists.denx.de/pipermail/u-boot/attachments/20050811/fc68d8dc/attachment.txt 

[U-Boot-Users] [Patch]

[Wolfgang Denk]

In message <89A528FE6DB0FA44877BB2F05B846718021F88C4@ZIPPY.Emea.Arm.com> you wrote:
> 
>        Attached remade multicore patch to allow users to specify the
> core module fitted
>  to their ARM supplied Integrator development board.
>  
>  Please inform me of any defects found. 
>  
>  CHANGELOG:
>  * Patch by Peter Pearse, 11 Apr 2005
>    - add core module targets for integratorap, integratorcp
>    - add ARM946E cpu support
>    - remap SSRAM memory to 0x00000000

Most of this patch does not apply any more. Skipped. Please  resubmit
any parts that are still missing in the current code.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
This all sounds complicated, but it mostly does excatly what you  ex-
pect. It's just difficult for us to explain what you expect...
                       - L. Wall & R. L. Schwartz, _Programming Perl_

[U-Boot-Users] [Patch]

[Peter Pearse]

Wolfgang Denk wrote:
>> 
>>  CHANGELOG:
>>  * Patch by Peter Pearse, 11 Apr 2005
>>    - add core module targets for integratorap, integratorcp
>>    - add ARM946E cpu support
>>    - remap SSRAM memory to 0x00000000
> 
> Most of this patch does not apply any more. Skipped. Please  resubmit
> any parts that are still missing in the current code. 
> 
Re-submitted as patches with my reference number:-

002   Patch submitted 29th Sept 2005 
Ensure Integrator boards call platformsetup() rather than
lowlevel_init()
003   Patch submitted 29th Sept 2005
Provide Makefile targets for all ARM supported development boards
005   Patch submitted 4th Oct 2005
Split off common core module data

Regards 

Peter Pearse

[U-Boot-Users] patch:

[Wolfgang Denk]

In message <42FB6BC1.5000109@psyent.com> you wrote:
> 
> Add EPCS Controller bootrom work-around for Nios-II
>     -When booting from an epcs controller, the epcs bootrom may leave the
>     slave select in an asserted state causing soft reset hang. This
>     patch ensures slave select is negated at reset.

Merged. Thanks.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
God runs electromagnetics by wave theory on  Monday,  Wednesday,  and
Friday,  and the Devil runs them by quantum theory on Tuesday, Thurs-
day, and Saturday.                                   -- William Bragg

[U-Boot-Users] [PATCH]

[Peter Pearse]

Richard 
    Please let me know if you have time to test the patch below.
 
[Test results from other OMAP2420H4 users welcome]
 
The patch (my ref 20070313_omap2420h4) fixes the build failure caused when
the OMAP2420H4 was changed to use CFI flash.
 
The patch is against commit fdd1d6dcc97c595bd9d598ed3b22a7038781272c of
git://www.denx.de/git/u-boot-arm.git 
 
The following changes since commit fdd1d6dcc97c595bd9d598ed3b22a7038781272c:
  Stefan Roese:
        Merge with
git+ssh://sr at pollux.denx.org/home/sr/git/u-boot/denx-merge-sr
 
are found in the git repository at:
 
  git://www.denx.de/git/u-boot-arm.git
 
Peter Pearse:
      Remove the omap2420h4 specific code from common/env_flash.c.
 
 common/env_flash.c |   19 -------------------
 1 files changed, 0 insertions(+), 19 deletions(-)

Regards
 
Peter
 
diff --git a/common/env_flash.c b/common/env_flash.c
index 1674b30..0e9f1ae 100644
--- a/common/env_flash.c
+++ b/common/env_flash.c
@@ -107,13 +107,6 @@ int  env_init(void)
  ulong addr1 = (ulong)&(flash_addr->data);
  ulong addr2 = (ulong)&(flash_addr_new->data);
 
-#ifdef CONFIG_OMAP2420H4
- int flash_probe(void);
-
- if(flash_probe() == 0)
-  goto bad_flash;
-#endif
-
  crc1_ok = (crc32(0, flash_addr->data, ENV_SIZE) == flash_addr->crc);
  crc2_ok = (crc32(0, flash_addr_new->data, ENV_SIZE) ==
flash_addr_new->crc);
 
@@ -143,9 +136,6 @@ #endif
   gd->env_valid = 2;
  }
 
-#ifdef CONFIG_OMAP2420H4
-bad_flash:
-#endif
  return (0);
 }
 
@@ -259,20 +249,11 @@ #else /* ! CFG_ENV_ADDR_REDUND */
 
 int  env_init(void)
 {
-#ifdef CONFIG_OMAP2420H4
- int flash_probe(void);
-
- if(flash_probe() == 0)
-  goto bad_flash;
-#endif
  if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
   gd->env_addr  = (ulong)&(env_ptr->data);
   gd->env_valid = 1;
   return(0);
  }
-#ifdef CONFIG_OMAP2420H4
-bad_flash:
-#endif
  gd->env_addr  = (ulong)&default_environment[0];
  gd->env_valid = 0;
  return (0);

---
 
 
-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.denx.de/pipermail/u-boot/attachments/20070314/64858071/attachment.htm 

[U-Boot-Users] [PATCH]

[Woodruff, Richard]

Peter,

 

I'll give it a try this week.

 

The port as in the Denx git likely has issues.  The last large patch
didn't get applied to make it work on more current boards.

 

I might give a patch try again for these boards now that the cycle time
might be a bit quicker under the updated model.  There are patches for
OMAP242x/OMAP243x (armv6) & OMAP343x (armv7) which I'd like to sync up
to.

 

Regards,

Richard W.

 

________________________________

From: Peter Pearse [mailto:peter.pearse at arm.com] 
Sent: Wednesday, March 14, 2007 5:08 AM
To: Woodruff, Richard
Cc: u-boot-users at lists.sourceforge.net
Subject: [PATCH] 

 

Richard 

    Please let me know if you have time to test the patch below.

 

[Test results from other OMAP2420H4 users welcome]

 

The patch (my ref 20070313_omap2420h4) fixes the build failure caused
when the OMAP2420H4 was changed to use CFI flash.

 

The patch is against commit fdd1d6dcc97c595bd9d598ed3b22a7038781272c of
git://www.denx.de/git/u-boot-arm.git 

 

The following changes since commit
fdd1d6dcc97c595bd9d598ed3b22a7038781272c:
  Stefan Roese:
        Merge with
git+ssh://sr at pollux.denx.org/home/sr/git/u-boot/denx-merge-sr

 

are found in the git repository at:

 

  git://www.denx.de/git/u-boot-arm.git

 

Peter Pearse:
      Remove the omap2420h4 specific code from common/env_flash.c.

 

 common/env_flash.c |   19 -------------------
 1 files changed, 0 insertions(+), 19 deletions(-)

Regards

 

Peter

 

diff --git a/common/env_flash.c b/common/env_flash.c
index 1674b30..0e9f1ae 100644
--- a/common/env_flash.c
+++ b/common/env_flash.c
@@ -107,13 +107,6 @@ int  env_init(void)
  ulong addr1 = (ulong)&(flash_addr->data);
  ulong addr2 = (ulong)&(flash_addr_new->data);
 
-#ifdef CONFIG_OMAP2420H4
- int flash_probe(void);
-
- if(flash_probe() == 0)
-  goto bad_flash;
-#endif
-
  crc1_ok = (crc32(0, flash_addr->data, ENV_SIZE) == flash_addr->crc);
  crc2_ok = (crc32(0, flash_addr_new->data, ENV_SIZE) ==
flash_addr_new->crc);
 
@@ -143,9 +136,6 @@ #endif
   gd->env_valid = 2;
  }
 
-#ifdef CONFIG_OMAP2420H4
-bad_flash:
-#endif
  return (0);
 }
 
@@ -259,20 +249,11 @@ #else /* ! CFG_ENV_ADDR_REDUND */
 
 int  env_init(void)
 {
-#ifdef CONFIG_OMAP2420H4
- int flash_probe(void);
-
- if(flash_probe() == 0)
-  goto bad_flash;
-#endif
  if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
   gd->env_addr  = (ulong)&(env_ptr->data);
   gd->env_valid = 1;
   return(0);
  }
-#ifdef CONFIG_OMAP2420H4
-bad_flash:
-#endif
  gd->env_addr  = (ulong)&default_environment[0];
  gd->env_valid = 0;
  return (0);

---

 

 

-------------- next part --------------
An HTML attachment was scrubbed...
URL: http://lists.denx.de/pipermail/u-boot/attachments/20070317/48736634/attachment.htm 

[U-Boot-Users] [PATCH]

[Grant Erickson]

This patch continues laying the ground work for moving out-of-assembly
and unifying the SDRAM initialization code for PowerPC 405EX[r]-based
boards.

To do so, this deduces by one the number of nearly-identical DRAM ECC
initialization implementations for PowerPC 4xx processors utilizing a
DDR/DDR2 SDRAM controller by merging two of them into a common, shared
implementation.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
---
 cpu/ppc4xx/44x_spd_ddr.c |   51 ++------------------
 cpu/ppc4xx/Makefile      |    1 +
 cpu/ppc4xx/ecc.c         |  117 ++++++++++++++++++++++++++++++++++++++++++++++
 cpu/ppc4xx/ecc.h         |   42 ++++++++++++++++
 cpu/ppc4xx/sdram.c       |   46 +-----------------
 5 files changed, 168 insertions(+), 89 deletions(-)
 create mode 100644 cpu/ppc4xx/ecc.c
 create mode 100644 cpu/ppc4xx/ecc.h

diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/cpu/ppc4xx/44x_spd_ddr.c
index b9cf5cb..7f04ca6 100644
--- a/cpu/ppc4xx/44x_spd_ddr.c
+++ b/cpu/ppc4xx/44x_spd_ddr.c
@@ -53,6 +53,10 @@
 #include <ppc4xx.h>
 #include <asm/mmu.h>
 
+#ifdef CONFIG_DDR_ECC
+#include "ecc.h"
+#endif
+
 #if defined(CONFIG_SPD_EEPROM) &&					\
 	(defined(CONFIG_440GP) || defined(CONFIG_440GX) ||		\
 	 defined(CONFIG_440EP) || defined(CONFIG_440GR))
@@ -296,10 +300,6 @@ static void program_tr0(unsigned long *dimm_populated,
 			unsigned long num_dimm_banks);
 static void program_tr1(void);
 
-#ifdef CONFIG_DDR_ECC
-static void program_ecc(unsigned long num_bytes);
-#endif
-
 static unsigned long program_bxcr(unsigned long *dimm_populated,
 				  unsigned char *iic0_dimm_addr,
 				  unsigned long num_dimm_banks);
@@ -418,7 +418,7 @@ long int spd_sdram(void) {
 	/*
 	 * If ecc is enabled, initialize the parity bits.
 	 */
-	program_ecc(total_size);
+	ecc_init(CFG_SDRAM_BASE, total_size);
 #endif
 
 	return total_size;
@@ -1402,45 +1402,4 @@ static unsigned long program_bxcr(unsigned long *dimm_populated,
 
 	return(bank_base_addr);
 }
-
-#ifdef CONFIG_DDR_ECC
-static void program_ecc(unsigned long num_bytes)
-{
-	unsigned long bank_base_addr;
-	unsigned long current_address;
-	unsigned long end_address;
-	unsigned long address_increment;
-	unsigned long cfg0;
-
-	/*
-	 * get Memory Controller Options 0 data
-	 */
-	mfsdram(mem_cfg0, cfg0);
-
-	/*
-	 * reset the bank_base address
-	 */
-	bank_base_addr = CFG_SDRAM_BASE;
-
-	if ((cfg0 & SDRAM_CFG0_MCHK_MASK) != SDRAM_CFG0_MCHK_NON) {
-		mtsdram(mem_cfg0, (cfg0 & ~SDRAM_CFG0_MCHK_MASK) | SDRAM_CFG0_MCHK_GEN);
-
-		if ((cfg0 & SDRAM_CFG0_DMWD_MASK) == SDRAM_CFG0_DMWD_32)
-			address_increment = 4;
-		else
-			address_increment = 8;
-
-		current_address = (unsigned long)(bank_base_addr);
-		end_address = (unsigned long)(bank_base_addr) + num_bytes;
-
-		while (current_address < end_address) {
-			*((unsigned long*)current_address) = 0x00000000;
-			current_address += address_increment;
-		}
-
-		mtsdram(mem_cfg0, (cfg0 & ~SDRAM_CFG0_MCHK_MASK) |
-			SDRAM_CFG0_MCHK_CHK);
-	}
-}
-#endif /* CONFIG_DDR_ECC */
 #endif /* CONFIG_SPD_EEPROM */
diff --git a/cpu/ppc4xx/Makefile b/cpu/ppc4xx/Makefile
index 178c5c6..800bb41 100644
--- a/cpu/ppc4xx/Makefile
+++ b/cpu/ppc4xx/Makefile
@@ -45,6 +45,7 @@ COBJS	+= cpu.o
 COBJS	+= cpu_init.o
 COBJS	+= denali_data_eye.o
 COBJS	+= denali_spd_ddr2.o
+COBJS	+= ecc.o
 COBJS	+= fdt.o
 COBJS	+= gpio.o
 COBJS	+= i2c.o
diff --git a/cpu/ppc4xx/ecc.c b/cpu/ppc4xx/ecc.c
new file mode 100644
index 0000000..a7755bf
--- /dev/null
+++ b/cpu/ppc4xx/ecc.c
@@ -0,0 +1,117 @@
+/*
+ *    Copyright (c) 2008 Nuovation System Designs, LLC
+ *	Grant Erickson <gerickson@nuovations.com>
+ *
+ *    Copyright (c) 2005-2007 DENX Software Engineering, GmbH
+ *	Stefan Roese <sr@denx.de>
+ *
+ *    Copyright (c) 2002 Artesyn Technology
+ *	Jun Gu <jung@artesyncp.com>
+ *
+ *    Copyright (c) 2001 Wave 7 Optics
+ *	Bill Hunter <williamhunter@attbi.com>x
+ *
+ *    See file CREDITS for list of people who contributed to this
+ *    project.
+ *
+ *    This program is free software; you can redistribute it and/or
+ *    modify it under the terms of the GNU General Public License as
+ *    published by the Free Software Foundation; either version 2 of
+ *    the License, or (at your option) any later version.
+ *
+ *    This program is distributed in the hope that it will abe useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ *    MA 02111-1307 USA
+ *
+ *    Description:
+ *	This file implements generic DRAM ECC initialization for
+ *	PowerPC processors using a SDRAM DDR/DDR2 controller,
+ *	including the 405EX(r), 440GP/GX/EP/GR, 440SP(E), and
+ *	460EX/GT.
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+#include <asm/processor.h>
+
+#include "ecc.h"
+
+#if defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC)
+/*
+ *  void ecc_init()
+ *
+ *  Description:
+ *    This routine initializes a range of DRAM ECC memory with known
+ *    data and enables ECC checking.
+ *
+ *  TO DO:
+ *    Improve performance by utilizing cache.
+ *
+ *  Input(s):
+ *    start - A pointer to the start of memory covered by ECC requiring
+ *	      initialization.
+ *    size  - The size, in bytes, of the memory covered by ECC requiring
+ *	      initialization.
+ *
+ *  Output(s):
+ *    start - A pointer to the start of memory covered by ECC with
+ *	      CFG_ECC_PATTERN written to all locations and ECC data
+ *	      primed.
+ *
+ *  Returns:
+ *    N/A
+ */
+void ecc_init(unsigned long * const start, unsigned long size)
+{
+	const unsigned long pattern = CFG_ECC_PATTERN;
+	unsigned * const end = (unsigned long * const)((long)start + size);
+	unsigned long * current = start;
+	unsigned long mcopt1;
+	long increment;
+
+	if (start >= end)
+		return;
+
+	mfsdram(SDRAM_MCOPT1, mcopt1);
+
+	/* Enable ECC generation without checking or reporting */
+
+	mtsdram(SDRAM_MCOPT1, ((mcopt1 & ~SDRAM_MCOPT1_MCHK_MASK) |
+			       SDRAM_MCOPT1_MCHK_GEN));
+
+	increment = sizeof(u32);
+
+#if defined(CONFIG_440)
+	/*
+	 * Look at the geometry of SDRAM (data width) to determine whether we
+	 * can skip words when writing.
+	 */
+
+	if ((mcopt1 & SDRAM_MCOPT1_DMWD_MASK) != SDRAM_MCOPT1_DMWD_32)
+		increment = sizeof(u64);
+#endif /* defined(CONFIG_440) */
+
+	while (current < end) {
+		*current = pattern;
+		 current = (unsigned long *)((long)current + increment);
+	}
+
+	/* Wait until the writes are finished. */
+
+	sync();
+	eieio();
+
+	/* Enable ECC generation with checking and no reporting */
+
+	mtsdram(SDRAM_MCOPT1, ((mcopt1 & ~SDRAM_MCOPT1_MCHK_MASK) |
+			       SDRAM_MCOPT1_MCHK_CHK));
+}
+#endif /* defined(CONFIG_DDR_ECC) || defined(CONFIG_SDRAM_ECC) */
diff --git a/cpu/ppc4xx/ecc.h b/cpu/ppc4xx/ecc.h
new file mode 100644
index 0000000..da1c4fd
--- /dev/null
+++ b/cpu/ppc4xx/ecc.h
@@ -0,0 +1,42 @@
+/*
+ *    Copyright (c) 2008 Nuovation System Designs, LLC
+ *	Grant Erickson <gerickson@nuovations.com>
+ *
+ *    Copyright (c) 2007 DENX Software Engineering, GmbH
+ *	Stefan Roese <sr@denx.de>
+ *
+ *    See file CREDITS for list of people who contributed to this
+ *    project.
+ *
+ *    This program is free software; you can redistribute it and/or
+ *    modify it under the terms of the GNU General Public License as
+ *    published by the Free Software Foundation; either version 2 of
+ *    the License, or (at your option) any later version.
+ *
+ *    This program is distributed in the hope that it will abe useful,
+ *    but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ *    GNU General Public License for more details.
+ *
+ *    You should have received a copy of the GNU General Public License
+ *    along with this program; if not, write to the Free Software
+ *    Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ *    MA 02111-1307 USA
+ *
+ *    Description:
+ *	This file implements ECC initialization for PowerPC processors
+ *	using the SDRAM DDR2 controller, including the 405EX(r),
+ *	440SP(E), 460EX and 460GT.
+ *
+ */
+
+#ifndef _ECC_H_
+#define _ECC_H_
+
+#if !defined(CFG_ECC_PATTERN)
+#define	CFG_ECC_PATTERN	0x00000000
+#endif /* !defined(CFG_ECC_PATTERN) */
+
+extern void ecc_init(unsigned long * const start, unsigned long size);
+
+#endif /* _ECC_H_ */
diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c
index 2724d91..bd0a827 100644
--- a/cpu/ppc4xx/sdram.c
+++ b/cpu/ppc4xx/sdram.c
@@ -31,6 +31,9 @@
 #include <ppc4xx.h>
 #include <asm/processor.h>
 #include "sdram.h"
+#ifdef CONFIG_SDRAM_ECC
+#include "ecc.h"
+#endif
 
 #ifdef CONFIG_SDRAM_BANK0
 
@@ -332,49 +335,6 @@ static void sdram_tr1_set(int ram_address, int* tr1_value)
 	*tr1_value = (first_good + last_bad) / 2;
 }
 
-#ifdef CONFIG_SDRAM_ECC
-static void ecc_init(ulong start, ulong size)
-{
-	ulong	current_addr;		/* current byte address */
-	ulong	end_addr;		/* end of memory region */
-	ulong	addr_inc;		/* address skip between writes */
-	ulong	cfg0_reg;		/* for restoring ECC state */
-
-	/*
-	 * TODO: Enable dcache before running this test (speedup)
-	 */
-
-	mfsdram(mem_cfg0, cfg0_reg);
-	mtsdram(mem_cfg0, (cfg0_reg & ~SDRAM_CFG0_MEMCHK) | SDRAM_CFG0_MEMCHK_GEN);
-
-	/*
-	 * look at geometry of SDRAM (data width) to determine whether we
-	 * can skip words when writing
-	 */
-	if ((cfg0_reg & SDRAM_CFG0_DRAMWDTH) == SDRAM_CFG0_DRAMWDTH_32)
-		addr_inc = 4;
-	else
-		addr_inc = 8;
-
-	current_addr = start;
-	end_addr = start + size;
-
-	while (current_addr < end_addr) {
-		*((ulong *)current_addr) = 0x00000000;
-		current_addr += addr_inc;
-	}
-
-	/*
-	 * TODO: Flush dcache and disable it again
-	 */
-
-	/*
-	 * Enable ecc checking and parity errors
-	 */
-	mtsdram(mem_cfg0, (cfg0_reg & ~SDRAM_CFG0_MEMCHK) | SDRAM_CFG0_MEMCHK_CHK);
-}
-#endif
-
 /*
  * Autodetect onboard DDR SDRAM on 440 platforms
  *
-- 
1.5.4.3

[U-Boot-Users] [PATCH]

[Wolfgang Denk]

In message <1210980273-13569-1-git-send-email-gerickson@nuovations.com> you wrote:
> This patch continues laying the ground work for moving out-of-assembly
> and unifying the SDRAM initialization code for PowerPC 405EX[r]-based
> boards.
> 
> To do so, this deduces by one the number of nearly-identical DRAM ECC
> initialization implementations for PowerPC 4xx processors utilizing a
> DDR/DDR2 SDRAM controller by merging two of them into a common, shared
> implementation.
> 
> Signed-off-by: Grant Erickson <gerickson@nuovations.com>

No subject given.

Please keep in mind that the subject of the patch  will  be  the  key
line  of  the  resulting  commit in the repository. Therefor a useful
subject line is absolutely mandatory.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The night sky over the planet Krikkit is the least interesting  sight
in the entire Universe.
                 - Douglas Adams _Life, the Universe, and Everything_