From: Steven Scholz <steven.scholz@imc-berlin.de>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] Bug in AT91RM9200.h
Date: Mon, 10 Oct 2005 14:33:38 +0200 [thread overview]
Message-ID: <434A5FA2.2070806@imc-berlin.de> (raw)
In-Reply-To: <434A5D2A.6070906@imc-berlin.de>
Ladies,
there's another wrong define in AT91RM9200.
According the (my) User Man the RWHOLD field of SMC_CSR0..SMC_CSR7
starts at bit 28. Thus
#define AT91C_SMC2_RWHOLD ((unsigned int) 0x7 << 29) /*
(SMC2) Read and Write Signal Hold Time */
is rubbish!
So please apply this trivial patch instead if my previous one:
* Fix defines AT91C_SMC2_DBW and AT91C_SMC2_RWHOLD in AT91RM9200.h
Patch by Steven Scholz, 10 Oct 2005
(Machine generate header file - ha, ha!)
--
Steven
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prev parent reply other threads:[~2005-10-10 12:33 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <42F82884.9090500@billgatliff.com>
[not found] ` <42FC666D.6060704@imc-berlin.de>
2005-10-10 12:23 ` [U-Boot-Users] Bug in AT91RM9200.h Steven Scholz
2005-10-10 12:33 ` Steven Scholz [this message]
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