[U-Boot-Users] u-boot 1.1.2 on mpc852t : decrementer exception in interrupt_init()

[Vladimir Gurevich <vag@paulidav.org>]

Hello Gautam,

gautam borad wrote:

> Thanks for giving the patch. I tried using your patch but it doesnt 
> work, i get the following on the console:

Did you apply it to unmodified U-boot snapshot (preferrably 1.1.2)? Did 
it apply cleanly? Did you do "make EP852_config; make"? How did you 
program U-boot in the FLASH? What is your BDI-2000 config file (I 
attached mine here).

>
> -------------------------------------------------------------------------------------------------------------------------------------------------------- 
>
> U-Boot 1.1.3 (Oct 20 2005 - 15:35:24) EP852
>
> CPU:   MPC852TxxZPnn at 50 MHz [25.0...125.0 MHz]
>       4 kB I-Cache 4 kB D-Cache FEC present
>
>       Board: EP852 (Rev. e4).   CPLD Rev: 00   DIP Switch: 1111
>       DRAM:  16 MB
>       FLASH: Bus Fault @ 0x00fab008, fixup 0x00000000


> -------------------------------------------------------------------------------------------------------------------------------------------------------- 
>
> I realized the problem was cfi_flash when i tried it with u-boot 1.1.2 
> which also gave the above error.(previously it didnt give the above 
> error)
> So I took the flash.c file from RPXClassic directory.
> The board has 2 AMD AM29LV320MB (8 MB each)  flash. In the flash.c the 
> auto select command (to read manufactor ID) returns 0x227e227e.
> However in include/flash.h i have #define AMD_ID_LV320B 0x22F922F9 . 
> 227E227E is defined for AMD_ID_DL640. Why is this so??
> I've modified #define AMD_ID_LV320B to 0x227E227E , but is this the 
> right way??

Standard CFI driver should handle these chips just fine. I do not think 
any modifications are needed. However, my board uses 2xAM29LV640MB chips 
and thus you have to adjust the related parameters (like CFG_FLASH_SIZE 
and CFG_MAX_FLASH_SECT). Also, watch for CFG_JFFS2_FIRST_SECTOR. It 
reflects my particular layout.

> The flash starts at 0xFF800000.

Well, this is programmable. When the CPU comes out of reset, it is 
located at 0x0. After that my U-boot port programs CS0 to be 0x04000000 
(64M), the same way, say, TQM8xx port does. This is reflected in 
CFG_FLASH_BASE as well as in TEXT_BASE variable in config.mk

> Also what actually does U-Boot does when a decrementer exception is 
> generated?

This is a standard timer interrupt, but since I suspect that your 
address map is quite screwed, I wouldn't concentrate on that.

Happy hacking,
Vladimir

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