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From: Vladimir Gurevich <vag@paulidav.org>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] PPC8xx chip select configuration at startup
Date: Fri, 17 Feb 2006 09:34:21 -0800	[thread overview]
Message-ID: <43F6091D.7040901@paulidav.org> (raw)
In-Reply-To: <482F3C06ECF00C44AEC226520C6FCB1A51ECB6@EXCHANGEVS.HYPERCOM.COM>

Hello Steve,

Steve Strublic wrote:
>
> My board boots to address 0x0, with FLASH located there.
>
What actually happens is that right after power-on reset CS0 covers the
whole memory address space. So, for example, if you have 64MB FLASH
(0x04000000) and thus you have 26 address lines (A0-A25 on the FLASH
chip which is A6-A31 on PPC) connected, your FLASH will appear at
addresses 0x00000000, 0x04000000, 0x08000000, 0x0c000000, 0x10000000,
etc. This is called aliasing.

U-boot relies on this effect. So, it is linked to run using 0x04000000
as the base address and you can see it in the debugger. So even though
initially CS0 points to address 0, this is still possible because of
aliasing.

So, yes, the first instruction to be executed is located at 0x0 (that's
how your CPU works), but then the code works using 0x04000000 as a base
and that is fine. The CPU does not care.
>
> The desired location for FLASH memory will be at 0x0400_0000. This is 
> the address space to which I link U-Boot.
>
That's OK. It will simply limit your SDRAM size to 64M.
>
> The way I understand U-Boot to work is that for PPC8xx platforms, 
> FLASH memory is generally located at address 0x0, and CS0 is required 
> to map both address 0x0 and your absolute address space (0x0400_0000 
> in my example) so it can seamlessly jump from one to the other.
>
I am not sure "required" is the right word. Let's say you get it for free :)
>
> Later on, when SDRAM needs to be initialized, all chip selects 0-7 are 
> configured based on definitions in your board?s config include file.
>
Correct.
>
> Assuming this is correct, I found that my platform would not run past 
> the jump from address space mapped at 0x0 to address space mapped at 
> 0x0400_0000, and I boiled it down to values in CS0?s option register 
> that are contrary to what I require. What I ended up doing is program 
> CS0 base and option registers with what I call ?boot? values, to 
> correctly configure OR0 to allow this duplication of address space for 
> FLASH. This was done immediately prior to the jumpoff point.
>
I am not sure what is wrong with your CS0 configuration. Most probably
your power-on reset word is not quite correct, because that's where
these initial values come from. What you are doing is definitely an
unnecessary step.

Happy hacking,
Vladimir

  parent reply	other threads:[~2006-02-17 17:34 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2006-02-13 18:20 [U-Boot-Users] PPC8xx chip select configuration at startup Steve Strublic
2006-02-17  0:06 ` Wolfgang Denk
2006-02-17 17:34 ` Vladimir Gurevich [this message]
2006-02-17 20:48   ` Wolfgang Denk
2006-02-17 21:14     ` Jerry Van Baren
2006-02-17 22:11     ` Vladimir Gurevich
2006-02-17 22:30       ` Wolfgang Denk
  -- strict thread matches above, loose matches on Subject: below --
2006-02-17 16:34 Steve Strublic
2006-02-17 17:13 Steve Strublic
2006-02-17 17:34 ` Vladimir Gurevich
2006-02-17 20:52 ` Wolfgang Denk
2006-02-17 17:59 Steve Strublic
2006-02-17 21:08 ` Wolfgang Denk
2006-02-17 21:16 Steve Strublic

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