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* [U-Boot-Users] Turning on instruction address translation on an 8349 causes processor reset
@ 2006-07-18 18:54 Timur Tabi
  2006-07-19  2:46 ` Liu Dave-r63238
  0 siblings, 1 reply; 3+ messages in thread
From: Timur Tabi @ 2006-07-18 18:54 UTC (permalink / raw)
  To: u-boot

I'm working on adding support for a new 8349 board to U-Boot, and the processor resets if I turn on the IR bit in the MSR.  This happens in function enable_addr_trans() in start.S.

enable_addr_trans:
	/* enable address translation */
	mfmsr	r5
	ori	r5, r5, (MSR_IR | MSR_DR)
	mtmsr	r5
	isync
	blr

with this code, when the "mtmsr" instruction is executed, the processor resets (or hangs - I can't tell).  If I change the 4th line to:

	ori	r5, r5, MSR_DR

It works and U-Boot boots to a command prompt.

Since the BATs are configured the same for data and instruction, I presume the mapping is correct, but there's something wrong with turning on instruction address translation.  Anyone have any ideas?

-- 
Timur Tabi
Linux Kernel Developer @ Freescale

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot-Users] Turning on instruction address translation on an 8349 causes processor reset
  2006-07-18 18:54 [U-Boot-Users] Turning on instruction address translation on an 8349 causes processor reset Timur Tabi
@ 2006-07-19  2:46 ` Liu Dave-r63238
  2006-07-26 22:04   ` Timur Tabi
  0 siblings, 1 reply; 3+ messages in thread
From: Liu Dave-r63238 @ 2006-07-19  2:46 UTC (permalink / raw)
  To: u-boot

[snip]
> 
> I'm working on adding support for a new 8349 board to U-Boot, 
> and the processor resets if I turn on the IR bit in the MSR.  
> This happens in function enable_addr_trans() in start.S.
> 
> enable_addr_trans:
> 	/* enable address translation */
> 	mfmsr	r5
> 	ori	r5, r5, (MSR_IR | MSR_DR)
> 	mtmsr	r5
> 	isync
> 	blr
> 
> with this code, when the "mtmsr" instruction is executed, the 
> processor resets (or hangs - I can't tell).  If I change the 
> 4th line to:
> 
> 	ori	r5, r5, MSR_DR
> 
> It works and U-Boot boots to a command prompt.
> 
> Since the BATs are configured the same for data and 
> instruction, I presume the mapping is correct, but there's 
> something wrong with turning on instruction address 
> translation.  Anyone have any ideas?
> 
The MPC8349EMDS code in wolfgang's git is working well now. No hang.
Please check your code carefully.

-Dave

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [U-Boot-Users] Turning on instruction address translation on an 8349 causes processor reset
  2006-07-19  2:46 ` Liu Dave-r63238
@ 2006-07-26 22:04   ` Timur Tabi
  0 siblings, 0 replies; 3+ messages in thread
From: Timur Tabi @ 2006-07-26 22:04 UTC (permalink / raw)
  To: u-boot

Liu Dave-r63238 wrote:

> The MPC8349EMDS code in wolfgang's git is working well now. No hang.
> Please check your code carefully.

I've tried and I can't figure out what's wrong.  Right now, I have this code in mpc83xx/start.S:

	/* For some reason, address translation does not work on the 8349E-mITX */
#ifndef CONFIG_MPC8349ITX	
	/* enable address translation */
	bl	enable_addr_trans
	sync
#endif

Everything else works fine (I'll be providing a patch for the 8349E-mITX in a week or so).  But if I turn on either address translation (instruction or data, it doesn't matter), then the system crashes.

enable_addr_trans:
	/* enable address translation */
	mfmsr	r5
	ori	r5, r5, (MSR_IR | MSR_DR)
	mtmsr	r5
	isync
	blr

The crash occurs right after the 'mtmsr' instruction.

The only thing I can think of is that I'm using the wrong values for CFG_IBATxx, but I have no idea what they should be.  I copied them from MPC8349EMDS.h.

-- 
Timur Tabi
Linux Kernel Developer @ Freescale

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2006-07-26 22:04 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
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2006-07-18 18:54 [U-Boot-Users] Turning on instruction address translation on an 8349 causes processor reset Timur Tabi
2006-07-19  2:46 ` Liu Dave-r63238
2006-07-26 22:04   ` Timur Tabi

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