[U-Boot-Users] Invalid MPC8349EMDS OR0 setting?

Ben Warren
2006-07-28T14:02:28Z

Hi Dave,

I just used this blindly... The boot flash is the only peripheral on CS0 and I certainly haven't seen any problems here, but it's probably best to follow the manual.

FYI - Don't hold your breath for rev2.0 silicon. My understanding is that the next release will be early 2007 with rev3.0 silicon (renamed rev A). Check with your rep... The next rev is supposed to be pin compatible, but with additional pins being used for more chip selects and DDR2 support. If we have to spin our board I'm going to be royally pissed!

B-)
David Hawkins <dwh@ovro.caltech.edu> wrote:
Hey Dave,

While looking through the U-Boot source for the
MPC8349E-MDS board, I noticed the following:

u-boot/include/configs/MPC8349EMDS.h

CFG_OR0_PRELIM 0xFF806FF7

The '6' in the middle of this word corresponds
to bits 17 and 18, but in the reference manual
these bits are marked as reserved, and at processor
reset are 00b.

Since you and Ben have been working on this
board a while, I was wondering if there was
anything special about these particular bits,
eg. needed in silicon 1.0, but not the 1.1
on the MDS board.

Is this something I should try setting to 0,
test on the MDS board, and then submit a patch
for?

Also, do you know if the 2.0 silicon can
be dropped into the MDS board without change?

Thanks!
Dave

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