[U-Boot-Users] Invalid MPC8349EMDS OR0 setting?

[David Hawkins <dwh@ovro.caltech.edu>]

Hi Ben,

> I just used this blindly...  The boot flash is the only peripheral on 
> CS0 and I certainly haven't seen any problems here, but it's probably 
> best to follow the manual.

Yeah, but if you look at Dave's response, the section of the manual
Dave referred to does indeed reference those bits as XAM, but then
the GPCM OR table (and the other OR tables) refer to those bits as
reserved! Not exactly crystal clear.

> FYI - Don't hold your breath for rev2.0 silicon.  My understanding is 
> that the next release will be early 2007 with rev3.0 silicon (renamed 
> rev A).  Check with your rep... The next rev is supposed to be pin 
> compatible, but with additional pins being used for more chip selects 
> and DDR2 support.  If we have to spin our board I'm going to be royally 
> pissed!

Ohhh ... I've sent a request to my board subcontractor to start
talking to FAEs.

I'll be building prototypes in Nov/Dec. However, I had wanted to
use the Rev 2.0 silicon since it enables DDR2 and fixes the
external DMA errata (DMA_REQ/ACK/DONE not implemented).
Strangely though the errata rev 9 on the web site has
removed this errata listing (it was present in the rev 8
errata), and have even removed mention of the silicon 2.0.
Of course they might have just renamed the silicon 2.0
to MPC8349EA, but then there is no errata for that
silicon. Even more confusing is that the part numbering
scheme PDF lists parts ending in A as being silicon 3.0!

http://www.freescale.com/files/netcomm/doc/prod_num_scheme/MPC834XEFAMPNS.pdf

What silicon were you able to get for your boards?

Cheers
Dave