From mboxrd@z Thu Jan 1 00:00:00 1970 From: Timur Tabi Date: Mon, 07 Aug 2006 17:44:52 -0500 Subject: [U-Boot-Users] 83xx address translation: is it really necessary? In-Reply-To: References: <1628E43D99629C46988BE46087A3FBB96434D5@ep-01.EmbeddedPlanet.local> <0E97C602-62E4-4358-AA7D-0194CF60D199@kernel.crashing.org> <44D7A4FA.4050507@freescale.com> Message-ID: <44D7C264.4020201@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Kumar Gala wrote: > Is the physical memory map the same on the ITX as it is on the 8349EMDS? Beats me. The EMDS has this for the BATs: #define CFG_PCI1_MEM_BASE 0x80000000 #define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE #define CFG_PCI1_MEM_SIZE 0x10000000 /* 256M */ #define CFG_PCI1_MMIO_BASE 0x90000000 #define CFG_PCI1_MMIO_PHYS CFG_PCI1_MMIO_BASE #define CFG_PCI1_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI1_IO_BASE 0x00000000 #define CFG_PCI1_IO_PHYS 0xE2000000 #define CFG_PCI1_IO_SIZE 0x00100000 /* 1M */ #define CFG_PCI2_MEM_BASE 0xA0000000 #define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE #define CFG_PCI2_MEM_SIZE 0x10000000 /* 256M */ #define CFG_PCI2_MMIO_BASE 0xB0000000 #define CFG_PCI2_MMIO_PHYS CFG_PCI2_MMIO_BASE #define CFG_PCI2_MMIO_SIZE 0x10000000 /* 256M */ #define CFG_PCI2_IO_BASE 0x00000000 #define CFG_PCI2_IO_PHYS 0xE2100000 #define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */ Question #1: Why is CFG_PCI1_MEM_PHYS the same as CFG_PCI1_MEM_BASE, but CFG_PCI1_IO_PHYS is not the same as CFG_PCI1_IO_BASE? I'm porting the ITX support from an older U-Boot (1.1.3) that was written by another group. This is what they have: #define CFG_PCI1_MEM_BASE 0x80000000 #define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE #define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */ #define CFG_PCI1_IO_BASE 0x00000000 #define CFG_PCI1_IO_PHYS 0xe2000000 #define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */ #define CFG_PCI2_MEM_BASE 0xA0000000 #define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE #define CFG_PCI2_MEM_SIZE 0x20000000 /* 512M */ #define CFG_PCI2_IO_BASE 0x00000000 #define CFG_PCI2_IO_PHYS 0xe3000000 #define CFG_PCI2_IO_SIZE 0x1000000 /* 16M */ As you can see, some numbers are different, and some are missing. I had to guess what value to use for CFG_PCI1_MMIO_BASE, etc. I don't know why the PCI sizes are larger on the ITX than on the EMDS. I have no documentation that tells me what these numbers should be. -- Timur Tabi Linux Kernel Developer @ Freescale