From: Timur Tabi <timur@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] Where does U-Boot's CFI driver check for top/bottom boot?
Date: Mon, 06 Nov 2006 16:00:12 -0600 [thread overview]
Message-ID: <454FB06C.2080404@freescale.com> (raw)
In-Reply-To: <454D7BF3.2000400@orkun.us>
Tolunay Orkun wrote:
> I just looked at the datasheet of your flash part as well as datasheet
> of a couple of intel flash parts as well as the current code. As I
> suspected for your particular part, it looks like they are using the
> same values for "Erase Bank Area 1" and "Erase Bank Area 2" irrespective
> of top boot or bottom boot flash. I think, this is fundamentally wrong
> and non-compliant with the general CFI standard.
Using the PDF you specified, I see that my chip has a value of 03h for the
"Top/Bottom Boot Sector Flag", at offset (P+F)h. That indicates a top-boot,
which is correct (smaller sectors at the end of memory).
Why can't we just check this byte if we're on an AMD part, and adjust accordingly?
--
Timur Tabi
Linux Kernel Developer @ Freescale
next prev parent reply other threads:[~2006-11-06 22:00 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2006-11-03 16:15 [U-Boot-Users] Where does U-Boot's CFI driver check for top/bottom boot? Timur Tabi
[not found] ` <454BC9B3.8030806@orkun.us>
2006-11-04 10:03 ` Stefan Roese
2006-11-05 7:56 ` Tolunay Orkun
2006-11-05 9:31 ` Wolfgang Denk
2006-11-05 5:51 ` Tolunay Orkun
2006-11-05 7:44 ` Tolunay Orkun
2006-11-06 19:13 ` Timur Tabi
2006-11-06 22:00 ` Timur Tabi [this message]
-- strict thread matches above, loose matches on Subject: below --
2006-11-06 22:27 Yogi
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