[U-Boot-Users] MPC83xx SPI driver

[U-Boot-Users] MPC83xx SPI driver

[Ben Warren]

Hello,

I'm ready to re-submit a hard SPI driver for some members of the MPC83xx
family of CPUs, but am unsure where to put it.  While designed for the
MPC834x chips, it should also work with the upcoming MPC8313, if the
online datasheet is accurate.  The other 83xx chips handle
SPI with a CPM, so this driver won't work there.  Should I put it in
cpu/mpc83xx/, drivers/, or somewhere else?  And given the unusual chip
compatibilities, what should the file be called?

Suggestions?

regards,
Ben

[U-Boot-Users] MPC83xx SPI driver

[Joakim Tjernlund]

> -----Original Message-----
> From: u-boot-users-bounces at lists.sourceforge.net 
> [mailto:u-boot-users-bounces at lists.sourceforge.net] On Behalf 
> Of Ben Warren
> Sent: den 7 december 2006 22:56
> To: uboot
> Subject: [U-Boot-Users] MPC83xx SPI driver
> 
> Hello,
> 
> I'm ready to re-submit a hard SPI driver for some members of 
> the MPC83xx
> family of CPUs, but am unsure where to put it.  While designed for the
> MPC834x chips, it should also work with the upcoming MPC8313, if the
> online datasheet is accurate.  The other 83xx chips handle
> SPI with a CPM, so this driver won't work there.  Should I put it in
> cpu/mpc83xx/, drivers/, or somewhere else?  And given the unusual chip
> compatibilities, what should the file be called?
> 
> Suggestions?

Does it work on a 8321 in QUICC mode? If so then cpu/mpc83xx/qe_spi.c perhaps?

 Jocke

[U-Boot-Users] MPC83xx SPI driver

[Ben Warren]

On Thu, 2006-12-07 at 23:08 +0100, Joakim Tjernlund wrote:
> > -----Original Message-----
> > From: u-boot-users-bounces at lists.sourceforge.net 
> > [mailto:u-boot-users-bounces at lists.sourceforge.net] On Behalf 
> > Of Ben Warren
> > Sent: den 7 december 2006 22:56
> > To: uboot
> > Subject: [U-Boot-Users] MPC83xx SPI driver
> > 
> > Hello,
> > 
> > I'm ready to re-submit a hard SPI driver for some members of 
> > the MPC83xx
> > family of CPUs, but am unsure where to put it.  While designed for the
> > MPC834x chips, it should also work with the upcoming MPC8313, if the
> > online datasheet is accurate.  The other 83xx chips handle
> > SPI with a CPM, so this driver won't work there.  Should I put it in
> > cpu/mpc83xx/, drivers/, or somewhere else?  And given the unusual chip
> > compatibilities, what should the file be called?
> > 
> > Suggestions?
> 
> Does it work on a 8321 in QUICC mode? If so then cpu/mpc83xx/qe_spi.c perhaps?
> 
>  Jocke
> 
Doubtful, since the 834x and 8313 don't have QUICC engines.  While the
control registers appear to be common among all 83xx chips, on these
ones transmit and receive are handled by dedicated 32-bit registers
rather than the RAM-based descriptor types found in CPMs.

regards,
Ben

[U-Boot-Users] MPC83xx SPI driver

[Kumar Gala]

On Dec 7, 2006, at 4:08 PM, Joakim Tjernlund wrote:

>> -----Original Message-----
>> From: u-boot-users-bounces at lists.sourceforge.net
>> [mailto:u-boot-users-bounces at lists.sourceforge.net] On Behalf
>> Of Ben Warren
>> Sent: den 7 december 2006 22:56
>> To: uboot
>> Subject: [U-Boot-Users] MPC83xx SPI driver
>>
>> Hello,
>>
>> I'm ready to re-submit a hard SPI driver for some members of
>> the MPC83xx
>> family of CPUs, but am unsure where to put it.  While designed for  
>> the
>> MPC834x chips, it should also work with the upcoming MPC8313, if the
>> online datasheet is accurate.  The other 83xx chips handle
>> SPI with a CPM, so this driver won't work there.  Should I put it in
>> cpu/mpc83xx/, drivers/, or somewhere else?  And given the unusual  
>> chip
>> compatibilities, what should the file be called?
>>
>> Suggestions?
>
> Does it work on a 8321 in QUICC mode? If so then cpu/mpc83xx/ 
> qe_spi.c perhaps?

QE drivers should be drivers/ as well since QE will be on 83xx and 85xx.

- k

[U-Boot-Users] MPC83xx SPI driver

[Kim Phillips]

On Thu, 7 Dec 2006 16:24:48 -0600
Kumar Gala <galak@kernel.crashing.org> wrote:

> 
> On Dec 7, 2006, at 4:08 PM, Joakim Tjernlund wrote:
> 
> >> cpu/mpc83xx/, drivers/, or somewhere else?  And given the unusual  
> >> chip
> >> compatibilities, what should the file be called?
> >>
> >> Suggestions?
> >
> > Does it work on a 8321 in QUICC mode? If so then cpu/mpc83xx/ 
> > qe_spi.c perhaps?
> 
> QE drivers should be drivers/ as well since QE will be on 83xx and 85xx.
> 
> - k
> 
to be specific, the qe driver should belong in drivers/qe/spi.c, and the non-qe driver should be something like drivers/fsl_spi.c.

Kim

[U-Boot-Users] MPC83xx SPI driver

[Timur Tabi]

Ben Warren wrote:
> Hello,
> 
> I'm ready to re-submit a hard SPI driver for some members of the MPC83xx
> family of CPUs, but am unsure where to put it.  While designed for the
> MPC834x chips, it should also work with the upcoming MPC8313, if the
> online datasheet is accurate.  The other 83xx chips handle
> SPI with a CPM, so this driver won't work there.  Should I put it in
> cpu/mpc83xx/, drivers/, or somewhere else?  And given the unusual chip
> compatibilities, what should the file be called?

Definitely drivers/.  Use fsl_i2c.c as an example of a driver that supports 
multiple families.

-- 
Timur Tabi
Linux Kernel Developer @ Freescale

[U-Boot-Users] MPC83xx SPI driver

[Ben Warren]

On Thu, 2006-12-07 at 23:31 +0100, Joakim Tjernlund wrote:

> > Doubtful, since the 834x and 8313 don't have QUICC engines.  While the
> > control registers appear to be common among all 83xx chips, on these
> > ones transmit and receive are handled by dedicated 32-bit registers
> > rather than the RAM-based descriptor types found in CPMs.
> 
> Ahh, that's probably why the 83xx spi driver in linux won't work
> on 8321 either. Could you comment on that?

Yes, that's correct.  I don't know for sure, but it looks to me that the
SPI engine on the 8321/8360 chips has more in common with the
traditional PowerQUICC chips like 8xx and 82xx.  Maybe there's a Linux
driver for them that you could tweak?

regards,
Ben  

[U-Boot-Users] MPC83xx SPI driver

[Ben Warren]

On Thu, 2006-12-07 at 23:49 +0100, Joakim Tjernlund wrote:

> 
> Didn't find any other SPI driver. Looked at the docs
> for SPI in CPU mode for 832x and I don't get the command register
> where one is supposed to set a bit if the char one is about to TX is 
> the last one in a frame. Should I just set that bit at driver
> init and be done with it?
> 
>  Jocke

Maybe somebody from Freescale can weigh in on this one.  The 83xx driver
that's in the Linux kernel doesn't touch this bit (LTS).  The 834x
manual says that if LTS is set before the last character is written, an
LT event will occur after physical transmission is complete.  In my
experience LT never fires regardless of LTS state.  With the 834x the
LTS scheme seems a bit pointless since there's only one transmit buffer.
I'm guessing the LTS isn't really implemented and the documentation was
cut'n'pasted from another chip.  

On CPM-based chips like yours, it might be useful to queue a bunch of
buffers, start them off and then be interrupted when transmission's
complete, just as you would with Ethernet, HDLC or whatever.  I guess it
depends how big your messages are.  If they're short and fit in a single
buffer, you could probably just ignore LTS, mask off the LT interrupt
and move on.

regards,
Ben