From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jerry Van Baren Date: Mon, 05 Feb 2007 08:10:08 -0500 Subject: [U-Boot-Users] ethernet on FCC In-Reply-To: <397059.16074.qm@web15101.mail.cnb.yahoo.com> References: <397059.16074.qm@web15101.mail.cnb.yahoo.com> Message-ID: <45C72CB0.4030803@smiths-aerospace.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de jie han wrote: > Hi, > My mpc8270 board use three ehternet ports at FCC1,FCC2,FCC3.it is > work well at FCC1.When I use port FCC2, I found out the > u-boot is not receiving packets (It's sending correct packet when i > use ethereal for sniffing). When trying "ping", it generated an ARP > packet first, the other host replied with , but the board never seems > to receive it(set printf at function fec_recv() > /cpu/mpc8260/ether_fcc.c ).all three ethernet fcc ports initiailze is > same.Do I miss something?thank you for your suggestion,my config file > config FCC port parameter as follow: > > #undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */ > #define CONFIG_ETHER_ON_FCC /* define if ether on FCC */ > #undef CONFIG_ETHER_NONE /* define if ether on something else */ > #define CONFIG_NET_MULTI > #define CONFIG_ETHER_ON_FCC1 > #define CONFIG_ETHER_ON_FCC2 > #define CONFIG_ETHER_ON_FCC3 > > #define CFG_CMXFCR_VALUE1 (CMXFCR_RF1CS_CLK11 | CMXFCR_TF1CS_CLK12) > #define CFG_CMXFCR_MASK1 (CMXFCR_FC1 | CMXFCR_RF1CS_MSK | > CMXFCR_TF1CS_MSK) > > #define CFG_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK13 | CMXFCR_TF3CS_CLK14) > #define CFG_CMXFCR_MASK3 (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | > CMXFCR_TF3CS_MSK) > > #define CFG_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK15 | CMXFCR_TF2CS_CLK16) > #define CFG_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | > CMXFCR_TF2CS_MSK) > > #define CFG_RX_ETH_BUFFER 128 > #define CONFIG_IPADDR 192.168.10.17 > #define CONFIG_SERVERIP 192.168.10.101 > #define CONFIG_HOSTNAME OceanSCC > #define CONFIG_LOADADDR 1000 /* default location for tftp and > bootm */ > #define CONFIG_BOOTFILE u-boot.bin > > #define CONFIG_ETHADDR 00:13:09:11:22:33 > #define CONFIG_HAS_ETH1 > #define CONFIG_ETH1ADDR 00:13:09:04:05:36 > #define CONFIG_HAS_ETH2 > #define CONFIG_ETH2ADDR 00:13:09:07:08:39 > > #define CONFIG_EXTRA_ENV_SETTINGS "ethprime=FCC1 ETHERNET" > > #define CFG_CPMFCR_RAMTYPE 0 /* BDs and buffers on 60x bus */ > #define CFG_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB) /* Full duplex */ > > #define CONFIG_MII /* MII PHY management */ > #define CONFIG_BITBANGMII /* bit-bang MII PHY management */ > > Sincerely, > > Jie Hi Jie, I don't have any good insights, but some things to try: * Are you sure, positive, double checked and had a co-worker check that your clock input for FCC2-Rx is configured properly? 1) Which CLK input is used? 2) The port/pin configuration initialization in u-boot? 3) Your hardware (traces) actually connect the right pins? * Does FCC3 work? * If you turn off CONFIG_NET_MULTI and only use FCC2, does it work? * If you turn off CONFIG_NET_MULTI and only use FCC3, does it work? Good luck, gvb