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* [U-Boot-Users] MPC8347/9 stack in cache (CFG_INIT_RAM_ADDR)
@ 2007-04-24  4:49 Matt Hevern
  2007-04-24 14:56 ` Timur Tabi
  0 siblings, 1 reply; 2+ messages in thread
From: Matt Hevern @ 2007-04-24  4:49 UTC (permalink / raw)
  To: u-boot

Hi all,

I am trying to get U-Boot running on a custom MPC8347 board, and am 
having difficulty with the start-up code. I'm running essentially with 
U-boot 1.1.6, which has had the ppc83xx code updated to U-Boot 1.2.
I'm running out of SDRAM, with CFG_RAMBOOT

I have set CFG_INIT_RAM_ADDR to 0xFB000000, a location un-mapped by any 
of the windows or chip select settings, but mapped into a BAT by the 
board config:

#define CFG_IBAT6L  (0xFB000000 | BATL_PP_10  | BATL_MEMCOHERENCE)
#define CFG_IBAT6U  (0xFB000000 | BATU_BL_64M | BATU_VS | BATU_VP)

#define CFG_HID2 HID2_HBE  // to enable high bats
#define CFG_INIT_RAM_LOCK   1



in cpu/mpc83xx/start.S when it gets to the point of using the stack-in-cache


----start.S
    /* set up the stack pointer in our newly created
     * cache-ram (r1) */
    lis r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@h
    ori r1, r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@l

    li  r0, 0       /* Make room for stack frame header and */
    stwu    r0, -4(r1)  /* clear final stack frame so that  */
    stwu    r0, -4(r1)  /* stack backtraces terminate cleanly   */

----END start.S

It crashes badly at the first stwu instruction. I get strange behaviour, 
all register settings in debugger (green hills probe) showing 0x43 - and 
a grinding halt.

My understanding is that to get some ram for the initial stack on these 
processors, it's necessary to use the RAM-in Cache, you should map an 
unused area of address space into a BAT, but am not certain of other 
requirments such as BAT properties, or settings?

Is anyone more familar with this or suggestions?


thanks,

Matt

^ permalink raw reply	[flat|nested] 2+ messages in thread

* [U-Boot-Users] MPC8347/9 stack in cache (CFG_INIT_RAM_ADDR)
  2007-04-24  4:49 [U-Boot-Users] MPC8347/9 stack in cache (CFG_INIT_RAM_ADDR) Matt Hevern
@ 2007-04-24 14:56 ` Timur Tabi
  0 siblings, 0 replies; 2+ messages in thread
From: Timur Tabi @ 2007-04-24 14:56 UTC (permalink / raw)
  To: u-boot

Matt Hevern wrote:

> Is anyone more familar with this or suggestions?

Well, I should be more familiar, since I wrote the support for the MPC8349E-mITX, but 
honestly I just diddled with the values until I got something working.

Have you taken a look at the latest MPC8349ITX.h?  I went through a lot of effort to make 
that file as "intelligent" as possible.

I have this:

#define CFG_INIT_RAM_ADDR	0xFD000000	/* Initial RAM address */

/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
#define CFG_IBAT6L	(0xF0000000 | BATL_PP_10 | BATL_MEMCOHERENCE)
#define CFG_IBAT6U	(0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)

Maybe you BAT window is too small?


-- 
Timur Tabi
Linux Kernel Developer @ Freescale

^ permalink raw reply	[flat|nested] 2+ messages in thread

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2007-04-24  4:49 [U-Boot-Users] MPC8347/9 stack in cache (CFG_INIT_RAM_ADDR) Matt Hevern
2007-04-24 14:56 ` Timur Tabi

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