From mboxrd@z Thu Jan 1 00:00:00 1970 From: Timur Tabi Date: Wed, 16 May 2007 18:11:15 -0500 Subject: [U-Boot-Users] CFG_MONITOR_BASE < CFG_FLASH_BASE In-Reply-To: <406A31B117F2734987636D6CCC93EE3C017BA2D5@ehost011-3.exch011.intermedia.net> References: <20070516220434.ABD38352650@atlas.denx.de> <464B818F.60509@freescale.com> <406A31B117F2734987636D6CCC93EE3C017BA2D5@ehost011-3.exch011.intermedia.net> Message-ID: <464B8F93.7010005@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Leonid wrote: > As a matter of fact, such scheme is widely used for Xilinx FPGA embedded > cores (both Microblaze and PPC) as well as for ARM CPUs. Can you give me some details as to how this works? I'm trying to figure out if this approach is meaningful for boards based on Freescale 8xxx CPUs. I'm guessing it's not, and that the code I see in the board header files is some left-over legacy from a completely different CPU that no one ever bothered to think about. -- Timur Tabi Linux Kernel Developer @ Freescale