From mboxrd@z Thu Jan  1 00:00:00 1970
From: Bruce Adler <bruce.adler@ccpu.com>
Date: Tue, 07 Aug 2007 10:34:20 -0700
Subject: [U-Boot-Users] [PATCH] repost: add image size and descriptors for
 Spartan 3E FPGA chips
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	<20070807144523.09B603535CD@atlas.denx.de>
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[repost, this time without expanding the tabs to whitespace]

Spartan 3E image sizes taken from Table 1-4 in Xilinx UG332 (v1.1)

Signed-off by: Bruce Adler <bruce.adler@ccpu.com>

diff -ur a/include/spartan3.h b/include/spartan3.h
--- a/include/spartan3.h	2007-08-06 23:24:11.000000000 -0700
+++ b/include/spartan3.h	2007-08-06 23:23:06.000000000 -0700
@@ -73,6 +73,13 @@
  #define XILINX_XC3S4000_SIZE 	11316864/8
  #define XILINX_XC3S5000_SIZE 	13271936/8

+/* Spartan-3E (v3.4) */
+#define	XILINX_XC3S100E_SIZE	581344/8
+#define	XILINX_XC3S250E_SIZE	1353728/8
+#define	XILINX_XC3S500E_SIZE	2270208/8
+#define	XILINX_XC3S1200E_SIZE	3841184/8
+#define	XILINX_XC3S1600E_SIZE	5969696/8
+
  /* Descriptor Macros
   *********************************************************************/
  /* Spartan-II devices */
@@ -100,4 +107,21 @@
  #define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
  { Xilinx_Spartan3, iface, XILINX_XC3S5000E_SIZE, fn_table, cookie }

+
+/* Spartan-3E devices */
+#define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
+
  #endif /* _SPARTAN3_H_ */