[U-Boot-Users] BDI2000 problems flashing virgin custom 8548 board

[Ben Warren <bwarren@qstreams.com>]

robert lazarski wrote:
> On 8/29/07, Ben Warren <bwarren@qstreams.com> wrote:
>   
>> robert lazarski wrote:
>>     
>>> atum8548>erase 0
>>> Erasing flash at 0x00000000
>>> # Erasing flash memory failed
>>>
>>> What chip do you have? What did you start erasing?
>>>
>>>
>>>       
>> I'm not much of an expert on this, but I believe the BDI-2000 will
>> execute the INIT section before handing control over to you. Your flash
>> chip is on chip select 0, so the BR0/OR0 registers determine where you
>> will see it. On my CPU (MPC8349) and probably yours too, the 17 least
>> significant (from the left) bits of BR0 determine where the chip select
>> ends up. In your case, this is 0xff80. I expect your flash chip will
>> start at 0xff800000.
>>
>> I highly recommend reading up on these registers - the Freescale
>> reference manuals are excellent. There are a lot of options, and for NOR
>> flash, at least at startup, you should make sure all the timings are
>> fully relaxed (maximum wait states etc.).
>>     
>
> Thanks Ben and all. I really do have 1Gb / 128MB of flash - here's
> some quick docs:
>
> http://www.spansion.com/products/S29GL01GP.html
>
>   
You're right. Sorry about that.
> Here's the way I came up with my BR0 / OR0 :
>
> /*
>  * FLASH on the Local Bus
>  * based on flash chip S29GL01GP
>  * One bank, 128M, using the CFI driver.
>  * Boot from BR0 bank at 0xf800_0000
>  *
>  * BR0:
>  *    Base address 0 = 0xF8000000 = BR0[0:16] = 1111 1000 0000 0000 0
>  *    Port Size = 16 bits = BRx[19:20] = 10
>  *    Use GPCM = BRx[24:26] = 000
>  *    Valid = BRx[31] = 1
>  *
>  * 0    4    8    12   16   20   24   28
>  * 1111 1000 0000 0000 0001 0000 0000 0001 = f8001001    BR0
>  *
>  * OR0:
>  *    Addr Mask = 128M = ORx[0:16] = 1111 1000 0000 0000 0
>  *    Reserved ORx[17:18] = 00
>  *    CSNT = ORx[20] = 1
>  *    ACS = half cycle delay = ORx[21:22] = 11
>  *    SCY = 6 = ORx[24:27] = 0110
>  *    TRLX = use relaxed timing = ORx[29] = 1
>  *    EAD = use external address latch delay = OR[31] = 1
>  *
>  * 0    4    8    12   16   20   24   28
>  * 1111 1000 0000 0000 0000 1110 0110 0101 = f8000E65    ORx
>  */
>
> Here's what I now have in my bdi config:
>
> ; Setup Flash chip select
> WM32    0xe0005000      0xf8001001      ;BR0
> WM32    0xe0005004      0xf8000E65      ;OR0
>
> [FLASH]
> CHIPTYPE    MIRRORX16   ;AM29LV641D , is equivalent with S29GL01GP ?
> CHIPSIZE    0x128000    ;The size of one flash chip in bytes
>   
CHIPSIZE 0x8000000
> BUSWIDTH    16          ;The width of the flash memory bus in bits (8 | 16 | 32)
> FILE        /tftpboot/u-boot.bin
> FORMAT      BIN 0xFF000000
> ERASE       0xFF000000  ;erase sector 0
> ERASE       0xFF010000  ;erase sector 1
> ERASE       0xFF020000  ;erase sector 2
> ERASE       0xFF030000  ;erase sector 3
>
>   
You might as well fill these in properly. I think they're only used if 
you use the 'erase' command without arguments, though.
> And this is where I get stuck:
>
> atum8548>unlock
> Unlocking flash passed
> atum8548>erase 0xf8000000
> Erasing flash at 0xf8000000
> # Erasing flash memory failed
>
> Anyone got a clue-by-four ? ;-) . Thanks!
> Robert
>   
Whenever I use the erase command, I specify the sector size and the 
number of sectors to erase.
Have you tried:

erase 0xf8000000 0x20000 1 (erase 1 sector sized 128kB)

Can you read from the chip using the mdh command? Everything should be 
0xFFFF. You can also try unlocking the chip manually. For my chip the 
sequence is:

; Enable flash programming
WM16 0xfe000000 0x0060 ;clear flash lock-bits
WM16 0xfe000000 0x00d0
DELAY 1000
WM16 0xfe000000 0xffff

I haven't looked at the memory map of your chip, but it may be different.

Another fun thing to do is to try querying the chip's CFI registers to 
see if it responds. This is documented in section 12.2 of the Spansion spec.

regards,
Ben