From mboxrd@z Thu Jan 1 00:00:00 1970 From: David Hawkins Date: Thu, 06 Sep 2007 15:06:29 -0700 Subject: [U-Boot-Users] minimum bdi config to read flash on 85xx In-Reply-To: <50d8dde80709061403t576d0720lf1461bd6ee9e6730@mail.gmail.com> References: <46DDA35F.5000006@ovro.caltech.edu> <46DDB5CF.90006@qstreams.com> <46DDCAED.8080006@ovro.caltech.edu> <46DEDAC0.10602@ovro.caltech.edu> <46DF1D78.2000001@ovro.caltech.edu> <50d8dde80709061403t576d0720lf1461bd6ee9e6730@mail.gmail.com> Message-ID: <46E079E5.5000102@ovro.caltech.edu> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Hi Luiz, > This is Luiz and I'm working with Robert in this project. Glad to hear he's got someone to grow grey hairs with ... if it hasn't fallen out yet. > Actually, I'm a hardware guy. So am I ... this week :) > I read your messages and it seems you're right. However, > before introducing these changes on the board, we decided > to verify all flash circuitry and we noticed the following: > > CE# is OK! > WE# is OK! > OE# is OK! > > We verified it using a scope and triggering CE# pin. After that, we > tried to write to flash through BDI2000 using "mm" command. Again with a > scope we checked each address line and apparently everything is fine > with the address. I think that after the processor boots LAD[0:31] activate for each address access, its only during boot that LAD[27:31] do not toggle, and you have to use LA[27:31]. So its that confirmation of the address toggles in this case just confirms that the LAD[27:31] bits toggle. On the bright-side, it sounds like you have the bit ordering correct ([27:30])... just not the right bits (LAD vs LA). > We also checked the data being written, and it's ok > too. After that, in order to validate the written, we read the same > address we had just written. But we got a different value. Therefore we > are not writing correctly to flash. Have you tried using simple CFI flash commands; read the manufacturer ID, read the device ID, read the sector protection? Don't bother with BDI Flash commands just yet, just use memory read/write commands. > Ok, after all, we fixed our board following your tips. > We connected LA[27:30] to A[3:0] and A[4:25] to LBA[26:5]. > But we got the same bad result. I mean we read a wrong data. > > After, we changed flash access time, decreasing it. And the > problem persisted. We changed flash chip and nothing happened. > > Actually I'm afraid because I can't see what else we can verify > on hardware. > > My opinion is we have mistakes on configuration file. I'm not sure if we > are configuring all registers correctly. > > Do you think it would be helpful if I send you our flash schematic and > our configuration file? Sure, no guarantees, you can send me a copy, or send a link to the group. I'm not too knowledgeable on BDI config files yet, as I don't have my custom hardware. However, I have looked at a few hardware designs, so perhaps I'll spot something on the schematic. The peripherals seem to be pretty similar between the PowerQUICCs, so I'll dig up a working configuration file, and look at the difference in register settings. What is your Flash? Eg. if its say a Spansion device, do you have WP# tied high, BYTE# tied low/high, etc? Are there any address pins left floating? Do you have a logic analyzer available? If you did, you'd be able to look at the flash controls and write-data and convince yourself that your Flash programming sequence was correct. The best advice at the moment, is to access your Flash configuration using manual read/write sequences. Cheers, Dave