[U-Boot-Users] MIPS cache management (and build) questions.

[Shinya Kuribayashi <shinya.kuribayashi@necel.com>]

Hi Paul,

Paul Marciano wrote:
> I'm working on bringing U-Boot 1.2.0 up on a MIPS 24Kc
> core (MIPS32R2).  It has gone relatively smoothly -
> with a couple of hiccups that I want to point out here
> in case I'm missing something.

Nice. I'd like to see that.

> 1. I needed to gdb through the code, so I turned off
> -Os, and the build failed with strcmp and friends
> missing.  It seems that the MIPS port in-lines them
> with -Os but omits them completely without it.  Adding
> 'C' versions of the functions fixed that.

I've also fixed and the patch checked in. Please try 1.3.0-rc1.

> 2. I'm using do_bootelf() to invoke my image.  The
> lines:
>     addr = load_elf_image(addr);
>     ...
>     if (dcache_status())
>         dcache_disable();
>     ...
>     (function call through addr)
> 
> The comment embedded in the code says the dcache is
> flushed already, but in cpu/mips/cpu.c, the function
> flush_cache() is empty so the dcache isn't flushed.
> 
> As it's not flushed, and dcache_disable() just turns
> it off, if the run address is somewhere that hasn't
> naturally spilled out of the dcache during the load,
> the CPU will fetch garbage.
> 
> Also, as the 'addr' variable is now on the stack (in a
> non-optimized compile), that variable pops out of
> existence and jumping through it shoots the processor
> off into the weeds.

Hope this helps. Sorry for no description. I have to be add later...


Thanks,

    Shinya Kuribayashi

---

 common/cmd_elf.c             |    2 ++
 include/asm-mips/addrspace.h |    2 +-
 2 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index 63a5593..f1057d4 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -55,12 +55,14 @@ int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 
 	printf ("## Starting application at 0x%08lx ...\n", addr);
 
+#if 0
 	/*
 	 * QNX images require the data cache is disabled.
 	 * Data cache is already flushed, so just turn it off.
 	 */
 	if (dcache_status ())
 		dcache_disable ();
+#endif
 
 	/*
 	 * pass address parameter as argv[0] (aka command name),
diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h
index 90e8840..bfdc06f 100644
--- a/include/asm-mips/addrspace.h
+++ b/include/asm-mips/addrspace.h
@@ -49,7 +49,7 @@
    cannot access physical memory directly from core */
 #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000)
 #else	/* !CONFIG_AU1X00 */
-#define UNCACHED_SDRAM(a) PHYSADDR(a)
+#define UNCACHED_SDRAM(a) KSEG1ADDR(a)
 #endif	/* CONFIG_AU1X00 */
 #endif	/* __ASSEMBLY__ */
 /*