From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Warren Date: Fri, 14 Sep 2007 14:43:10 -0400 Subject: [U-Boot-Users] minimum bdi config to read flash on 85xx In-Reply-To: References: <46E0B0A6.8050306@ovro.caltech.edu> <46E82959.2090107@ovro.caltech.edu> <46E82C47.8050708@smiths-aerospace.com> <46E8300E.8040109@ovro.caltech.edu> <46E83245.5060604@smiths-aerospace.com> <46E8338C.1090704@ovro.caltech.edu> <46E84102.3010800@ovro.caltech.edu> Message-ID: <46EAD63E.408@qstreams.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de robert lazarski wrote: > On 9/12/07, David Hawkins wrote: > >> Don't move onto anything until you can read the >> manufacturer ID, you've found a problem, so you >> need to figure it out here first. >> > We have yet to be able to repeat that feat at any other address. We > can read 0xCAFE from 0xf8000F00 , but only after about a minute after > a bdi boot. We cannot overwrite 0xf8000F00 , nor can we erase the > entire chip via the documented sequence. As I said we think we have > timing issues. Any suggestions? More RTFM? We do have a logic > analyzer. > Nice progress! Since you have a logic analyzer, you should definitely get a sense of the timing, which may or may not reveal anything. You have this chip select really slowed down, and it's asynchronous, so something would have to really be out of whack. I'd be more tempted to look elsewhere. What else do you have on the local bus? Are other devices isolated via buffers in the same way that the Freescale eval boards are? Is the flash VCC looking good? Is the reset signal solid? regards, Ben