[U-Boot-Users] [MIPS] Make mips_io_port_base more generic

[Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>]

From: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>

Although mips_io_port_base is currently a part of IDE command, but it is
quite fundamental for MIPS memory mapped I/O port access such as in[bwl]
and out[bwl]. So let's move it to MIPS generic part.

This patch adds a helper routine for mips_io_port_base from Linux, and fixes
two multiple definition of this variable, tb0229 and gth2.

This change is triggered by gth2 build error:
board/gth2/libgth2.a(gth2.o): In function `log_serial_char':
/home/skuribay/devel/u-boot.git/board/gth2/gth2.c:47: multiple definition of `mips_io_port_base'
common/libcommon.a(cmd_ide.o):/home/skuribay/devel/u-boot.git/common/cmd_ide.c:712: first defined here
make: *** [u-boot] Error 1

Signed-off-by: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
---

 board/gth2/gth2.c     |    4 ++--
 board/tb0229/tb0229.c |    6 ++----
 common/cmd_ide.c      |    4 ----
 include/asm-mips/io.h |   16 +++++++++++++++-
 lib_mips/board.c      |    5 +++++
 5 files changed, 24 insertions(+), 11 deletions(-)

diff --git a/board/gth2/gth2.c b/board/gth2/gth2.c
index ffeaf58..3c5563e 100644
--- a/board/gth2/gth2.c
+++ b/board/gth2/gth2.c
@@ -26,14 +26,13 @@
 #include <asm/au1x00.h>
 #include <asm/addrspace.h>
 #include <asm/mipsregs.h>
+#include <asm/io.h>
 #include <watchdog.h>
 
 #include "ee_access.h"
 
 static int wdi_status = 0;
 
-unsigned long mips_io_port_base = 0;
-
 #define SDRAM_SIZE ((64*1024*1024)-(12*4096))
 
 
@@ -90,6 +89,7 @@ long int initdram(int board_type)
 	/* If memory could be changed, we should return the true value here */
 
 	WATCHDOG_RESET();
+	set_io_port_base(0);
 
 	return (SDRAM_SIZE);
 }
diff --git a/board/tb0229/tb0229.c b/board/tb0229/tb0229.c
index e7914bd..c80db56 100644
--- a/board/tb0229/tb0229.c
+++ b/board/tb0229/tb0229.c
@@ -13,10 +13,9 @@
 #include <command.h>
 #include <asm/addrspace.h>
 #include <asm/inca-ip.h>
+#include <asm/io.h>
 #include <pci.h>
 
-unsigned long mips_io_port_base = 0;
-
 #if defined(CONFIG_PCI)
 static struct pci_controller hose;
 
@@ -26,17 +25,16 @@ void pci_init_board (void)
 }
 #endif
 
-
 long int initdram(int board_type)
 {
 	return get_ram_size (CFG_SDRAM_BASE, 0x8000000);
 }
 
-
 int checkboard (void)
 {
 	printf("Board: TANBAC TB0229 ");
 	printf("(CPU Speed %d MHz)\n", (int)CPU_CLOCK_RATE/1000000);
 
+	set_io_port_base(0);
 	return 0;
 }
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index bb064ea..feb89d6 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -54,10 +54,6 @@
 
 #ifndef __PPC__
 #include <asm/io.h>
-#ifdef __MIPS__
-/* Macros depend on this variable */
-unsigned long mips_io_port_base = 0;
-#endif
 #endif
 
 #ifdef CONFIG_IDE_8xx_DIRECT
diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h
index cd4d5dc..1e060f7 100644
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -71,7 +71,21 @@
  * instruction, so the lower 16 bits must be zero.  Should be true on
  * on any sane architecture; generic code does not use this assumption.
  */
-extern unsigned long mips_io_port_base;
+extern const unsigned long mips_io_port_base;
+
+/*
+ * Gcc will generate code to load the value of mips_io_port_base after each
+ * function call which may be fairly wasteful in some cases.  So we don't
+ * play quite by the book.  We tell gcc mips_io_port_base is a long variable
+ * which solves the code generation issue.  Now we need to violate the
+ * aliasing rules a little to make initialization possible and finally we
+ * will need the barrier() to fight side effects of the aliasing chat.
+ * This trickery will eventually collapse under gcc's optimizer.  Oh well.
+ */
+static inline void set_io_port_base(unsigned long base)
+{
+	* (unsigned long *) &mips_io_port_base = base;
+}
 
 /*
  * Thanks to James van Artsdalen for a better timing-fix than
diff --git a/lib_mips/board.c b/lib_mips/board.c
index 91ccec0..c1a0acf 100644
--- a/lib_mips/board.c
+++ b/lib_mips/board.c
@@ -62,6 +62,11 @@ static ulong mem_malloc_start;
 static ulong mem_malloc_end;
 static ulong mem_malloc_brk;
 
+/*
+ * mips_io_port_base is the begin of the address space to which x86 style
+ * I/O ports are mapped.
+ */
+unsigned long mips_io_port_base = -1;
 
 /*
  * The Malloc area is immediately below the monitor copy in DRAM