[U-Boot-Users] RFC on davinci Nand support changes

[Troy Kisky <troy.kisky@boundarydevices.com>]

> 
> Again, you are trying to reinvent the wheel. The ECC algorithm is described
> in details in TI documentation and MontaVista implemented it verbatim.
> 
> 
> This code is a verbatim implementation of what is described in TI
> documentation. It's not supposed to look nice, it's supposed to work.

I guess that's what happens when you implement an algorithm without understanding it.
Example: You have a block of all zeros.

The ecc stored in the spare bytes of this is also 0.
Now, upon reading this block of zeroes, a two bit ecc occurs. The bits that happen to be
read incorrectly are bit # 0 & bit # 0x3f of the block
The hardware calculated ecc will be
0:0 ^ 0:fff = 0:fff after bit 0
0:fff ^ 3f:fc00 = 3f:3f after bit 3f

Now, when your algorithm counts bits you get 12, and decide
it is a single bit ecc error.

I however xor the high and low 12 bits 3f ^ 3f = 0, 0 != fff and
decide it is multi bit ecc error and give an error.

Note, that both approaches would have decide it was a single bit error, if the second
error wouldn't have happened.

I could give an example of another error with your algorithm, but I have
no desire to teach those without a desire to learn and no one else on this
list seems interested in this subject.

Troy