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From: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] MIPS question
Date: Thu, 11 Oct 2007 12:07:40 +0900	[thread overview]
Message-ID: <470D937C.6050600@ruby.dti.ne.jp> (raw)
In-Reply-To: <470D320B.5080505@comsys.ro>

Vlad Lungu wrote:
> in include/asm-mips/addrspace.h line 52, there is a
> 
> #define UNCACHED_SDRAM(a) PHYSADDR(a)
> 
> The question is: shouldn't we use KSEG1ADDR() instead of PHYSADDR()?

I think we should. At least my target boards need that change.

http://www.nabble.com/MIPS-cache-management-%28and-build%29-questions.-tf4434068.html#a12651921

note: Wrt dcache_disable() part, please take into account
      Stefan's comment.

Anyway I seriously wonder whether other mips ports work as it is.

thanks,

    Shinya

  reply	other threads:[~2007-10-11  3:07 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-10-10 20:11 [U-Boot-Users] MIPS question Vlad Lungu
2007-10-11  3:07 ` Shinya Kuribayashi [this message]
2007-10-11  9:19   ` Vlad Lungu
2007-10-11 15:30     ` Shinya Kuribayashi
  -- strict thread matches above, loose matches on Subject: below --
2007-10-11 14:36 Tim Braun

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