From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shinya Kuribayashi Date: Thu, 11 Oct 2007 12:07:40 +0900 Subject: [U-Boot-Users] MIPS question In-Reply-To: <470D320B.5080505@comsys.ro> References: <470D320B.5080505@comsys.ro> Message-ID: <470D937C.6050600@ruby.dti.ne.jp> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Vlad Lungu wrote: > in include/asm-mips/addrspace.h line 52, there is a > > #define UNCACHED_SDRAM(a) PHYSADDR(a) > > The question is: shouldn't we use KSEG1ADDR() instead of PHYSADDR()? I think we should. At least my target boards need that change. http://www.nabble.com/MIPS-cache-management-%28and-build%29-questions.-tf4434068.html#a12651921 note: Wrt dcache_disable() part, please take into account Stefan's comment. Anyway I seriously wonder whether other mips ports work as it is. thanks, Shinya