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From: Ben Warren <bwarren@qstreams.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] I2C scanning
Date: Mon, 22 Oct 2007 10:57:27 -0400	[thread overview]
Message-ID: <471CBA57.7060005@qstreams.com> (raw)
In-Reply-To: <CE54F2377C0FB8439A290BF5A88BF13D071425F7@CHN-HCLT-EVS01.HCLT.CORP.HCL.IN>

Yasothabalan,

Yasothabalan Ramaswamy-TLS,Chennai wrote:
>
> Hi all,
>
>  
>
> I am using MPC5200B CPU.
>
>  
>
> I am using both the I2C buses present as defined below,
>
>  
>
> #define MPC5XXX_I2C1              (CFG_MBAR + 0x3D00)
>
> #define MPC5XXX_I2C2              (CFG_MBAR + 0x3D40)
>
>  
>
> Is it possible to scan both the buses in the run time and do 
> read/write operation?
>
>  
>
> I am here able to scan only one bus.
>
>  
>
> How can I fix this issue?
>
>  
>
I don't know anything about this CPU, but the following code in 
cpu/mpc5xxx/i2c.c makes me think you can't use both I2C buses on this chip:

#if (CFG_I2C_MODULE == 2)
#define I2C_BASE    MPC5XXX_I2C2
#elif (CFG_I2C_MODULE == 1)
#define I2C_BASE    MPC5XXX_I2C1
#else
#error CFG_I2C_MODULE is not properly configured
#endif

If, however, this chip shares the same I2C controller  as the MPC8xxx 
chips (I have no idea if it does or doesn't), with a little Makefile 
magic you could use the fsl_i2c.c driver, which supports multiple buses.

regards,
Ben

  reply	other threads:[~2007-10-22 14:57 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-10-22 14:44 [U-Boot-Users] I2C scanning Yasothabalan
2007-10-22 14:57 ` Ben Warren [this message]
2007-10-22 15:21   ` Yasothabalan
2007-10-22 15:30     ` Ben Warren
2007-10-23 12:02   ` Yasothabalan
2007-10-23 14:25     ` Ben Warren
2007-10-24  9:18       ` Yasothabalan
2007-10-24 13:52         ` Ben Warren
2007-10-24 20:52         ` Wolfgang Denk

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